/linux/arch/arm/boot/dts/nvidia/ |
H A D | tegra124-nyan-blaze.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include "tegra124-nyan.dtsi" 6 #include "tegra124-nyan-blaze-emc.dtsi" 10 compatible = "google,nyan-blaze-rev10", "google,nyan-blaze-rev9", 11 "google,nyan-blaze-rev8", "google,nyan-blaze-rev7", 12 "google,nyan-blaze-rev6", "google,nyan-blaze-rev5", 13 "google,nyan-blaze-rev4", "google,nyan-blaze-rev3", 14 "google,nyan-blaze-rev2", "google,nyan-blaze-rev1", 15 "google,nyan-blaze-rev0", "google,nyan-blaze", [all …]
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H A D | tegra124-nyan-big.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include "tegra124-nyan.dtsi" 6 #include "tegra124-nyan-big-emc.dtsi" 9 model = "Acer Chromebook 13 CB5-311"; 10 compatible = "google,nyan-big-rev7", "google,nyan-big-rev6", 11 "google,nyan-big-rev5", "google,nyan-big-rev4", 12 "google,nyan-big-rev3", "google,nyan-big-rev2", 13 "google,nyan-big-rev1", "google,nyan-big-rev0", 14 "google,nyan-big", "google,nyan", "nvidia,tegra124"; [all …]
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H A D | tegra30-beaver.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 5 #include "tegra30-cpu-opp.dtsi" 6 #include "tegra30-cpu-opp-microvolt.dtsi" 19 stdout-path = "serial0:115200n8"; 29 avdd-pexa-supply = <&ldo1_reg>; 30 vdd-pexa-supply = <&ldo1_reg>; 31 avdd-pexb-supply = <&ldo1_reg>; 32 vdd-pexb-supply = <&ldo1_reg>; 33 avdd-pex-pll-supply = <&ldo1_reg>; [all …]
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H A D | tegra124-jetson-tk1.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include <dt-bindings/input/input.h> 7 #include "tegra124-jetson-tk1-emc.dtsi" 11 compatible = "nvidia,jetson-tk1", "nvidia,tegra124"; 17 /* This order keeps the mapping DB9 connector <-> ttyS0 */ 24 stdout-path = "serial0:115200n8"; 34 avddio-pex-supply = <&vdd_1v05_run>; 35 dvddio-pex-supply = <&vdd_1v05_run>; 36 avdd-pex-pll-supply = <&vdd_1v05_run>; [all …]
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H A D | tegra124-apalis-v1.2.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 OR MIT 3 * Copyright 2016-2018 Toradex AG 7 #include "tegra124-apalis-emc.dtsi" 21 avddio-pex-supply = <®_1v05_vdd>; 22 avdd-pex-pll-supply = <®_1v05_vdd>; 23 avdd-pll-erefe-supply = <®_1v05_avdd>; 24 dvddio-pex-supply = <®_1v05_vdd>; 25 hvdd-pex-pll-e-supply = <®_module_3v3>; 26 hvdd-pex-supply = <®_module_3v3>; 27 vddio-pex-ctl-supply = <®_module_3v3>; [all …]
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H A D | tegra124-apalis.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 OR X11 3 * Copyright 2016-2019 Toradex AG 7 #include "tegra124-apalis-emc.dtsi" 20 avddio-pex-supply = <®_1v05_vdd>; 21 avdd-pex-pll-supply = <®_1v05_vdd>; 22 avdd-pll-erefe-supply = <®_1v05_avdd>; 23 dvddio-pex-supply = <®_1v05_vdd>; 24 hvdd-pex-pll-e-supply = <®_module_3v3>; 25 hvdd-pex-supply = <®_module_3v3>; 26 vddio-pex-ctl-supply = <®_module_3v3>; [all …]
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H A D | tegra114-roth.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include <dt-bindings/input/input.h> 15 linux,initrd-start = <0x82000000>; 16 linux,initrd-end = <0x82800000>; 24 trusted-foundations { 25 compatible = "tlm,trusted-foundations"; 26 tlm,version-major = <2>; 27 tlm,version-minor = <8>; 40 avdd-dsi-csi-supply = <&vdd_1v2_ap>; [all …]
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H A D | tegra114-asus-tf701t.dts | 1 // SPDX-License-Identifier: GPL-2.0 3 /dts-v1/; 5 #include <dt-bindings/input/gpio-keys.h> 6 #include <dt-bindings/input/input.h> 13 chassis-type = "convertible"; 29 trusted-foundations { 30 compatible = "tlm,trusted-foundations"; 31 tlm,version-major = <2>; 32 tlm,version-minor = <8>; 40 reserved-memory { [all …]
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H A D | tegra114-dalmore.dts | 1 // SPDX-License-Identifier: GPL-2.0 7 /dts-v1/; 9 #include <dt-bindings/input/input.h> 23 stdout-path = "serial0:115200n8"; 34 hdmi-supply = <&vdd_5v0_hdmi>; 35 vdd-supply = <&vdd_hdmi_reg>; 36 pll-supply = <&palmas_smps3_reg>; 38 nvidia,ddc-i2c-bus = <&hdmi_ddc>; 39 nvidia,hpd-gpio = 46 avdd-dsi-csi-supply = <&avdd_1v2_reg>; [all …]
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H A D | tegra30-asus-nexus7-grouper-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 #include <dt-bindings/input/gpio-keys.h> 4 #include <dt-bindings/input/input.h> 5 #include <dt-bindings/power/summit,smb347-charger.h> 6 #include <dt-bindings/thermal/thermal.h> 9 #include "tegra30-cpu-opp.dtsi" 10 #include "tegra30-cpu-opp-microvolt.dtsi" 11 #include "tegra30-asus-lvds-display.dtsi" 27 * pre-existing /chosen node to be available to insert the 33 trusted-foundations { [all …]
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H A D | tegra30-asus-transformer-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 #include <dt-bindings/input/gpio-keys.h> 4 #include <dt-bindings/input/input.h> 5 #include <dt-bindings/thermal/thermal.h> 8 #include "tegra30-cpu-opp.dtsi" 9 #include "tegra30-cpu-opp-microvolt.dtsi" 12 chassis-type = "convertible"; 31 * pre-existing /chosen node to be available to insert the 37 trusted-foundations { 38 compatible = "tlm,trusted-foundations"; [all …]
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H A D | tegra30-lg-x3.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 #include <dt-bindings/input/gpio-keys.h> 4 #include <dt-bindings/input/input.h> 5 #include <dt-bindings/leds/common.h> 6 #include <dt-bindings/mfd/max77620.h> 7 #include <dt-bindings/thermal/thermal.h> 10 #include "tegra30-cpu-opp.dtsi" 11 #include "tegra30-cpu-opp-microvolt.dtsi" 14 chassis-type = "handset"; 30 * pre-existing /chosen node to be available to insert the [all …]
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H A D | tegra30-apalis-v1.1.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 OR MIT 16 avdd-pexa-supply = <&vdd2_reg>; 17 avdd-pexb-supply = <&vdd2_reg>; 18 avdd-pex-pll-supply = <&vdd2_reg>; 19 avdd-plle-supply = <&ldo6_reg>; 20 hvdd-pex-supply = <®_module_3v3>; 21 vddio-pex-ctl-supply = <®_module_3v3>; 22 vdd-pexa-supply = <&vdd2_reg>; 23 vdd-pexb-supply = <&vdd2_reg>; 27 nvidia,num-lanes = <4>; [all …]
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H A D | tegra30-apalis.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 15 avdd-pexa-supply = <&vdd2_reg>; 16 avdd-pexb-supply = <&vdd2_reg>; 17 avdd-pex-pll-supply = <&vdd2_reg>; 18 avdd-plle-supply = <&ldo6_reg>; 19 hvdd-pex-supply = <®_module_3v3>; 20 vddio-pex-ctl-supply = <®_module_3v3>; 21 vdd-pexa-supply = <&vdd2_reg>; 22 vdd-pexb-supply = <&vdd2_reg>; 26 nvidia,num-lanes = <4>; [all …]
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H A D | tegra124-venice2.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include <dt-bindings/input/input.h> 18 stdout-path = "serial0:115200n8"; 29 vdd-supply = <&vdd_3v3_hdmi>; 30 pll-supply = <&vdd_hdmi_pll>; 31 hdmi-supply = <&vdd_5v0_hdmi>; 33 nvidia,ddc-i2c-bus = <&hdmi_ddc>; 34 nvidia,hpd-gpio = 41 avdd-io-hdmi-dp-supply = <&vdd_1v05_run>; [all …]
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H A D | tegra30-asus-nexus7-tilapia.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 #include "tegra30-asus-nexus7-grouper-common.dtsi" 4 #include "tegra30-asus-nexus7-tilapia-memory-timings.dtsi" 10 init-mode-3g-hog { 11 gpio-hog; 30 output-low; 39 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 41 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 46 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 48 nvidia,enable-input = <TEGRA_PIN_DISABLE>; [all …]
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H A D | tegra30-colibri.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 15 nvidia,ddc-i2c-bus = <&hdmi_ddc>; 16 nvidia,hpd-gpio = 18 pll-supply = <®_1v8_avdd_hdmi_pll>; 19 vdd-supply = <®_3v3_avdd_hdmi>; 24 lan-reset-n-hog { 25 gpio-hog; 27 output-high; 28 line-name = "LAN_RESET#"; 33 pinctrl-names = "default"; [all …]
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H A D | tegra30-ouya.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include <dt-bindings/input/gpio-keys.h> 5 #include <dt-bindings/input/input.h> 6 #include <dt-bindings/thermal/thermal.h> 9 #include "tegra30-cpu-opp.dtsi" 10 #include "tegra30-cpu-opp-microvolt.dtsi" 26 stdout-path = "serial0:115200n8"; 30 trusted-foundations { 31 compatible = "tlm,trusted-foundations"; [all …]
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/linux/arch/arm64/boot/dts/nvidia/ |
H A D | tegra210-p2571.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include <dt-bindings/input/input.h> 5 #include "tegra210-p2530.dtsi" 12 pinctrl-names = "boot"; 13 pinctrl-0 = <&state_boot>; 18 nvidia,pull = <TEGRA_PIN_PULL_UP>; 20 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 21 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 22 nvidia,io-hv = <TEGRA_PIN_DISABLE>; [all …]
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H A D | tegra210-p2595.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 #include <dt-bindings/pinctrl/pinctrl-tegra.h> 10 pinctrl-names = "boot"; 11 pinctrl-0 = <&state_boot>; 17 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 19 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 20 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 21 nvidia,io-hv = <TEGRA_PIN_ENABLE>; 26 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 28 nvidia,enable-input = <TEGRA_PIN_ENABLE>; [all …]
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H A D | tegra210-p2597.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 #include <dt-bindings/gpio/tegra-gpio.h> 4 #include <dt-bindings/input/input.h> 5 #include <dt-bindings/pinctrl/pinctrl-tegra.h> 23 avdd-dsi-csi-supply = <&vdd_dsi_csi>; 33 avdd-io-hdmi-dp-supply = <&avdd_1v05>; 34 vdd-hdmi-dp-pll-supply = <&vdd_1v8>; 35 hdmi-supply = <&vdd_hdmi>; 37 nvidia,ddc-i2c-bus = <&hdmi_ddc>; 38 nvidia,hpd-gpio = <&gpio TEGRA_GPIO(CC, 1) [all …]
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H A D | tegra210-p2894.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 #include <dt-bindings/input/input.h> 4 #include <dt-bindings/input/gpio-keys.h> 5 #include <dt-bindings/mfd/max77620.h> 6 #include <dt-bindings/pinctrl/pinctrl-tegra.h> 16 stdout-path = "serial0:115200n8"; 26 pinctrl-names = "boot"; 27 pinctrl-0 = <&state_boot>; 33 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 35 nvidia,enable-input = <TEGRA_PIN_DISABLE>; [all …]
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/linux/arch/arm/boot/dts/nuvoton/ |
H A D | nuvoton-npcm730-gsj-gpio.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 6 gpio0pp_pins: gpio0pp-pins { 8 bias-disable; 9 drive-push-pull; 11 gpio1pp_pins: gpio1pp-pins { 13 bias-disable; 14 drive-push-pull; 16 gpio2pp_pins: gpio2pp-pins { 18 bias-disable; 19 drive-push-pull; [all …]
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/linux/arch/arm/boot/dts/st/ |
H A D | ste-href-ab8500.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later 6 #include "ste-ab8500.dtsi" 13 pinctrl-names = "default", "sleep"; 14 pinctrl-0 = <&usb_a_1_default>; 15 pinctrl-1 = <&usb_a_1_sleep>; 20 regulator-name = "V-DISPLAY"; 24 regulator-name = "V-eMMC1"; 28 regulator-name = "V-MMC-SD"; 32 regulator-name = "V-INTCORE"; 36 regulator-name = "V-TVOUT"; [all …]
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H A D | ste-href-ab8505.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later 6 #include "ste-ab8505.dtsi" 13 pinctrl-names = "default", "sleep"; 14 pinctrl-0 = <&usb_a_1_default>; 15 pinctrl-1 = <&usb_a_1_sleep>; 20 regulator-name = "V-DISPLAY"; 24 regulator-name = "V-eMMC1"; 28 regulator-name = "V-MMC-SD"; 32 regulator-name = "V-INTCORE"; 36 regulator-name = "V-TVOUT"; [all …]
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