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Searched +full:pruss +full:- +full:intc (Results 1 – 6 of 6) sorted by relevance

/linux/drivers/irqchip/
H A Dirq-pruss-intc.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * PRU-ICSS INTC IRQChip driver for various TI SoCs
5 * Copyright (C) 2016-2020 Texas Instruments Incorporated - http://www.ti.com/
9 * Suman Anna <s-anna@ti.com>
24 * Number of host interrupts reaching the main MPU sub-system. Note that this
25 * is not the same as the total number of host interrupts supported by the PRUSS
26 * INTC instance
57 /* CMR register bit-field macros */
62 /* HMR register bit-field macros */
67 /* HIPIR register bit-fields */
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/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Dti,pruss-intc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/ti,pruss-intc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: TI PRU-ICSS Local Interrupt Controller
10 - Suman Anna <s-anna@ti.com>
13 Each PRU-ICSS has a single interrupt controller instance that is common
17 various other PRUSS internal and external peripherals. The first 2 output
20 including the MPU and/or other PRUSS instances, DSPs or devices.
22 The property "ti,irqs-reserved" is used for denoting the connection
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/linux/arch/arm/boot/dts/ti/omap/
H A Dam57-pruss.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/
5 * Common PRUSS data for TI AM57xx platforms
9 pruss1_tm: target-module@4b226000 {
10 compatible = "ti,sysc-pruss", "ti,sysc";
13 reg-names = "rev", "sysc";
14 ti,sysc-mask = <(SYSC_PRUSS_STANDBY_INIT |
16 ti,sysc-midle = <SYSC_IDLE_FORCE>,
19 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
24 clock-names = "fck";
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H A Dam4372.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/bus/ti-sysc.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/clock/am4.h>
15 interrupt-parent = <&wakeupgen>;
16 #address-cells = <1>;
17 #size-cells = <1>;
41 #address-cells = <1>;
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/linux/Documentation/devicetree/bindings/remoteproc/
H A Dti,pru-rproc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/ti,pru-rproc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Suman Anna <s-anna@ti.com>
13 Each Programmable Real-Time Unit and Industrial Communication Subsystem
14 (PRU-ICSS or PRUSS) has two 32-bit load/store RISC CPU cores called
15 Programmable Real-Time Units (PRUs), each represented by a node. Each PRU
17 use the Data RAMs present within the PRU-ICSS for code execution.
27 corresponding PRU-ICSS node. Each node can optionally be rendered inactive by
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/linux/arch/arm64/boot/dts/ti/
H A Dk3-am65-main.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2016-2024 Texas Instruments Incorporated - https://www.ti.com/
7 #include <dt-bindings/phy/phy-am654-serdes.h>
11 compatible = "mmio-sram";
13 #address-cells = <1>;
14 #size-cells = <1>;
17 atf-sram@0 {
21 sysfw-sram@f0000 {
25 l3cache-sram@100000 {
30 gic500: interrupt-controller@1800000 {
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