| /linux/drivers/net/ethernet/mellanox/mlxsw/ |
| H A D | spectrum_port_range.c | 26 const struct mlxsw_sp_port_range_reg *prr) in mlxsw_sp_port_range_reg_configure() argument 33 mlxsw_reg_pprr_pack(pprr_pl, prr->index); in mlxsw_sp_port_range_reg_configure() 36 mlxsw_reg_pprr_src_set(pprr_pl, prr->range.source); in mlxsw_sp_port_range_reg_configure() 37 mlxsw_reg_pprr_dst_set(pprr_pl, !prr->range.source); in mlxsw_sp_port_range_reg_configure() 40 mlxsw_reg_pprr_port_range_min_set(pprr_pl, prr->range.min); in mlxsw_sp_port_range_reg_configure() 41 mlxsw_reg_pprr_port_range_max_set(pprr_pl, prr->range.max); in mlxsw_sp_port_range_reg_configure() 52 struct mlxsw_sp_port_range_reg *prr; in mlxsw_sp_port_range_reg_create() local 55 prr = kzalloc(sizeof(*prr), GFP_KERNEL); in mlxsw_sp_port_range_reg_create() 56 if (!prr) in mlxsw_sp_port_range_reg_create() 59 prr->range = *range; in mlxsw_sp_port_range_reg_create() [all …]
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| /linux/Documentation/devicetree/bindings/fpga/ |
| H A D | fpga-region.yaml | 46 Partial Reconfiguration Region (PRR) 48 * A PRR is a specific section of an FPGA reserved for reconfiguration. 49 * A base (or static) FPGA image may create a set of PRR's that later may 51 * The size and specific location of each PRR is fixed. 52 * The connections at the edge of each PRR are fixed. The image that is loaded 53 into a PRR must fit and must use a subset of the region's connections. 59 * An FPGA image that is designed to be loaded into a PRR. There may be 60 any number of personas designed to fit into a PRR, but only one at a time 108 a soft logic bridge (Bridge0-2) in the FPGA. The contents of each PRR can be 159 base FPGA region. The "Full Reconfiguration to add PRR's" example below shows [all …]
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| /linux/Documentation/devicetree/bindings/hwinfo/ |
| H A D | renesas,prr.yaml | 4 $id: http://devicetree.org/schemas/hwinfo/renesas,prr.yaml# 21 - renesas,prr 34 prr: chipid@ff000044 { 35 compatible = "renesas,prr";
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| /linux/arch/sh/kernel/cpu/sh4/ |
| H A D | probe.c | 17 unsigned long pvr, prr, cvr; in cpu_probe() local 29 prr = (__raw_readl(CCN_PRR) >> 4) & 0xff; in cpu_probe() 106 if (prr == 0x61) in cpu_probe() 108 else if (prr == 0xa1) in cpu_probe() 129 switch (prr) { in cpu_probe() 145 switch (prr) { in cpu_probe() 180 switch (prr) { in cpu_probe()
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| /linux/include/linux/ |
| H A D | adreno-smmu-priv.h | 54 * Region (PRR) bit in the ACTLR register. 56 * the physical address of PRR page passed from GPU
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| /linux/Documentation/spi/ |
| H A D | butterfly.rst | 43 (a) flash new firmware that disables SPI (set PRR.2, and disable pullups
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| /linux/drivers/gpu/drm/msm/ |
| H A D | msm_iommu.c | 600 * It appears the hw drops writes to the PRR region in msm_iommu_pagetable_create() 602 * is in the PRR page. in msm_iommu_pagetable_create()
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| H A D | msm_gem_vma.c | 34 /** @sgt: pages to map, or NULL for a PRR mapping */ 1023 ret = UERR(EINVAL, dev, "PRR not supported\n"); in lookup_op()
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| H A D | msm_gpu.c | 293 /* Skip MAP_NULL/PRR VMAs: */ in crashstate_get_bos()
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| /linux/arch/sh/mm/ |
| H A D | cache-sh4.c | 385 printk("PVR=%08x CVR=%08x PRR=%08x\n", in sh4_cache_init()
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| /linux/arch/arm/boot/dts/renesas/ |
| H A D | r8a7792.dtsi | 952 prr: chipid@ff000044 { label 953 compatible = "renesas,prr";
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| H A D | r8a77470.dtsi | 1020 prr: chipid@ff000044 { label 1021 compatible = "renesas,prr";
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| H A D | r8a7794.dtsi | 1445 prr: chipid@ff000044 { label 1446 compatible = "renesas,prr";
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| H A D | r8a7793.dtsi | 1459 prr: chipid@ff000044 { label 1460 compatible = "renesas,prr";
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| H A D | r8a7790.dtsi | 1953 prr: chipid@ff000044 { label 1954 compatible = "renesas,prr";
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| H A D | r8a7791.dtsi | 1880 prr: chipid@ff000044 { label 1881 compatible = "renesas,prr";
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| /linux/arch/arm64/boot/dts/renesas/ |
| H A D | r8a779f0.dtsi | 1290 prr: chipid@fff00044 { label 1291 compatible = "renesas,prr";
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| H A D | r8a77995.dtsi | 1454 prr: chipid@fff00044 { label 1455 compatible = "renesas,prr";
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| /linux/net/ipv4/ |
| H A D | tcp_input.c | 2741 /* The cwnd reduction in CWR and Recovery uses the PRR algorithm in RFC 6937. 2744 * 1) If the packets in flight is larger than ssthresh, PRR spreads the 2746 * 2) Otherwise PRR uses packet conservation to send as much as delivered.
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| /linux/ |
| H A D | MAINTAINERS | 3259 F: Documentation/devicetree/bindings/hwinfo/renesas,prr.yaml
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