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/linux/Documentation/ABI/testing/
H A Dsysfs-class-fpga-manager13 wrong during FPGA programming (something that the driver can't
30 * write init = preparing FPGA for programming
31 * write init error = Error while preparing FPGA for programming
33 * write error = Error while programming
34 * write complete = Doing post programming steps
35 * write complete error = Error while doing post programming
43 If FPGA programming operation fails, it could be caused by crc
46 programming errors to userspace. This is a list of strings for
/linux/Documentation/driver-api/fpga/
H A Dfpga-programming.rst1 In-kernel API for FPGA Programming
7 The in-kernel API for FPGA programming is a combination of APIs from
9 trigger FPGA programming is fpga_region_program_fpga().
31 bridges to control during programming or it has a pointer to a function that
71 /* Add info to region and do the programming */
84 API for programming an FPGA
H A Dintro.rst26 If you are adding a new FPGA or a new method of programming an FPGA,
36 region of an FPGA during programming. They are disabled before
37 programming begins and re-enabled afterwards. An FPGA bridge may be
/linux/tools/memory-model/Documentation/
H A Dreferences.txt34 Proceedings of the 32Nd ACM SIGPLAN Conference on Programming
41 ACM SIGPLAN Conference on Programming Language Design and
56 SIGPLAN-SIGACT Symposium on Principles of Programming Languages
63 Principles of Programming Languages (POPL 2017). ACM, New York,
69 Proceedings of the ACM on Programming Languages, Volume 2, Issue
92 Programming Languages and Operating Systems (ASPLOS 2018). ACM,
/linux/drivers/net/wireless/rsi/
H A Drsi_boot_params.h58 /* structure to store configs related to TAPLL programming */
64 /* structure to store configs related to PLL960 programming */
71 /* structure to store configs related to AFEPLL programming */
92 /* structure to store configs related to UMAC clk programming */
149 /* WDT programming values */
/linux/drivers/gpu/drm/amd/display/dc/dml2/dml21/
H A Ddml21_translation_helper.c1028 …context->bw_ctx.bw.dcn.clk.dispclk_khz = in_ctx->v21.mode_programming.programming->min_clocks.dcn4… in dml21_copy_clocks_to_dc_state()
1029 …context->bw_ctx.bw.dcn.clk.dcfclk_khz = in_ctx->v21.mode_programming.programming->min_clocks.dcn4x… in dml21_copy_clocks_to_dc_state()
1030 …context->bw_ctx.bw.dcn.clk.dramclk_khz = in_ctx->v21.mode_programming.programming->min_clocks.dcn4… in dml21_copy_clocks_to_dc_state()
1031 …context->bw_ctx.bw.dcn.clk.fclk_khz = in_ctx->v21.mode_programming.programming->min_clocks.dcn4x.a… in dml21_copy_clocks_to_dc_state()
1032 …context->bw_ctx.bw.dcn.clk.idle_dramclk_khz = in_ctx->v21.mode_programming.programming->min_clocks… in dml21_copy_clocks_to_dc_state()
1033 …context->bw_ctx.bw.dcn.clk.idle_fclk_khz = in_ctx->v21.mode_programming.programming->min_clocks.dc… in dml21_copy_clocks_to_dc_state()
1034 …context->bw_ctx.bw.dcn.clk.dcfclk_deep_sleep_khz = in_ctx->v21.mode_programming.programming->min_c… in dml21_copy_clocks_to_dc_state()
1035 …context->bw_ctx.bw.dcn.clk.fclk_p_state_change_support = in_ctx->v21.mode_programming.programming-… in dml21_copy_clocks_to_dc_state()
1036 …context->bw_ctx.bw.dcn.clk.p_state_change_support = in_ctx->v21.mode_programming.programming->uclk… in dml21_copy_clocks_to_dc_state()
1037 …context->bw_ctx.bw.dcn.clk.dtbclk_en = in_ctx->v21.mode_programming.programming->min_clocks.dcn4x.… in dml21_copy_clocks_to_dc_state()
[all …]
H A Ddml21_wrapper.h48 * programming for the new dc_state.
60 /* Prepare hubp mcache_regs for hubp mcache ID and split coordinate programming */
/linux/drivers/net/ethernet/intel/i40e/
H A Di40e_txrx_common.h87 * i40e_rx_is_programming_status - check for programming status descriptor
91 * is a programming status descriptor for flow director or FCoE
97 /* The Rx filter programming status and SPH bit occupy the same in i40e_rx_is_programming_status()
100 * programming status descriptor. in i40e_rx_is_programming_status()
/linux/Documentation/driver-api/soundwire/
H A Derror_handling.rst16 Improvements could be invalidating an entire programming sequence and
22 that bus clashes due to programming errors (two streams using the same bit
34 be applied. In case of a bad programming (command sent to non-existent
38 backtracking and restarting the entire programming sequence might be a
/linux/Documentation/misc-devices/
H A Dc2port.rst26 C2 Interface used for in-system programming of micro controllers.
38 - AN127: FLASH Programming via the C2 Interface at
45 banging) designed to enable in-system programming, debugging, and
47 this code supports only flash programming but extensions are easy to
/linux/drivers/gpu/drm/i915/display/
H A Dintel_dmc_wl.c17 * states to allow programming to registers that are powered down in
19 * detecting programming. Now software controls the exit by
20 * programming the wake lock. This improves system performance and
22 * programming. Wake lock is only required when DC5, DC6, or DC6v have
27 * states explicitly before programming registers that may be powered
/linux/drivers/misc/c2port/
H A Dcore.c497 /* Target the C2 flash programming control register for C2 data in __c2port_store_flash_access()
501 /* Write the first keycode to enable C2 Flash programming */ in __c2port_store_flash_access()
506 /* Write the second keycode to enable C2 Flash programming */ in __c2port_store_flash_access()
512 * C2 flash programming */ in __c2port_store_flash_access()
535 dev_err(c2dev->dev, "cannot enable %s flash programming\n", in c2port_store_flash_access()
550 /* Target the C2 flash programming data register for C2 data register in __c2port_write_flash_erase()
570 /* Read flash programming interface status */ in __c2port_write_flash_erase()
644 /* Target the C2 flash programming data register for C2 data register in __c2port_read_flash_data()
663 /* Read flash programming interface status */ in __c2port_read_flash_data()
695 /* Read flash programming interface status */ in __c2port_read_flash_data()
[all …]
/linux/drivers/gpu/drm/
H A Ddrm_vblank_work.c18 * simply do said time-sensitive programming in the driver's IRQ handler,
21 * time-critical programming independently of the CPU.
24 * doesn't need to be concerned with extremely time-sensitive programming,
26 * hardware may require that certain time-sensitive programming be handled
27 * completely by the CPU, and said programming may even take too long to
41 * time-sensitive hardware programming on time, even when the system is under
/linux/include/soc/at91/
H A Dsama7-ddr.h73 #define UDDRC_SWCTRL (0x320) /* UDDRC Software Register Programming Control Enable */
74 #define UDDRC_SWCTRL_SW_DONE (1 << 0) /* Enable quasi-dynamic register programming outside reset …
76 #define UDDRC_SWSTAT (0x324) /* UDDRC Software Register Programming Control Status */
77 #define UDDRC_SWSTAT_SW_DONE_ACK (1 << 0) /* Register programming done */
/linux/Documentation/process/
H A Dkernel-docs.rst63 * Title: **The Linux Kernel Module Programming Guide**
72 programming. Lots of examples. Currently the new version is being
107 …* Title: **Linux Kernel Programming: A Comprehensive Guide to Kernel Internals, Writing Kernel Mod…
115 …* Title: **Linux Kernel Programming Part 2 - Char Device Drivers and Kernel Synchronization: Creat…
123 * Title: **Linux System Programming: Talking Directly to the Kernel and C Library**
H A Dprogramming-language.rst3 Programming Language
6 The kernel is written in the C programming language [c-language]_.
37 The kernel has experimental support for the Rust programming language
/linux/drivers/ata/
H A Dpata_optidma.c164 /* Commence primary programming sequence */ in optidma_mode_setup()
178 /* Programming sequence complete, timing 0 dev 0, timing 1 dev 1 */ in optidma_mode_setup()
184 /* Note: at this point our programming is incomplete. We are in optidma_mode_setup()
235 * DMA programming. The architecture of the Firestar makes it easier
250 * DMA programming. The architecture of the Firestar makes it easier
265 * DMA programming. The architecture of the Firestar makes it easier
280 * DMA programming. The architecture of the Firestar makes it easier
/linux/drivers/gpu/drm/amd/display/dc/dml2/
H A Ddisplay_mode_core_structs.h600 …/ <brief ODM mode that is chosen in the mode check stage and will be used in mode programming stage
618 struct dml_hw_resource_st hw; //< brief for mode programming
621 /// @brief To control the clk usage for model programming
632 /// @brief DML mode evaluation and programming policy
633 /// Those knobs that affect mode support and mode programming
646 … support the given display configuration. User can tell use the output DCFCLK for mode programming.
668 …t immediate flip at the max combine setting; determine in mode support and used in mode programming
735 …/ <brief ODM mode that is chosen in the mode check stage and will be used in mode programming stage
764 // Physical info; only using for programming
948 /// @brief A mega structure that houses various info for model programming step.
[all …]
/linux/Documentation/input/
H A Dinput_kapi.rst12 input-programming
13 gameport-programming
/linux/tools/perf/Documentation/
H A Dperf-list.txt98 section of the [AMD Processor Programming Reference (PPR)] relevant to the
101 Manual Volume 2: System Programming, 13.3 Instruction-Based
114 layout of IA32_PERFEVTSELx MSRs (see [Intel® 64 and IA-32 Architectures Software Developer's Manual Volume 3B: System Programming Guide] Figure 30-1 Layout
117 [AMD Processor Programming Reference (PPR)] relevant to the family, model
368 http://www.intel.com/sdm/[Intel® 64 and IA-32 Architectures Software Developer's Manual Volume 3B: System Programming Guide],
369 https://bugzilla.kernel.org/show_bug.cgi?id=206537[AMD Processor Programming Reference (PPR)]
/linux/Documentation/devicetree/bindings/phy/
H A Dcalxeda-combophy.yaml14 Programming the PHYs is typically handled by those device drivers,
31 description: device ID for programming the ComboPHY.
/linux/drivers/gpu/drm/amd/display/dc/dce/
H A DMakefile24 # HW object file under this folder follow similar pattern for HW programming
26 # - register programming through common macros that look up register
/linux/drivers/fpga/
H A Dof-fpga-region.c3 * FPGA Region - Device Tree support for FPGA programming under Linux
211 * not been added to the live tree yet is doing FPGA programming). in of_fpga_region_parse_ov()
250 /* If overlay is not programming the FPGA, don't need FPGA image info */ in of_fpga_region_parse_ov()
341 * This notifier handles programming an FPGA when a "firmware-name" property is
344 * Return: NOTIFY_OK or error if FPGA programming fails.
/linux/tools/testing/selftests/powerpc/pmu/event_code_tests/
H A Dinvalid_event_code_test.c23 * whereas in power10, these are used for programming
26 * whereas it is used for programming "radix_scope_qual"
/linux/Documentation/trace/coresight/
H A Dcoresight-ect.rst30 The CTI driver enables the programming of the CTI to attach triggers to
38 programming registers in the CTI.
89 * ``channels``: Contains the channel API - CTI main programming interface.
189 * ``chan_xtrigs_reset``: Write 1 to clear all channel / trigger programming.

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