/linux/Documentation/ABI/testing/ |
H A D | sysfs-class-fpga-manager | 13 wrong during FPGA programming (something that the driver can't 30 * write init = preparing FPGA for programming 31 * write init error = Error while preparing FPGA for programming 33 * write error = Error while programming 34 * write complete = Doing post programming steps 35 * write complete error = Error while doing post programming 43 If FPGA programming operation fails, it could be caused by crc 46 programming errors to userspace. This is a list of strings for
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/linux/drivers/gpu/drm/amd/display/dc/dml2/dml21/ |
H A D | dml21_wrapper.c | 33 …(*dml_ctx)->v21.mode_programming.programming = vzalloc(sizeof(struct dml2_display_cfg_programming)… in dml21_allocate_memory() 34 if (!((*dml_ctx)->v21.mode_programming.programming)) in dml21_allocate_memory() 122 vfree(dml2->v21.mode_programming.programming); in dml21_destroy() 139 …memcpy(&context->bw_ctx.bw.dcn.arb_regs, &in_ctx->v21.mode_programming.programming->global_regs.ar… in dml21_calculate_rq_and_dlg_params() 142 …context->bw_ctx.bw.dcn.compbuf_size_kb = (int)in_ctx->v21.mode_programming.programming->global_reg… in dml21_calculate_rq_and_dlg_params() 149 dml_phantom_prog_idx = in_ctx->v21.mode_programming.programming->display_config.num_planes; in dml21_calculate_rq_and_dlg_params() 152 pln_prog = &in_ctx->v21.mode_programming.programming->plane_programming[dml_prog_idx]; in dml21_calculate_rq_and_dlg_params() 157 …stream_prog = &in_ctx->v21.mode_programming.programming->stream_programming[pln_prog->plane_descri… in dml21_calculate_rq_and_dlg_params() 225 pln_prog = &dml_ctx->v21.mode_programming.programming->plane_programming[dml_prog_idx]; in dml21_prepare_mcache_params() 321 …_mode_programming_locals.mode_programming_params.programming = dml_ctx->v21.mode_programming.progr… in dml21_check_mode_support() [all …]
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H A D | dml21_translation_helper.c | 729 // Placeholder for programming the array_mode in populate_dml21_surface_config_from_plane_state() 1084 …context->bw_ctx.bw.dcn.clk.dispclk_khz = in_ctx->v21.mode_programming.programming->min_clocks.dcn4… in dml21_copy_clocks_to_dc_state() 1085 …context->bw_ctx.bw.dcn.clk.dcfclk_khz = in_ctx->v21.mode_programming.programming->min_clocks.dcn4x… in dml21_copy_clocks_to_dc_state() 1086 …context->bw_ctx.bw.dcn.clk.dramclk_khz = in_ctx->v21.mode_programming.programming->min_clocks.dcn4… in dml21_copy_clocks_to_dc_state() 1087 …context->bw_ctx.bw.dcn.clk.fclk_khz = in_ctx->v21.mode_programming.programming->min_clocks.dcn4x.a… in dml21_copy_clocks_to_dc_state() 1088 …context->bw_ctx.bw.dcn.clk.idle_dramclk_khz = in_ctx->v21.mode_programming.programming->min_clocks… in dml21_copy_clocks_to_dc_state() 1089 …context->bw_ctx.bw.dcn.clk.idle_fclk_khz = in_ctx->v21.mode_programming.programming->min_clocks.dc… in dml21_copy_clocks_to_dc_state() 1090 …context->bw_ctx.bw.dcn.clk.dcfclk_deep_sleep_khz = in_ctx->v21.mode_programming.programming->min_c… in dml21_copy_clocks_to_dc_state() 1091 …context->bw_ctx.bw.dcn.clk.fclk_p_state_change_support = in_ctx->v21.mode_programming.programming-… in dml21_copy_clocks_to_dc_state() 1092 …context->bw_ctx.bw.dcn.clk.p_state_change_support = in_ctx->v21.mode_programming.programming->uclk… in dml21_copy_clocks_to_dc_state() [all …]
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/linux/Documentation/driver-api/fpga/ |
H A D | fpga-programming.rst | 1 In-kernel API for FPGA Programming 7 The in-kernel API for FPGA programming is a combination of APIs from 9 trigger FPGA programming is fpga_region_program_fpga(). 31 bridges to control during programming or it has a pointer to a function that 71 /* Add info to region and do the programming */ 84 API for programming an FPGA
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H A D | intro.rst | 26 If you are adding a new FPGA or a new method of programming an FPGA, 36 region of an FPGA during programming. They are disabled before 37 programming begins and re-enabled afterwards. An FPGA bridge may be
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/linux/tools/memory-model/Documentation/ |
H A D | references.txt | 34 Proceedings of the 32Nd ACM SIGPLAN Conference on Programming 41 ACM SIGPLAN Conference on Programming Language Design and 55 SIGPLAN-SIGACT Symposium on Principles of Programming Languages 62 Principles of Programming Languages (POPL 2017). ACM, New York, 68 Proceedings of the ACM on Programming Languages, Volume 2, Issue 91 Programming Languages and Operating Systems (ASPLOS 2018). ACM,
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/linux/drivers/net/wireless/rsi/ |
H A D | rsi_boot_params.h | 58 /* structure to store configs related to TAPLL programming */ 64 /* structure to store configs related to PLL960 programming */ 71 /* structure to store configs related to AFEPLL programming */ 92 /* structure to store configs related to UMAC clk programming */ 149 /* WDT programming values */
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/linux/drivers/net/ethernet/intel/i40e/ |
H A D | i40e_txrx_common.h | 87 * i40e_rx_is_programming_status - check for programming status descriptor 91 * is a programming status descriptor for flow director or FCoE 97 /* The Rx filter programming status and SPH bit occupy the same in i40e_rx_is_programming_status() 100 * programming status descriptor. in i40e_rx_is_programming_status()
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/linux/Documentation/driver-api/soundwire/ |
H A D | error_handling.rst | 16 Improvements could be invalidating an entire programming sequence and 22 that bus clashes due to programming errors (two streams using the same bit 34 be applied. In case of a bad programming (command sent to non-existent 38 backtracking and restarting the entire programming sequence might be a
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/linux/Documentation/misc-devices/ |
H A D | c2port.rst | 26 C2 Interface used for in-system programming of micro controllers. 38 - AN127: FLASH Programming via the C2 Interface at 45 banging) designed to enable in-system programming, debugging, and 47 this code supports only flash programming but extensions are easy to
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/linux/include/soc/at91/ |
H A D | sama7-ddr.h | 73 #define UDDRC_SWCTRL (0x320) /* UDDRC Software Register Programming Control Enable */ 74 #define UDDRC_SWCTRL_SW_DONE (1 << 0) /* Enable quasi-dynamic register programming outside reset … 76 #define UDDRC_SWSTAT (0x324) /* UDDRC Software Register Programming Control Status */ 77 #define UDDRC_SWSTAT_SW_DONE_ACK (1 << 0) /* Register programming done */
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/linux/drivers/ata/ |
H A D | pata_optidma.c | 164 /* Commence primary programming sequence */ in optidma_mode_setup() 178 /* Programming sequence complete, timing 0 dev 0, timing 1 dev 1 */ in optidma_mode_setup() 184 /* Note: at this point our programming is incomplete. We are in optidma_mode_setup() 235 * DMA programming. The architecture of the Firestar makes it easier 250 * DMA programming. The architecture of the Firestar makes it easier 265 * DMA programming. The architecture of the Firestar makes it easier 280 * DMA programming. The architecture of the Firestar makes it easier
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/linux/drivers/fpga/tests/ |
H A D | fpga-region-test.c | 62 * of programming cycles. The internals of the programming sequence are 114 * FPGA Region programming test. The Region must call get_bridges() to get 115 * and control the bridges, and then the Manager for the actual programming.
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/linux/Documentation/process/ |
H A D | programming-language.rst | 3 Programming Language 6 The kernel is written in the C programming language [c-language]_. 37 The kernel has experimental support for the Rust programming language
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/linux/Documentation/input/ |
H A D | input_kapi.rst | 12 input-programming 13 gameport-programming
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/linux/Documentation/devicetree/bindings/iommu/ |
H A D | arm,smmu.yaml | 313 through the TCU's programming interface. 325 through the TCU's programming interface. 327 through the TCU's programming interface. 355 through the TCU's programming interface. 368 through the TCU's programming interface. 370 through the TCU's programming interface. 394 through the TCU's programming interface. 451 through the TCU's programming interface.
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/linux/Documentation/devicetree/bindings/phy/ |
H A D | calxeda-combophy.yaml | 14 Programming the PHYs is typically handled by those device drivers, 31 description: device ID for programming the ComboPHY.
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/linux/drivers/gpu/drm/amd/display/dc/dce/ |
H A D | dce_audio.c | 780 /* those are unsupported, skip programming */ in dce_aud_az_configure() 1074 /*DTO0 Programming goal: in dce_aud_wall_dto_setup() 1094 programming DTO modulo and DTO phase. These bits must be in dce_aud_wall_dto_setup() 1097 Caution when changing this programming sequence. in dce_aud_wall_dto_setup() 1114 /*DTO1 Programming goal: in dce_aud_wall_dto_setup() 1126 /* Program DTO select before programming DTO modulo and DTO in dce_aud_wall_dto_setup() 1166 /*DTO0 Programming goal: in dce60_aud_wall_dto_setup() 1186 programming DTO modulo and DTO phase. These bits must be in dce60_aud_wall_dto_setup() 1189 Caution when changing this programming sequence. in dce60_aud_wall_dto_setup() 1206 /*DTO1 Programming goal: in dce60_aud_wall_dto_setup() [all …]
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H A D | Makefile | 24 # HW object file under this folder follow similar pattern for HW programming 26 # - register programming through common macros that look up register
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/linux/tools/testing/selftests/powerpc/pmu/event_code_tests/ |
H A D | invalid_event_code_test.c | 23 * whereas in ISA v3.1, these are used for programming 26 * whereas it is used for programming "radix_scope_qual"
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/linux/Documentation/trace/coresight/ |
H A D | coresight-ect.rst | 30 The CTI driver enables the programming of the CTI to attach triggers to 38 programming registers in the CTI. 89 * ``channels``: Contains the channel API - CTI main programming interface. 189 * ``chan_xtrigs_reset``: Write 1 to clear all channel / trigger programming.
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H A D | coresight-config.rst | 14 programming of the CoreSight system with pre-defined configurations that 32 A feature is a named set of programming for a CoreSight device. The programming 61 parameter is used in programming the device.
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H A D | coresight-etm4x-reference.rst | 2 ETMv4 sysfs linux driver programming reference. 26 in this will cause equivalent programming of trace config and 42 Reset all programming to trace nothing / no logic programmed. 622 *Note:* When programming any address comparator the driver will tag the 638 To remove programming on all the comparators (and all the other hardware) use 817 Once the reset parameter has been used, and/or custom programming has been
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/linux/Documentation/driver-api/ |
H A D | i2c.rst | 16 The Linux I2C programming interfaces support the master side of bus 17 interactions and the slave side. The programming interface is
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/linux/Documentation/devicetree/bindings/clock/ |
H A D | keystone-pll.txt | 46 - bit-mask : arbitrary bitmask for programming the mux 68 - bit-mask : arbitrary bitmask for programming the divider
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