Home
last modified time | relevance | path

Searched +full:primecell +full:- +full:periphid (Results 1 – 25 of 41) sorted by relevance

12

/freebsd/sys/contrib/device-tree/src/arm/arm/
H A Dintegratorap.dts1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
13 compatible = "arm,integrator-ap";
16 #address-cells = <1>;
17 #size-cells = <0>;
27 /* compatible = "arm,arm926ej-s"; */
30 * The documentation in ARM DUI 0138E page 3-12 states
32 * but painful trial-and-error has proved to me that it
[all …]
H A Dmps2.dtsi6 * This file is dual-licensed: you can use it either under the terms
45 #include "../armv7-m.dtsi"
48 #address-cells = <1>;
49 #size-cells = <1>;
51 oscclk0: clock-50000000 {
52 compatible = "fixed-clock";
53 #clock-cells = <0>;
54 clock-frequency = <50000000>;
57 oscclk1: clock-24576000 {
58 compatible = "fixed-clock";
[all …]
/freebsd/sys/contrib/device-tree/src/arm/qcom/
H A Dqcom-msm8660.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/interrupt-controller/irq.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/clock/qcom,gcc-msm8660.h>
7 #include <dt-bindings/soc/qcom,gsbi.h>
10 #address-cells = <1>;
11 #size-cells = <1>;
14 interrupt-parent = <&intc>;
17 #address-cells = <1>;
[all …]
H A Dqcom-mdm9615.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
9 /dts-v1/;
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/clock/qcom,gcc-mdm9615.h>
13 #include <dt-bindings/clock/qcom,lcc-msm8960.h>
14 #include <dt-bindings/reset/qcom,gcc-mdm9615.h>
15 #include <dt-bindings/mfd/qcom-rpm.h>
16 #include <dt-bindings/soc/qcom,gsbi.h>
19 #address-cells = <1>;
20 #size-cells = <1>;
[all …]
H A Dqcom-msm8960.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/clock/qcom,gcc-msm8960.h>
6 #include <dt-bindings/reset/qcom,gcc-msm8960.h>
7 #include <dt-bindings/clock/qcom,lcc-msm8960.h>
8 #include <dt-bindings/mfd/qcom-rpm.h>
9 #include <dt-bindings/soc/qcom,gsbi.h>
12 #address-cells = <1>;
13 #size-cells = <1>;
[all …]
H A Dqcom-apq8064.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/clock/qcom,gcc-msm8960.h>
5 #include <dt-bindings/clock/qcom,lcc-msm8960.h>
6 #include <dt-bindings/reset/qcom,gcc-msm8960.h>
7 #include <dt-bindings/clock/qcom,mmcc-msm8960.h>
8 #include <dt-bindings/clock/qcom,rpmcc.h>
9 #include <dt-bindings/soc/qcom,gsbi.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
[all …]
/freebsd/sys/contrib/device-tree/src/arm/st/
H A Dste-href.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright 2012 ST-Ericsson AB
6 #include <dt-bindings/interrupt-controller/irq.h>
7 #include <dt-bindings/leds/common.h>
8 #include "ste-hre
[all...]
H A Dste-snowball.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright 2011 ST-Ericsson AB
6 /dts-v1/;
7 #include "ste-db9500.dtsi"
8 #include "ste-href-ab850
[all...]
H A Dste-ux500-samsung-golden.dts1 // SPDX-License-Identifier: GPL-2.0-only
2 /dts-v1/;
4 #include "ste-db8500.dtsi"
5 #include "ste-ab8505.dtsi"
6 #include "ste-dbx5x0-pinctrl.dtsi"
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/leds/common.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
14 * You need an intermediate, device-tree compatible bootloader
[all …]
H A Dste-ux500-samsung-skomer.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Devicetree for the Samsung XCover 2 GT-S7710 also known as Skomer.
6 /dts-v1/;
7 #include "ste-db8500.dtsi"
8 #include "ste-ab8505.dtsi"
9 #include "ste-dbx5x0-pinctrl.dtsi"
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/leds/common.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
[all …]
H A Dste-ux500-samsung-kyle.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Devicetree for the Samsung Galaxy Amp SGH-I407 also known as Kyle.
10 /dts-v1/;
11 #include "ste-db8500.dtsi"
12 #include "ste-ab8505.dtsi"
13 #include "ste-dbx5x0-pinctr
[all...]
H A Dste-ux500-samsung-codina-tmo.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Devicetree for the Samsung Galaxy Exhibit SGH-T599 also known as Codina-TMO,
4 * the "TMO" shall be read "T-Mobile" as this phone was produced exlusively
5 * for T-Mobile in the United States.
8 * - No CPU speed cap, full ~1GHz rate
9 * - Differen
[all...]
H A Dstm32f746.dtsi2 * Copyright 2015 - Maxime Coquelin <mcoquelin.stm32@gmail.com>
4 * This file is dual-licensed: you can use it either under the terms
43 #include "../armv7-m.dtsi"
44 #include <dt-bindings/clock/stm32fx-clock.h>
45 #include <dt-bindings/mfd/stm32f7-rcc.h>
48 #address-cells = <1>;
49 #size-cells = <1>;
52 clk_hse: clk-hse {
53 #clock-cells = <0>;
54 compatible = "fixed-clock";
[all …]
/freebsd/sys/contrib/device-tree/Bindings/arm/
H A Dprimecell.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/arm/primecell.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ARM Primecell Peripherals
10 - Rob Herring <robh@kernel.org>
13 ARM, Ltd. Primecell peripherals have a standard id register that can be used to
20 const: arm,primecell
22 Should be a specific name for the peripheral followed by "arm,primecell".
26 arm,primecell-periphid:
[all …]
/freebsd/sys/contrib/device-tree/src/riscv/starfive/
H A Djh7110.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
7 /dts-v1/;
8 #include <dt-bindings/clock/starfive,jh7110-crg.h>
9 #include <dt-bindings/power/starfive,jh7110-pmu.h>
10 #include <dt-bindings/reset/starfive,jh7110-crg.h>
11 #include <dt-bindings/thermal/thermal.h>
15 #address-cells = <2>;
16 #size-cells = <2>;
19 #address-cells = <1>;
20 #size-cells = <0>;
[all …]
/freebsd/sys/contrib/device-tree/Bindings/dma/
H A Darm-pl08x.txt4 - compatible: "arm,pl080", "arm,primecell";
5 "arm,pl081", "arm,primecell";
6 "faraday,ftdmac020", "arm,primecell"
7 - arm,primecell-periphid: on the FTDMAC020 the primecell ID is not hard-coded
9 follows the PrimeCell standard numbering using the JEP106 vendor code 0x38
11 - reg: Address range of the PL08x registers
12 - interrupt: The PL08x interrupt number
13 - clocks: The clock running the IP core clock
14 - clock-names: Must contain "apb_pclk"
15 - lli-bus-interface-ahb1: if AHB master 1 is eligible for fetching LLIs
[all …]
H A Darm-pl08x.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/arm-pl08x.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Vinod Koul <vkoul@kernel.org>
13 - $ref: /schemas/arm/primecell.yaml#
14 - $ref: dma-controller.yaml#
16 # We need a select here so we don't match all nodes with 'arm,primecell'
22 - arm,pl080
23 - arm,pl081
[all …]
H A Dlpc1850-dmamux.txt4 - compatible: "nxp,lpc1850-dmamux"
5 - reg: Memory map for accessing module
6 - #dma-cells: Should be set to <3>.
8 * 2nd cell contain the mux value (0-3) for the peripheral
11 - dma-requests: Number of DMA requests for the mux
12 - dma-masters: phandle pointing to the DMA controller
15 - dma-requests: Number of DMA requests the controller can handle
20 compatible = "nxp,lpc1850-gpdma", "arm,pl080", "arm,primecell";
21 arm,primecell-periphid = <0x00041080>;
25 clock-names = "apb_pclk";
[all …]
/freebsd/sys/contrib/device-tree/src/arm/cirrus/
H A Dep93xx.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/leds/common.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/clock/cirrus,ep9301-syscon.h>
11 compatible = "simple-bus";
13 #address-cells = <1>;
14 #size-cells = <1>;
17 compatible = "cirrus,ep9301-syscon", "syscon";
20 #clock-cells = <1>;
[all …]
/freebsd/sys/dev/uart/
H A Duart_dev_pl011.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
145 * FIXME: actual register size is SoC-dependent, we need to handle it
148 bus_space_read_4((bas)->bst, (bas)->bsh, uart_regofs(bas, reg))
150 bus_space_write_4((bas)->bst, (bas)->bsh, uart_regofs(bas, reg), value)
153 * Low-level UART interface.
177 * this tabel. The PL011 IP is always 32-bits wide and should be shifted in uart_pl011_probe()
178 * 2 to match the 4-byte size of the data. QEMU reported these values in uart_pl011_probe()
191 if (bas->regshft == 0 || bas->regiowidth == 1) { in uart_pl011_probe()
192 bas->regshft = 2; in uart_pl011_probe()
[all …]
/freebsd/sys/contrib/device-tree/Bindings/mmc/
H A Dmmci.txt1 * ARM PrimeCell MultiMedia Card Interface (MMCI) PL180/1
3 The ARM PrimeCell MMCI PL180 and PL181 provides an interface for
11 - compatible : contains "arm,pl18x", "arm,primecell".
12 - vmmc-supply : phandle to the regulator device tree node, mentioned
16 - arm,primecell-periphid : contains the PrimeCell Peripheral ID, it overrides
18 - resets : phandle to internal reset line.
20 - vqmmc-supply : phandle to the regulator device tree node, mentioned
23 - st,sig-dir-dat0 : bus signal direction pin used for DAT[0].
24 - st,sig-dir-dat2 : bus signal direction pin used for DAT[2].
25 - st,sig-dir-dat31 : bus signal direction pin used for DAT[3] and DAT[1].
[all …]
H A Darm,pl18x.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ARM PrimeCell MultiMedia Card Interface (MMCI) PL180 and PL181
10 - Linus Walleij <linus.walleij@linaro.org>
11 - Ulf Hansson <ulf.hansson@linaro.org>
20 - $ref: /schemas/arm/primecell.yaml#
21 - $ref: mmc-controller.yaml#
23 # We need a select here so we don't match all nodes with 'arm,primecell'
29 - arm,pl180
[all …]
/freebsd/sys/contrib/device-tree/src/arm/nxp/imx/
H A Dimx7d.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
7 #include <dt-bindings/reset/imx7-reset.h>
18 clock-frequency = <996000000>;
19 operating-points-v2 = <&cpu0_opp_table>;
20 #cooling-cells = <2>;
21 nvmem-cell
[all...]
/freebsd/sys/contrib/device-tree/src/arm/broadcom/
H A Dbcm2711.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/soc/bcm2835-pm.h>
10 #address-cells = <2>;
11 #size-cells = <1>;
13 interrupt-parent = <&gicv2>;
16 compatible = "brcm,bcm2711-vc5";
20 clk_27MHz: clk-27M {
21 #clock-cells = <0>;
22 compatible = "fixed-clock";
[all …]
/freebsd/sys/contrib/device-tree/src/arm/hisilicon/
H A Dhisi-x5hd2.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2013-2014 Linaro Ltd.
4 * Copyright (c) 2013-2014 HiSilicon Limited.
7 #include <dt-bindings/clock/hix5hd2-clock.h>
10 #address-cells = <1>;
11 #size-cells = <1>;
17 gic: interrupt-controller@f8a01000 {
18 compatible = "arm,cortex-a9-gic";
19 #interrupt-cells = <3>;
20 #address-cells = <0>;
[all …]

12