/linux/Documentation/core-api/kho/bindings/ |
H A D | kho.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 7 - Mike Rapoport <rppt@kernel.org> 8 - Changyuan Lyu <changyuanl@google.com> 11 System memory preserved by KHO across kexec. 16 - kho-v1 18 preserved-memory-map: 20 physical address (u64) of an in-memory structure describing all preserved 21 folios and memory ranges. 24 "$[0-9a-f_]+^": [all …]
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/linux/Documentation/core-api/kho/ |
H A D | fdt.rst | 1 .. SPDX-License-Identifier: GPL-2.0-or-later 10 It includes the physical address of an in-memory structure describing 11 all preserved memory regions, as well as physical addresses of KHO users' 17 Property ``preserved-memory-map`` 18 --------------------------------- 20 KHO saves a special property named ``preserved-memory-map`` under the root node. 21 This node contains the physical address of an in-memory structure for KHO to 22 preserve memory regions across kexec. 25 ----------------------- 33 ---------------- [all …]
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/linux/kernel/ |
H A D | kexec_handover.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * kexec_handover.c - kexec handover metadata processing 20 #include <linux/page-isolation.h> 31 #define KHO_FDT_COMPATIBLE "kho-v1" 32 #define PROP_PRESERVED_MEMORY_MAP "preserved-memory-map" 50 * Keep track of memory that is to be preserved across KHO. 52 * The serializing side uses two levels of xarrays to manage chunks of per-order 55 * each bitmap will cover 16M of address space. Thus, for 16G of memory at most 56 * 512K of bitmap memory will be needed for order 0. 90 /* First chunk of serialized preserved memory map */ [all …]
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/linux/Documentation/mm/ |
H A D | remap_file_pages.rst | 7 nonsequential order in memory. The advantage of using remap_file_pages() 9 require the kernel to create additional VMA (Virtual Memory Area) data 12 Supporting of nonlinear mapping requires significant amount of non-trivial 13 code in kernel virtual memory subsystem including hot paths. Also to get 21 on 32-bit systems to map files bigger than can linearly fit into 32-bit 22 virtual address space. This use-case is not critical anymore since 64-bit 27 work slower for rare users of remap_file_pages() but ABI is preserved.
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/linux/arch/loongarch/kernel/ |
H A D | efi.c | 1 // SPDX-License-Identifier: GPL-2.0 8 * Copyright (C) 2020-2022 Loongson Technology Corporation Limited 13 #include <linux/efi-bgrt.h> 54 if (!efi_enabled(EFI_BOOT) || !efi_systab->runtime) in efi_runtime_init() 62 efi.runtime = (efi_runtime_services_t *)efi_systab->runtime; in efi_runtime_init() 63 efi.runtime_version = (unsigned int)efi.runtime->hdr.revision; in efi_runtime_init() 91 pr_err("Could not map screen_info config table\n"); in init_screen_info() 116 efi_systab_report_header(&efi_systab->hdr, efi_systab->fw_vendor); in efi_init() 119 efi_nr_tables = efi_systab->nr_tables; in efi_init() 120 efi_config_table = (unsigned long)efi_systab->tables; in efi_init() [all …]
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/linux/arch/s390/boot/ |
H A D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0 3 # Makefile for the linux s390-specific parts of the memory manager. 18 CC_FLAGS_MARCH_MINIMUM := -march=z10 20 KBUILD_AFLAGS := $(filter-out $(CC_FLAGS_MARCH),$(KBUILD_AFLAGS_DECOMPRESSOR)) 21 KBUILD_CFLAGS := $(filter-out $(CC_FLAGS_MARCH),$(KBUILD_CFLAGS_DECOMPRESSOR)) 22 KBUILD_AFLAGS += $(CC_FLAGS_MARCH_MINIMUM) -D__DISABLE_EXPORTS 23 KBUILD_CFLAGS += $(CC_FLAGS_MARCH_MINIMUM) -D__DISABLE_EXPORTS 25 CFLAGS_sclp_early_core.o += -I$(srctree)/drivers/s390/char 27 obj-y := head.o als.o startup.o physmem_info.o ipl_parm.o ipl_report.o vmem.o 28 obj-y += string.o ebcdic.o sclp_early_core.o mem.o ipl_vmparm.o cmdline.o [all …]
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H A D | startup.c | 1 // SPDX-License-Identifier: GPL-2.0 5 #include <asm/page-states.h> 42 u64 __bootdata_preserved(clock_comparator_max) = -1UL; 50 boot_emerg(" -- System halted\n"); in error() 60 /* Check current-configuration-level */ in detect_machine_type() 65 /* Get virtual-machine cpu information. */ in detect_machine_type() 66 if (stsi(vmms, 3, 2, 2) || !vmms->count) in detect_machine_type() 69 if (!memcmp(vmms->vm[0].cpi, "\xd2\xe5\xd4", 3)) in detect_machine_type() 71 else if (!memcmp(vmms->vm[0].cpi, "\xa9\x61\xe5\xd4", 4)) in detect_machine_type() 102 : "cc", "memory"); in detect_diag9c() [all …]
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/linux/Documentation/devicetree/bindings/reserved-memory/ |
H A D | ramoops.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/reserved-memory/ramoops.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 recovered after a reboot. This is a child-node of "/reserved-memory", and 16 as kernel log messages, or for optional ECC error-correction data. The total 23 At least one of "record-size", "console-size", "ftrace-size", or "pmsg-size" 24 must be set non-zero, but are otherwise optional as listed below. 27 - Kees Cook <keescook@chromium.org> 30 - $ref: reserved-memory.yaml [all …]
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/linux/arch/arm64/kernel/ |
H A D | relocate_kernel.S | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 29 * arm64_relocate_new_kernel - Put a 2nd stage image in place and boot it. 31 * The memory that the old kernel occupies may be overwritten when copying the 37 * safe memory that has been set up to be preserved during the copy operation. 51 ldr x17, [x0, #KIMAGE_ARCH_TTBR1] /* x17 = linear map copy */ 55 break_before_make_ttbr_switch x18, x17, x1, x2 /* set linear map */
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/linux/arch/arm/kernel/ |
H A D | head.S | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 5 * Copyright (C) 1994-2002 Russell King 9 * Kernel startup code for all 32-bit CPUs 19 #include <asm/asm-offsets.h> 48 .equ swapper_pg_dir, KERNEL_RAM_VADDR - PG_DIR_SIZE 74 * --------------------------- 77 * are: MMU = off, D-cache = off, I-cache = dont care, r0 = 0, 83 * See linux/arch/arm/tools/mach-types for the complete list of machine 87 * crap here - that's what the boot loader (or in extreme, well justified 97 THUMB( bx r9 ) @ If this is a Thumb-2 kernel, [all …]
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/linux/drivers/gpu/drm/nouveau/include/nvkm/core/ |
H A D | memory.h | 1 /* SPDX-License-Identifier: MIT */ 15 NVKM_MEM_TARGET_INST_SR_LOST, /* instance memory - not preserved across suspend */ 16 NVKM_MEM_TARGET_INST, /* instance memory */ 17 NVKM_MEM_TARGET_VRAM, /* video memory */ 18 NVKM_MEM_TARGET_HOST, /* coherent system memory */ 19 NVKM_MEM_TARGET_NCOH, /* non-coherent system memory */ 39 int (*map)(struct nvkm_memory *, u64 offset, struct nvkm_vmm *, member 60 #define nvkm_memory_target(p) (p)->func->target(p) 61 #define nvkm_memory_page(p) (p)->func->page(p) 62 #define nvkm_memory_bar2(p) (p)->func->bar2(p) [all …]
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/linux/Documentation/arch/x86/x86_64/ |
H A D | mm.rst | 1 .. SPDX-License-Identifier: GPL-2.0 4 Memory Management 7 Complete virtual memory map with 4-level page tables 12 - Negative addresses such as "-23 TB" are absolute addresses in bytes, counted down 13 from the top of the 64-bit address space. It's easier to understand the layout 14 when seen both in absolute addresses and in distance-from-top notation. 16 For example 0xffffe90000000000 == -23 TB, it's 23 TB lower than the top of the 17 64-bit address space (ffffffffffffffff). 22 - "16M TB" might look weird at first sight, but it's an easier way to visualize size 24 It also shows it nicely how incredibly large 64-bit address space is. [all …]
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/linux/Documentation/locking/ |
H A D | locktypes.rst | 1 .. SPDX-License-Identifier: GPL-2.0 15 - Sleeping locks 16 - CPU local locks 17 - Spinning locks 27 -------------- 39 - mutex 40 - rt_mutex 41 - semaphore 42 - rw_semaphore 43 - ww_mutex [all …]
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/linux/tools/testing/selftests/bpf/progs/ |
H A D | verifier_spill_fill.c | 1 // SPDX-License-Identifier: GPL-2.0 22 *(u64*)(r10 - 8) = r1; \ in __retval() 24 r2 = *(u64*)(r10 - 8); \ in __retval() 39 *(u64*)(r10 - 8) = r6; \ in valid_spill_fill_skb_mark() 40 r0 = *(u64*)(r10 - 8); \ in valid_spill_fill_skb_mark() 54 /* reserve 8 byte ringbuf memory */ \ in spill_fill_ptr_to_mem() 56 *(u64*)(r10 - 8) = r1; \ in spill_fill_ptr_to_mem() 61 /* store a pointer to the reserved memory in R6 */\ in spill_fill_ptr_to_mem() 66 *(u64*)(r10 - 8) = r6; \ in spill_fill_ptr_to_mem() 68 r7 = *(u64*)(r10 - 8); \ in spill_fill_ptr_to_mem() [all …]
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/linux/tools/lib/bpf/ |
H A D | usdt.bpf.h | 1 /* SPDX-License-Identifier: (LGPL-2.1 OR BSD-2-Clause) */ 17 * map that keeps track of USDT argument specifications. This might be 24 * map that keeps track of IP (memory address) mapping to USDT argument 26 * Note, if kernel supports BPF cookies, this map is not used and could be 27 * resized all the way to 1 to save a bit of memory [all...] |
/linux/Documentation/target/ |
H A D | tcmu-design.rst | 19 2) Writing a user pass-through handler 29 TCM is another name for LIO, an in-kernel iSCSI target (server). 38 built-in modules are implemented entirely as kernel code. 41 ---------- 52 use case that other non-kernel target solutions, such as tgt, are able 55 in these non-traditional networked storage systems, while still only 65 kernel, another approach is to create a userspace pass-through 70 -------- 83 ------------------ 85 - Good performance: high throughput, low latency [all …]
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/linux/drivers/gpu/drm/xe/tests/ |
H A D | xe_bo.c | 1 // SPDX-License-Identifier: GPL-2.0 AND MIT 9 #include <linux/iosys-map.h> 46 fence = xe_migrate_clear(tile->migrate, bo, bo->ttm.resource, in ccs_test_migrate() 56 return -ETIME; in ccs_test_migrate() 70 timeout = dma_resv_wait_timeout(bo->ttm.base.resv, in ccs_test_migrate() 76 return -ETIME; in ccs_test_migrate() 80 * Bo with CCS data is now in system memory. Verify backing store in ccs_test_migrate() 82 * we still have a CPU map. in ccs_test_migrate() 84 ttm = bo->ttm.ttm; in ccs_test_migrate() 87 return -EINVAL; in ccs_test_migrate() [all …]
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/linux/Documentation/devicetree/bindings/pci/ |
H A D | snps,dw-pcie-common.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pci/snps,dw-pcie-common.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Jingoo Han <jingoohan1@gmail.com> 11 - Gustavo Pimentel <gustavo.pimentel@synopsys.com> 23 Interface - DBI. In accordance with the reference manual the register 24 configuration space belongs to the Configuration-Dependent Module (CDM) 25 and is split up into several sub-parts Standard PCIe configuration 26 space, Port Logic Registers (PL), Shadow Config-space Registers, [all …]
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/linux/drivers/acpi/acpica/ |
H A D | hwregs.c | 1 // SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 4 * Module Name: hwregs - Read/write access functions for the various ACPI 39 * PARAMETERS: address - GAS register address 40 * reg - GAS register structure 41 * max_bit_width - Max bit_width supported (32 or 64) 69 if (!reg->bit_offset && reg->bit_width && in acpi_hw_get_access_bit_width() 70 ACPI_IS_POWER_OF_TWO(reg->bit_width) && in acpi_hw_get_access_bit_width() 71 ACPI_IS_ALIGNED(reg->bit_width, 8)) { in acpi_hw_get_access_bit_width() 72 access_bit_width = reg->bit_width; in acpi_hw_get_access_bit_width() 73 } else if (reg->access_width) { in acpi_hw_get_access_bit_width() [all …]
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/linux/arch/arm/mach-pxa/ |
H A D | pxa3xx.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * linux/arch/arm/mach-pxa/pxa3xx.c 9 * 2007-09-02: eric miao <eric.miao@marvell.com> 13 #include <linux/dma/pxa-dma.h> 17 #include <linux/gpio-pxa.h> 25 #include <linux/platform_data/i2c-pxa.h> 30 #include <asm/mach/map.h> 32 #include "pxa3xx-regs.h" 34 #include <linux/platform_data/usb-ohci-pxa27x.h> 36 #include "addr-map.h" [all …]
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/linux/arch/arc/ |
H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 3 # Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com) 90 source "arch/arc/plat-tb10x/Kconfig" 91 source "arch/arc/plat-axs10x/Kconfig" 92 source "arch/arc/plat-hsdk/Kconfig" 110 ISA for the Next Generation ARC-HS cores 128 -MMU-v3: Variable Page Sz (4k, 8k, 16k), bigger J-TLB (128x4) 130 -Caches: New Prog Model, Region Flush 131 -Insns: endian swap, load-locked/store-conditional, time-stamp-ctr 134 bool "ARC-HS" [all …]
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/linux/arch/arm/include/asm/ |
H A D | pgtable-3level.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 3 * arch/arm/include/asm/pgtable-3level.h 31 * PGDIR_SHIFT determines the size a top-level page table entry can map. 36 * PMD_SHIFT determines the size a middle-level page table entry can map. 41 #define PMD_MASK (~((1 << PMD_SHIFT) - 1)) 43 #define PGDIR_MASK (~((1 << PGDIR_SHIFT) - 1)) 50 #define SECTION_MASK (~((1 << SECTION_SHIFT) - 1)) 59 #define HPAGE_MASK (~(HPAGE_SIZE - 1)) 60 #define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT) 65 * These bits overlap with the hardware bits but the naming is preserved for [all …]
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/linux/arch/arm64/kvm/hyp/vhe/ |
H A D | switch.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2015 - ARM Ltd 9 #include <linux/arm-smccc.h> 26 #include <asm/debug-monitors.h> 41 * - TGE: we want the guest to use EL1, which is incompatible with 44 * - API/APK: they are already accounted for by vcpu_load(), and can 47 * - FIEN: no way we let a guest have access to the RAS "Common Fault 54 u64 guest_hcr, hcr = vcpu->arch.hcr_el2; in __compute_hcr() 63 * that sucker. PSTATE.M will get fixed-up on exit. in __compute_hcr() 79 * use the config-driven RES1 bits. in __compute_hcr() [all …]
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/linux/arch/x86/mm/pat/ |
H A D | set_memory.c | 1 // SPDX-License-Identifier: GPL-2.0-only 39 * The current flushing context - we pass it instead of 5 arguments: 99 direct_pages_count[level]--; in split_page_count() 106 direct_pages_count[level - 1] += PTRS_PER_PTE; in split_page_count() 118 direct_pages_count[level - 1] -= PTRS_PER_PTE; in collapse_page_count() 186 seq_printf(m, "1G pages preserved: %16lu\n", cpa_1g_preserved); in cpastats_show() 189 seq_printf(m, "2M pages preserved: %16lu\n", cpa_2m_preserved); in cpastats_show() 190 seq_printf(m, "4K pages set-checked: %16lu\n", cpa_4k_install); in cpastats_show() 240 * 1. The kernel direct map (0xffff880000000000) 241 * 2. The "high kernel map" (0xffffffff81000000) [all …]
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/linux/Documentation/arch/arm64/ |
H A D | memory-tagging-extension.rst | 2 Memory Tagging Extension (MTE) in AArch64 Linux 8 Date: 2020-02-25 10 This document describes the provision of the Memory Tagging Extension 16 ARMv8.5 based processors introduce the Memory Tagging Extension (MTE) 18 (Top Byte Ignore) feature and allows software to access a 4-bit 19 allocation tag for each 16-byte granule in the physical address space. 20 Such memory range must be mapped with the Normal-Tagged memory 21 attribute. A logical tag is derived from bits 59-56 of the virtual 22 address used for the memory access. A CPU with MTE enabled will compare 29 When ``CONFIG_ARM64_MTE`` is selected and Memory Tagging Extension is [all …]
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