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/linux/drivers/iio/adc/
H A Dqcom-vadc-common.c305 const struct u32_fract *prescale,
309 const struct u32_fract *prescale,
313 const struct u32_fract *prescale,
317 const struct u32_fract *prescale,
321 const struct u32_fract *prescale,
325 const struct u32_fract *prescale,
329 const struct u32_fract *prescale,
409 const struct u32_fract *prescale, in qcom_vadc_scale_volt() argument
417 voltage *= prescale->denominator; in qcom_vadc_scale_volt()
418 result = div64_s64(voltage, prescale->numerator); in qcom_vadc_scale_volt()
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H A Dqcom-pm8xxx-xoadc.c156 * @pre_scale_mux: prescale (PM8058) or premux (PM8921) for selecting
161 * @prescale: the channels have hard-coded prescale ratios defined
177 const struct u32_fract prescale; member
220 .prescale = { \
447 dev_dbg(adc->dev, "read channel \"%s\", amux %d, prescale/mux: %d, rsv %d\n", in pm8xxx_read_channel_rsv()
664 &ch->hwchan->prescale, in pm8xxx_read_raw()
709 /* We need to match exactly on the prescale/premux and channel */ in pm8xxx_fwnode_xlate()
818 …"channel [PRESCALE/MUX: %02x AMUX: %02x] \"%s\" ref voltage: %d, decimation %d prescale %d/%d, sca… in pm8xxx_xoadc_parse_channel()
820 ch->amux_ip_rsv, ch->decimation, hwchan->prescale.numerator, in pm8xxx_xoadc_parse_channel()
821 hwchan->prescale.denominator, hwchan->scale_fn_type); in pm8xxx_xoadc_parse_channel()
/linux/drivers/pwm/
H A Dpwm-rz-mtu3.c69 * @prescale: MTU3 prescale
79 u8 prescale[RZ_MTU3_MAX_HW_CHANNELS]; member
116 u8 prescale; in rz_mtu3_pwm_calculate_prescale() local
119 * Supported prescale values are 1, 4, 16 and 64. in rz_mtu3_pwm_calculate_prescale()
120 * TODO: Support prescale values 2, 8, 32, 256 and 1024. in rz_mtu3_pwm_calculate_prescale()
124 prescale = 3; in rz_mtu3_pwm_calculate_prescale()
126 prescale = (fls(prescaled_period_cycles) + 1) / 2; in rz_mtu3_pwm_calculate_prescale()
128 return prescale; in rz_mtu3_pwm_calculate_prescale()
282 u8 prescale, val; in rz_mtu3_pwm_get_state() local
295 prescale = FIELD_GET(RZ_MTU3_TCR_TPCS, val); in rz_mtu3_pwm_get_state()
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H A Dpwm-microchip-core.c132 u8 prescale, u8 period_steps) in mchp_core_pwm_calc_duty() argument
139 * step_in_ns = (prescale * NSEC_PER_SEC) / clk_rate in mchp_core_pwm_calc_duty()
142 tmp = (((u64)prescale) + 1) * NSEC_PER_SEC; in mchp_core_pwm_calc_duty()
183 u16 *prescale, u16 *period_steps) in mchp_core_pwm_calc_period() argument
188 * Calculate the period cycles and prescale values. in mchp_core_pwm_calc_period()
191 * (prescale + 1) * (period_steps + 1) in mchp_core_pwm_calc_period()
201 * The prescale and period_steps registers operate similarly to in mchp_core_pwm_calc_period()
211 *prescale = MCHPCOREPWM_PRESCALE_MAX; in mchp_core_pwm_calc_period()
219 * prescale & period_steps values. in mchp_core_pwm_calc_period()
227 * to calculate prescale actually calculates its upper bound. in mchp_core_pwm_calc_period()
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H A Dpwm-sprd.c75 u32 val, duty, prescale; in sprd_pwm_get_state() local
98 * The period length is (PRESCALE + 1) * MOD counter steps. in sprd_pwm_get_state()
99 * The duty cycle length is (PRESCALE + 1) * DUTY counter steps. in sprd_pwm_get_state()
101 * period_ns = NSEC_PER_SEC * (prescale + 1) * mod / clk_rate in sprd_pwm_get_state()
102 * duty_ns = NSEC_PER_SEC * (prescale + 1) * duty / clk_rate in sprd_pwm_get_state()
105 prescale = val & SPRD_PWM_PRESCALE_MSK; in sprd_pwm_get_state()
106 tmp = (prescale + 1) * NSEC_PER_SEC * SPRD_PWM_MOD_MAX; in sprd_pwm_get_state()
111 tmp = (prescale + 1) * NSEC_PER_SEC * duty; in sprd_pwm_get_state()
126 u32 prescale, duty; in sprd_pwm_config() local
131 * The period length is (PRESCALE + 1) * MOD counter steps. in sprd_pwm_config()
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H A Dpwm-rzg2l-gpt.c124 u8 prescale; in rzg2l_gpt_calculate_prescale() local
128 prescale = 5; in rzg2l_gpt_calculate_prescale()
130 prescale = (fls(prescaled_period_ticks) + 1) / 2; in rzg2l_gpt_calculate_prescale()
132 return prescale; in rzg2l_gpt_calculate_prescale()
205 u32 val, u8 prescale) in rzg2l_gpt_calculate_period_or_duty() argument
210 * The calculation doesn't overflow an u64 because prescale ≤ 5 and so in rzg2l_gpt_calculate_period_or_duty()
211 * tmp = val << (2 * prescale) * USEC_PER_SEC in rzg2l_gpt_calculate_period_or_duty()
216 tmp = (u64)val << (2 * prescale); in rzg2l_gpt_calculate_period_or_duty()
231 u8 prescale; in rzg2l_gpt_get_state() local
235 prescale = FIELD_GET(RZG2L_GTCR_TPCS, val); in rzg2l_gpt_get_state()
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H A Dpwm-spear.c80 unsigned long prescale = PWMCR_MIN_PRESCALE, pv, dc; in spear_pwm_config() local
84 * Find pv, dc and prescale to suit duty_ns and period_ns. This is done in spear_pwm_config()
87 * period_ns = 10^9 * (PRESCALE + 1) * PV / PWM_CLK_RATE in spear_pwm_config()
88 * duty_ns = 10^9 * (PRESCALE + 1) * DC / PWM_CLK_RATE in spear_pwm_config()
90 * PV = (PWM_CLK_RATE * period_ns) / (10^9 * (PRESCALE + 1)) in spear_pwm_config()
91 * DC = (PWM_CLK_RATE * duty_ns) / (10^9 * (PRESCALE + 1)) in spear_pwm_config()
96 div *= 1 + prescale; in spear_pwm_config()
108 * prescale and recalculate pv and dc. in spear_pwm_config()
111 if (++prescale > PWMCR_MAX_PRESCALE) in spear_pwm_config()
127 prescale << PWMCR_PRESCALE_SHIFT); in spear_pwm_config()
H A Dpwm-pxa.c64 * period_ns = 10^9 * (PRESCALE + 1) * (PV + 1) / PWM_CLK_RATE
65 * duty_ns = 10^9 * (PRESCALE + 1) * DC / PWM_CLK_RATE
72 unsigned long period_cycles, prescale, pv, dc; in pxa_pwm_config() local
84 prescale = (period_cycles - 1) / 1024; in pxa_pwm_config()
85 pv = period_cycles / (prescale + 1) - 1; in pxa_pwm_config()
87 if (prescale > 63) in pxa_pwm_config()
95 writel(prescale | PWMCR_SD, pc->mmio_base + offset + PWMCR); in pxa_pwm_config()
H A Dpwm-vt8500.c76 unsigned long period_cycles, prescale, pv, dc; in vt8500_pwm_config() local
93 prescale = (period_cycles - 1) / 4096; in vt8500_pwm_config()
94 pv = period_cycles / (prescale + 1) - 1; in vt8500_pwm_config()
98 if (prescale > 1023) { in vt8500_pwm_config()
107 writel(prescale, vt8500->base + REG_SCALAR(pwm->hwpwm)); in vt8500_pwm_config()
/linux/drivers/clocksource/
H A Dingenic-sysost.c96 unsigned int prescale; in ingenic_ost_percpu_timer_recalc_rate() local
98 prescale = readl(ost_clk->ost->base + info->ostccr_reg); in ingenic_ost_percpu_timer_recalc_rate()
100 prescale = FIELD_GET(OSTCCR_PRESCALE1_MASK, prescale); in ingenic_ost_percpu_timer_recalc_rate()
102 return parent_rate >> (prescale * 2); in ingenic_ost_percpu_timer_recalc_rate()
110 unsigned int prescale; in ingenic_ost_global_timer_recalc_rate() local
112 prescale = readl(ost_clk->ost->base + info->ostccr_reg); in ingenic_ost_global_timer_recalc_rate()
114 prescale = FIELD_GET(OSTCCR_PRESCALE2_MASK, prescale); in ingenic_ost_global_timer_recalc_rate()
116 return parent_rate >> (prescale * 2); in ingenic_ost_global_timer_recalc_rate()
121 u8 prescale; in ingenic_ost_get_prescale() local
123 for (prescale = 0; prescale < 2; prescale++) in ingenic_ost_get_prescale()
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H A Dtimer-cadence-ttc.c58 #define PRESCALE_EXPONENT 11 /* 2 ^ PRESCALE_EXPONENT = PRESCALE */
59 #define PRESCALE 2048 /* The exponent must match this */ macro
221 DIV_ROUND_CLOSEST(ttce->ttc.freq, PRESCALE * HZ)); in ttc_set_periodic()
378 err = clocksource_register_hz(&ttccs->cs, ttccs->ttc.freq / PRESCALE); in ttc_setup_clocksource()
386 ttccs->ttc.freq / PRESCALE); in ttc_setup_clocksource()
404 clockevents_update_freq(&ttcce->ce, ndata->new_rate / PRESCALE); in ttc_rate_change_clockevent_cb()
471 ttcce->ttc.freq / PRESCALE, 1, 0xfffe); in ttc_setup_clockevent()
/linux/drivers/clk/ingenic/
H A Dtcu.c159 unsigned int prescale; in ingenic_tcu_recalc_rate() local
162 ret = regmap_read(tcu_clk->tcu->map, info->tcsr_reg, &prescale); in ingenic_tcu_recalc_rate()
165 prescale = (prescale & TCU_TCSR_PRESCALE_MASK) >> TCU_TCSR_PRESCALE_LSB; in ingenic_tcu_recalc_rate()
167 return parent_rate >> (prescale * 2); in ingenic_tcu_recalc_rate()
172 u8 prescale; in ingenic_tcu_get_prescale() local
174 for (prescale = 0; prescale < 5; prescale++) in ingenic_tcu_get_prescale()
175 if ((rate >> (prescale * 2)) <= req_rate) in ingenic_tcu_get_prescale()
176 return prescale; in ingenic_tcu_get_prescale()
185 u8 prescale; in ingenic_tcu_determine_rate() local
192 prescale = ingenic_tcu_get_prescale(rate, req->rate); in ingenic_tcu_determine_rate()
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/linux/drivers/watchdog/
H A Drealtek_otto_wdt.c10 * - Base prescale of (2 << 25), providing tick duration T_0: 168ms @ 200MHz
11 * - PRESCALE: logarithmic prescaler adding a factor of {1, 2, 4, 8}
12 * - Phase 1: Times out after (PHASE1 + 1) × PRESCALE × T_0
14 * - Phase 2: starts after phase 1, times out after (PHASE2 + 1) × PRESCALE × T_0
99 static int otto_wdt_tick_ms(struct otto_wdt_ctrl *ctrl, int prescale) in otto_wdt_tick_ms() argument
101 return DIV_ROUND_CLOSEST(1 << (25 + prescale), ctrl->clk_rate_khz); in otto_wdt_tick_ms()
119 unsigned int prescale; in otto_wdt_determine_timeouts() local
124 prescale = prescale_next; in otto_wdt_determine_timeouts()
125 if (prescale > OTTO_WDT_PRESCALE_MAX) in otto_wdt_determine_timeouts()
128 tick_ms = otto_wdt_tick_ms(ctrl, prescale); in otto_wdt_determine_timeouts()
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/linux/drivers/gpu/drm/radeon/
H A Dradeon_i2c.c234 u32 prescale = 0; in radeon_get_i2c_prescale() local
260 prescale = m | (n << 8); in radeon_get_i2c_prescale()
268 prescale = (((sclk * 10)/(4 * 128 * 100) + 1) << 8) + 128; in radeon_get_i2c_prescale()
283 prescale = (127 << 8) + ((sclk * 10) / (4 * 127 * i2c_clock)); in radeon_get_i2c_prescale()
285 prescale = (((sclk * 10)/(4 * 128 * 100) + 1) << 8) + 128; in radeon_get_i2c_prescale()
314 return prescale; in radeon_get_i2c_prescale()
329 u32 prescale; in r100_hw_i2c_xfer() local
337 prescale = radeon_get_i2c_prescale(rdev); in r100_hw_i2c_xfer()
339 reg = ((prescale << RADEON_I2C_PRESCALE_SHIFT) | in r100_hw_i2c_xfer()
582 u32 prescale; in r500_hw_i2c_xfer() local
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/linux/drivers/input/keyboard/
H A Dep93xx_keypad.c64 u16 prescale; member
135 val |= (keypad->prescale << KEY_INIT_PRSCL_SHIFT) & KEY_INIT_PRSCL_MASK; in ep93xx_keypad_config()
226 device_property_read_u16(dev, "cirrus,prescale", &keypad->prescale); in ep93xx_keypad_probe()
/linux/Documentation/devicetree/bindings/display/
H A Dcirrus,clps711x-fb.txt12 - ac-prescale : LCD AC bias frequency. This frequency is the required
31 ac-prescale = <17>;
/linux/drivers/i2c/busses/
H A Di2c-xlp9xx.c306 u32 prescale; in xlp9xx_i2c_init() local
310 * So prescale value should be divided by 5. in xlp9xx_i2c_init()
312 prescale = DIV_ROUND_UP(priv->ip_clk_hz, priv->clk_hz); in xlp9xx_i2c_init()
313 prescale = ((prescale - 8) / 5) - 1; in xlp9xx_i2c_init()
317 xlp9xx_write_i2c_reg(priv, XLP9XX_I2C_DIV, prescale); in xlp9xx_i2c_init()
H A Di2c-ocores.c405 int prescale; in ocores_init() local
413 prescale = (i2c->ip_clock_khz / (5 * i2c->bus_clock_khz)) - 1; in ocores_init()
414 prescale = clamp(prescale, 0, 0xffff); in ocores_init()
416 diff = i2c->ip_clock_khz / (5 * (prescale + 1)) - i2c->bus_clock_khz; in ocores_init()
424 oc_setreg(i2c, OCI2C_PRELOW, prescale & 0xff); in ocores_init()
425 oc_setreg(i2c, OCI2C_PREHIGH, prescale >> 8); in ocores_init()
H A Di2c-axxia.c185 u32 prescale; in axxia_i2c_init() local
231 for (prescale = 0; prescale < 15; ++prescale) { in axxia_i2c_init()
239 /* Prescale divider (log2) */ in axxia_i2c_init()
240 writel(prescale, idev->base + TIMER_CLOCK_DIV); in axxia_i2c_init()
/linux/drivers/media/pci/cobalt/
H A Dcobalt-i2c.c309 int prescale; in cobalt_i2c_init() local
315 prescale = ((ALT_CPU_FREQ) / (5 * I2C_FREQUENCY)) - 1; in cobalt_i2c_init()
344 iowrite8(prescale & 0xff, &regs->prerlo); in cobalt_i2c_init()
345 iowrite8((prescale >> 8) & 0xff, &regs->prerhi); in cobalt_i2c_init()
/linux/arch/powerpc/sysdev/
H A Dfsl_gtm.c62 __be16 gtpsr1; /* Timer 1 prescale register */
63 __be16 gtpsr2; /* Timer 2 prescale register */
64 __be16 gtpsr3; /* Timer 3 prescale register */
65 __be16 gtpsr4; /* Timer 4 prescale register */
184 * plus "slow go" mode (clk / 16). So, total prescale value is in gtm_set_ref_timer16()
/linux/drivers/comedi/drivers/
H A Ddt282x.c366 unsigned int prescale, base, divider; in dt282x_ns_to_timer() local
368 for (prescale = 0; prescale <= DT2821_PRESCALE_MAX; prescale++) { in dt282x_ns_to_timer()
369 if (prescale == 1) /* 0 and 1 are both divide by 1 */ in dt282x_ns_to_timer()
371 base = DT2821_OSC_BASE * DT2821_PRESCALE(prescale); in dt282x_ns_to_timer()
388 prescale = DT2821_PRESCALE_MAX; in dt282x_ns_to_timer()
390 base = DT2821_OSC_BASE * DT2821_PRESCALE(prescale); in dt282x_ns_to_timer()
393 return DT2821_TMRCTR_PRESCALE(prescale) | in dt282x_ns_to_timer()
/linux/include/linux/iio/adc/
H A Dqcom-vadc-common.h139 const struct u32_fract *prescale,
144 int (*scale_fn)(const struct u32_fract *prescale,
H A Dqcom-adc5-gen3-common.h151 * @prescale: channel scaling performed on the input signal.
165 unsigned int prescale; member
/linux/drivers/media/pci/cx88/
H A Dcx88-core.c754 static int set_pll(struct cx88_core *core, int prescale, u32 ofreq) in set_pll() argument
761 if (prescale < 2) in set_pll()
762 prescale = 2; in set_pll()
763 if (prescale > 5) in set_pll()
764 prescale = 5; in set_pll()
766 pll = ofreq * 8 * prescale * (u64)(1 << 20); in set_pll()
768 reg = (pll & 0x3ffffff) | (pre[prescale] << 26); in set_pll()
781 prescale, ofreq); in set_pll()
787 dprintk(1, "pll NOT locked [pre=%d,ofreq=%d]\n", prescale, ofreq); in set_pll()

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