Home
last modified time | relevance | path

Searched full:prefetchable (Results 1 – 25 of 77) sorted by relevance

1234

/linux/Documentation/devicetree/bindings/pci/
H A Dnvidia,tegra20-pcie.txt43 prefetchable PCI regions. The first cell determines the type of region
46 - 0x82000000: non-prefetchable memory region
47 - 0xc2000000: prefetchable memory region
190 0x82000000 0 0xa0000000 0xa0000000 0 0x10000000 /* non-prefetchable memory */
191 0xc2000000 0 0xb0000000 0xb0000000 0 0x10000000>; /* prefetchable memory */
292 0x82000000 0 0x20000000 0x20000000 0 0x08000000 /* non-prefetchable memory */
293 0xc2000000 0 0x28000000 0x28000000 0 0x18000000>; /* prefetchable memory */
396 0x82000000 0 0x13000000 0x0 0x13000000 0 0x0d000000 /* non-prefetchable memory (208 MiB) */
397 0xc2000000 0 0x20000000 0x0 0x20000000 0 0x20000000>; /* prefetchable memory (512 MiB) */
492 0x82000000 0 0x13000000 0x0 0x13000000 0 0x0d000000 /* non-prefetchable memory (208 MiB) */
[all …]
H A Dv3,v360epc-pci.yaml45 The non-prefetchable and prefetchable memory windows must each be exactly
46 256MB (0x10000000) in size. The prefetchable memory window must be
47 immediately adjacent to the non-prefetchable memory window.
H A Dqcom,pcie-sa8255p.yaml32 definition of non-prefetchable memory. One or both of prefetchable Memory
H A Dhost-generic-pci.yaml103 definition of non-prefetchable memory. One or both of prefetchable Memory
H A Dnvidia,tegra194-pcie.yaml308 … <0xc2000000 0x18 0x00000000 0x18 0x00000000 0x4 0x00000000>; /* prefetchable memory */
370 ranges = <0x43000000 0x21 0x40000000 0x21 0x40000000 0x2 0xe8000000>, /* prefetchable */
371 … <0x02000000 0x0 0x40000000 0x24 0x28000000 0x0 0x08000000>, /* non-prefetchable */
H A Dmarvell,armada8k-pcie.yaml93 <0x82000000 0 0xf6000000 0xf6000000 0 0xf00000>; /* non-prefetchable memory */
H A Dsifive,fu740-pcie.yaml104 … <0xc3000000 0x20 0x00000000 0x20 0x00000000 0x20 0x00000000>; /* mem prefetchable */
/linux/arch/arm64/boot/dts/freescale/
H A Dfsl-ls2080a.dtsi142 0x82000000 0x0 0x40000000 0x10 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
150 0x82000000 0x0 0x40000000 0x12 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
158 0x82000000 0x0 0x40000000 0x14 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
166 0x82000000 0x0 0x40000000 0x16 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
H A Dfsl-ls1028a.dtsi661 0x82000000 0x0 0x40000000 0x80 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
700 0x82000000 0x0 0x40000000 0x88 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
1086 /* PF0-6 BAR0 - non-prefetchable memory */
1088 /* PF0-6 BAR2 - prefetchable memory */
1090 /* PF0: VF0-1 BAR0 - non-prefetchable memory */
1092 /* PF0: VF0-1 BAR2 - prefetchable memory */
1094 /* PF1: VF0-1 BAR0 - non-prefetchable memory */
1096 /* PF1: VF0-1 BAR2 - prefetchable memory */
1098 /* BAR4 (PF5) - non-prefetchable memory */
/linux/drivers/pci/controller/
H A Dpci-v3-semi.c257 * 40000000 - 4FFFFFFF PCI memory. 256M non-prefetchable
258 * 50000000 - 5FFFFFFF PCI memory. 256M prefetchable
362 * prefetchable), this frees up base1 for re-use by in v3_map_bus()
384 * Reassign base1 for use by prefetchable PCI memory in v3_unmap_bus()
542 dev_dbg(dev, "PREFETCHABLE MEM window %pR, bus addr %pap\n", in v3_pci_setup_resource()
545 dev_err(dev, "prefetchable memory range is not 256MB\n"); in v3_pci_setup_resource()
551 "prefetchable memory is not adjacent to non-prefetchable memory\n"); in v3_pci_setup_resource()
554 /* Setup window 1 - PCI prefetchable memory */ in v3_pci_setup_resource()
567 dev_dbg(dev, "NON-PREFETCHABLE MEM window %pR, bus addr %pap\n", in v3_pci_setup_resource()
571 "non-prefetchable memory range is not 256MB\n"); in v3_pci_setup_resource()
[all …]
/linux/drivers/pci/
H A Dsetup-bus.c14 * tighter packing. Prefetchable range support.
184 * Any non-prefetchable resource is put into the non-prefetchable window.
186 * If there is no prefetchable MMIO window, put all memory resources into the
187 * non-prefetchable window.
189 * If there's a 64-bit prefetchable MMIO window, put all 64-bit prefetchable
190 * resources into it and place 32-bit prefetchable memory into the
191 * non-prefetchable window.
193 * Otherwise, put all prefetchable resources into the prefetchable window.
254 * Any non-prefetchable resource is put into the non-prefetchable window.
256 * If there is no prefetchable MMIO window, put all memory resources into the
[all …]
H A Dsetup-res.c179 /* Prefetchable MMIO Base/Limit */ in pci_disable_bridge_window()
271 * prefetchable bridge window is below 4GB, we can't put a 32-bit in __pci_assign_resource()
272 * prefetchable resource in it because pbus_size_mem() assumes a in __pci_assign_resource()
283 * If the prefetchable window is only 32 bits wide, we can put in __pci_assign_resource()
284 * 64-bit prefetchable resources in it. in __pci_assign_resource()
297 * in a non-prefetchable window. If this resource is 32 bits and in __pci_assign_resource()
298 * non-prefetchable, the first call already tried the only possibility in __pci_assign_resource()
H A Dpci-bridge-emul.h143 * PCI bridge does not support forwarding of prefetchable memory
/linux/arch/arm/boot/dts/arm/
H A Dversatile-pb.dts55 0x02000000 0 0x50000000 0x50000000 0 0x10000000 /* non-prefetchable memory */
56 0x42000000 0 0x60000000 0x60000000 0 0x10000000>; /* prefetchable memory */
/linux/arch/x86/pci/
H A Dbroadcom_bus.c45 /* read the non-prefetchable memory window */ in cnb20le_res()
55 /* read the prefetchable memory window */ in cnb20le_res()
H A Dce4100.c215 /* Make prefetchable memory limit smaller than prefetchable in bridge_read()
216 * memory base, so not claim prefetchable memory space. in bridge_read()
/linux/arch/arm/boot/dts/st/
H A Dspear1310.dtsi92 0x82000000 0 0x80030000 0xc0030000 0 0x0ffd0000>; /* non-prefetchable memory */
109 0x82000000 0 0x90030000 0x90030000 0 0x0ffd0000>; /* non-prefetchable memory */
126 0x82000000 0 0xc0030000 0xc0030000 0 0x0ffd0000>; /* non-prefetchable memory */
/linux/drivers/pci/controller/plda/
H A Dpcie-starfive.c67 * JH7110 PCIe port BAR0/1 can be configured as 64-bit prefetchable memory
352 * Enable the prefetchable memory window 64-bit addressing in JH7110. in starfive_pcie_host_init()
353 * The 64-bits prefetchable address translation configurations in ATU in starfive_pcie_host_init()
/linux/arch/sparc/kernel/
H A Dleon_pci.c22 * PCI Memory and Prefetchable Memory is direct-mapped. However I/O Space is
/linux/sound/pci/lx6464es/
H A Dlx6464es.h66 * non-prefetchable,
/linux/arch/powerpc/boot/
H A Dcuboot-pq2.c117 * 32-bit PCI is supported. All three region types (prefetchable mem,
118 * non-prefetchable mem, and I/O) must be present.
/linux/drivers/pci/hotplug/
H A Dshpchp_sysfs.c45 len += sysfs_emit_at(buf, len, "Free resources: prefetchable memory\n"); in show_ctrl()
H A Dcpqphp_pci.c766 /* Save prefetchable memory base and Limit registers */ in cpqhp_save_used_resources()
816 /* prefetchable memory base */ in cpqhp_save_used_resources()
833 /* prefetchable memory base */ in cpqhp_save_used_resources()
887 /* prefetchable memory base */ in cpqhp_save_used_resources()
904 /* prefetchable memory base */ in cpqhp_save_used_resources()
1338 /* If we've got a valid prefetchable memory base, and in cpqhp_find_available_resources()
/linux/arch/arm64/boot/dts/nvidia/
H A Dtegra234.dtsi4493 …ranges = <0x43000000 0x32 0x40000000 0x32 0x40000000 0x2 0xe8000000>, /* prefetchable memory (1190…
4494 …<0x02000000 0x0 0x40000000 0x35 0x28000000 0x0 0x08000000>, /* non-prefetchable memory (128 MB) */
4547 …ranges = <0x43000000 0x35 0x40000000 0x35 0x40000000 0x2 0xc0000000>, /* prefetchable memory (1126…
4548 …<0x02000000 0x0 0x40000000 0x38 0x28000000 0x0 0x08000000>, /* non-prefetchable memory (128 MB) */
4601 …ranges = <0x43000000 0x38 0x40000000 0x38 0x40000000 0x2 0xe8000000>, /* prefetchable memory (1190…
4602 …<0x02000000 0x0 0x40000000 0x3b 0x28000000 0x0 0x08000000>, /* non-prefetchable memory (128 MB) */
4693 …ranges = <0x43000000 0x20 0x80000000 0x20 0x80000000 0x0 0x28000000>, /* prefetchable memory (640 …
4694 …<0x02000000 0x0 0x40000000 0x20 0xa8000000 0x0 0x08000000>, /* non-prefetchable memory (128 MB) */
4747 …ranges = <0x43000000 0x20 0xc0000000 0x20 0xc0000000 0x0 0x28000000>, /* prefetchable memory (640 …
4748 …<0x02000000 0x0 0x40000000 0x20 0xe8000000 0x0 0x08000000>, /* non-prefetchable memory (128 MB) */
[all …]
H A Dtegra194.dtsi2401 …ranges = <0x43000000 0x12 0x00000000 0x12 0x00000000 0x0 0x30000000>, /* prefetchable memory (768 …
2402 …<0x02000000 0x0 0x40000000 0x12 0x30000000 0x0 0x0fff0000>, /* non-prefetchable memory (256 MiB -…
2453 …ranges = <0x43000000 0x12 0x40000000 0x12 0x40000000 0x0 0x30000000>, /* prefetchable memory (768 …
2454 …<0x02000000 0x0 0x40000000 0x12 0x70000000 0x0 0x0fff0000>, /* non-prefetchable memory (256 MiB -…
2505 …ranges = <0x43000000 0x12 0x80000000 0x12 0x80000000 0x0 0x30000000>, /* prefetchable memory (768 …
2506 …<0x02000000 0x0 0x40000000 0x12 0xb0000000 0x0 0x0fff0000>, /* non-prefetchable memory (256 MiB +…
2557 …ranges = <0x43000000 0x14 0x00000000 0x14 0x00000000 0x3 0x40000000>, /* prefetchable memory (13 G…
2558 …<0x02000000 0x0 0x40000000 0x17 0x40000000 0x0 0xbfff0000>, /* non-prefetchable memory (3 GiB - 6…
2648 …ranges = <0x43000000 0x18 0x00000000 0x18 0x00000000 0x3 0x40000000>, /* prefetchable memory (13 G…
2649 …<0x02000000 0x0 0x40000000 0x1b 0x40000000 0x0 0xbfff0000>, /* non-prefetchable memory (3 GiB - 6…
[all …]

1234