1*2874c5fdSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-or-later
23f6ea84aSIra W. Snyder /*
33f6ea84aSIra W. Snyder * Read address ranges from a Broadcom CNB20LE Host Bridge
43f6ea84aSIra W. Snyder *
53f6ea84aSIra W. Snyder * Copyright (c) 2010 Ira W. Snyder <iws@ovro.caltech.edu>
63f6ea84aSIra W. Snyder */
73f6ea84aSIra W. Snyder
830e664afSBjorn Helgaas #include <linux/acpi.h>
93f6ea84aSIra W. Snyder #include <linux/delay.h>
103f6ea84aSIra W. Snyder #include <linux/dmi.h>
113f6ea84aSIra W. Snyder #include <linux/pci.h>
123f6ea84aSIra W. Snyder #include <linux/init.h>
133f6ea84aSIra W. Snyder #include <asm/pci_x86.h>
146361d72bSBjorn Helgaas #include <asm/pci-direct.h>
153f6ea84aSIra W. Snyder
163f6ea84aSIra W. Snyder #include "bus_numa.h"
173f6ea84aSIra W. Snyder
cnb20le_res(u8 bus,u8 slot,u8 func)186361d72bSBjorn Helgaas static void __init cnb20le_res(u8 bus, u8 slot, u8 func)
193f6ea84aSIra W. Snyder {
203f6ea84aSIra W. Snyder struct pci_root_info *info;
21d28e5ac2SYinghai Lu struct pci_root_res *root_res;
223f6ea84aSIra W. Snyder struct resource res;
233f6ea84aSIra W. Snyder u16 word1, word2;
243f6ea84aSIra W. Snyder u8 fbus, lbus;
253f6ea84aSIra W. Snyder
263f6ea84aSIra W. Snyder /* read the PCI bus numbers */
276361d72bSBjorn Helgaas fbus = read_pci_config_byte(bus, slot, func, 0x44);
286361d72bSBjorn Helgaas lbus = read_pci_config_byte(bus, slot, func, 0x45);
29d28e5ac2SYinghai Lu info = alloc_pci_root_info(fbus, lbus, 0, 0);
303f6ea84aSIra W. Snyder
313f6ea84aSIra W. Snyder /*
323f6ea84aSIra W. Snyder * Add the legacy IDE ports on bus 0
333f6ea84aSIra W. Snyder *
343f6ea84aSIra W. Snyder * These do not exist anywhere in the bridge registers, AFAICT. I do
353f6ea84aSIra W. Snyder * not have the datasheet, so this is the best I can do.
363f6ea84aSIra W. Snyder */
373f6ea84aSIra W. Snyder if (fbus == 0) {
383f6ea84aSIra W. Snyder update_res(info, 0x01f0, 0x01f7, IORESOURCE_IO, 0);
393f6ea84aSIra W. Snyder update_res(info, 0x03f6, 0x03f6, IORESOURCE_IO, 0);
403f6ea84aSIra W. Snyder update_res(info, 0x0170, 0x0177, IORESOURCE_IO, 0);
413f6ea84aSIra W. Snyder update_res(info, 0x0376, 0x0376, IORESOURCE_IO, 0);
423f6ea84aSIra W. Snyder update_res(info, 0xffa0, 0xffaf, IORESOURCE_IO, 0);
433f6ea84aSIra W. Snyder }
443f6ea84aSIra W. Snyder
453f6ea84aSIra W. Snyder /* read the non-prefetchable memory window */
466361d72bSBjorn Helgaas word1 = read_pci_config_16(bus, slot, func, 0xc0);
476361d72bSBjorn Helgaas word2 = read_pci_config_16(bus, slot, func, 0xc2);
483f6ea84aSIra W. Snyder if (word1 != word2) {
4953bb565fSColin Ian King res.start = ((resource_size_t) word1 << 16) | 0x0000;
5053bb565fSColin Ian King res.end = ((resource_size_t) word2 << 16) | 0xffff;
513f6ea84aSIra W. Snyder res.flags = IORESOURCE_MEM;
523f6ea84aSIra W. Snyder update_res(info, res.start, res.end, res.flags, 0);
533f6ea84aSIra W. Snyder }
543f6ea84aSIra W. Snyder
553f6ea84aSIra W. Snyder /* read the prefetchable memory window */
566361d72bSBjorn Helgaas word1 = read_pci_config_16(bus, slot, func, 0xc4);
576361d72bSBjorn Helgaas word2 = read_pci_config_16(bus, slot, func, 0xc6);
583f6ea84aSIra W. Snyder if (word1 != word2) {
590b2d7076SBjorn Helgaas res.start = ((resource_size_t) word1 << 16) | 0x0000;
600b2d7076SBjorn Helgaas res.end = ((resource_size_t) word2 << 16) | 0xffff;
613f6ea84aSIra W. Snyder res.flags = IORESOURCE_MEM | IORESOURCE_PREFETCH;
623f6ea84aSIra W. Snyder update_res(info, res.start, res.end, res.flags, 0);
633f6ea84aSIra W. Snyder }
643f6ea84aSIra W. Snyder
653f6ea84aSIra W. Snyder /* read the IO port window */
666361d72bSBjorn Helgaas word1 = read_pci_config_16(bus, slot, func, 0xd0);
676361d72bSBjorn Helgaas word2 = read_pci_config_16(bus, slot, func, 0xd2);
683f6ea84aSIra W. Snyder if (word1 != word2) {
693f6ea84aSIra W. Snyder res.start = word1;
703f6ea84aSIra W. Snyder res.end = word2;
713f6ea84aSIra W. Snyder res.flags = IORESOURCE_IO;
723f6ea84aSIra W. Snyder update_res(info, res.start, res.end, res.flags, 0);
733f6ea84aSIra W. Snyder }
743f6ea84aSIra W. Snyder
753f6ea84aSIra W. Snyder /* print information about this host bridge */
763f6ea84aSIra W. Snyder res.start = fbus;
773f6ea84aSIra W. Snyder res.end = lbus;
783f6ea84aSIra W. Snyder res.flags = IORESOURCE_BUS;
796361d72bSBjorn Helgaas printk(KERN_INFO "CNB20LE PCI Host Bridge (domain 0000 %pR)\n", &res);
803f6ea84aSIra W. Snyder
81d28e5ac2SYinghai Lu list_for_each_entry(root_res, &info->resources, list)
82d28e5ac2SYinghai Lu printk(KERN_INFO "host bridge window %pR\n", &root_res->res);
833f6ea84aSIra W. Snyder }
843f6ea84aSIra W. Snyder
broadcom_postcore_init(void)856361d72bSBjorn Helgaas static int __init broadcom_postcore_init(void)
866361d72bSBjorn Helgaas {
876361d72bSBjorn Helgaas u8 bus = 0, slot = 0;
886361d72bSBjorn Helgaas u32 id;
896361d72bSBjorn Helgaas u16 vendor, device;
903f6ea84aSIra W. Snyder
916361d72bSBjorn Helgaas #ifdef CONFIG_ACPI
926361d72bSBjorn Helgaas /*
936361d72bSBjorn Helgaas * We should get host bridge information from ACPI unless the BIOS
946361d72bSBjorn Helgaas * doesn't support it.
956361d72bSBjorn Helgaas */
96ddec3bdeSRafael J. Wysocki if (!acpi_disabled && acpi_os_get_root_pointer())
976361d72bSBjorn Helgaas return 0;
986361d72bSBjorn Helgaas #endif
996361d72bSBjorn Helgaas
1006361d72bSBjorn Helgaas id = read_pci_config(bus, slot, 0, PCI_VENDOR_ID);
1016361d72bSBjorn Helgaas vendor = id & 0xffff;
1026361d72bSBjorn Helgaas device = (id >> 16) & 0xffff;
1036361d72bSBjorn Helgaas
1046361d72bSBjorn Helgaas if (vendor == PCI_VENDOR_ID_SERVERWORKS &&
1056361d72bSBjorn Helgaas device == PCI_DEVICE_ID_SERVERWORKS_LE) {
1066361d72bSBjorn Helgaas cnb20le_res(bus, slot, 0);
1076361d72bSBjorn Helgaas cnb20le_res(bus, slot, 1);
1086361d72bSBjorn Helgaas }
1096361d72bSBjorn Helgaas return 0;
1106361d72bSBjorn Helgaas }
1116361d72bSBjorn Helgaas
1126361d72bSBjorn Helgaas postcore_initcall(broadcom_postcore_init);
113