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/linux/Documentation/devicetree/bindings/input/
H A Dmicrochip,qt1050.txt1 Microchip AT42QT1050 Five-channel Touch Sensor IC
11 - compatible: Must be "microchip,qt1050"
12 - reg: The I2C address of the device
13 - interrupts: The sink for the touchpad's IRQ output,
14 see ../interrupt-controller/interrupts.txt
17 - wakeup-source: touch keys can be used as a wakeup source
19 Each button (key) is represented as a sub-node:
25 - linux,code: Keycode to emit.
26 - reg: The key number. Valid values: 0, 1, 2, 3, 4.
28 Optional subnode-properties:
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/linux/include/linux/mfd/
H A Drt5033-private.h1 /* SPDX-License-Identifier: GPL-2.0-only */
116 /* RT5033 charger property - model, manufacturer */
121 * While RT5033 charger can limit the fast-charge current (as in CHGCTRL1
144 /* RT5033 use internal timer need to set time */
171 /* RT5033 charger constant charge voltage (as in CHGCTRL2 register), uV */
177 /* RT5033 charger pre-charge current limits (as in CHGCTRL4 register), uA */
183 /* RT5033 charger fast-charge current (as in CHGCTRL5 register), uA */
190 * RT5033 charger const-charge end of charger current (
200 * RT5033 charger pre-charge threshold volt limits
/linux/arch/sh/boards/mach-r2d/
H A Dsetup.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2002 - 2006 Atom Create Engineering Co., Ltd.
6 * Copyright (C) 2004 - 2007 Paul Mundt
15 #include <linux/sm501-regs.h>
29 .end = PA_AREA5_IO + 0x1000 + 0x10 - 0x2,
37 #ifndef CONFIG_RTS7751R2D_1 /* For R2D-1 polling is preferred */
51 .id = -1,
61 .modalias = "rtc-r9701",
69 BUG_ON(cs != 0); /* Single Epson RTC-9701JE attached on CS0 */ in r2d_chip_select()
88 .id = -1,
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/linux/tools/perf/pmu-events/arch/x86/snowridgex/
H A Duncore-memory.json8 …tion": "Counts the total number of DRAM Read CAS commands, w/ and w/o auto-pre, issued on this cha…
19 …"Counts the total number of DRAM Write CAS commands issued, w/ and w/o auto-pre, on this channel.",
61 …tion": "Counts the total number of DRAM Read CAS commands, w/ and w/o auto-pre, issued on this cha…
66 "BriefDescription": "DRAM RD_CAS and WR_CAS Commands. : DRAM RD_CAS commands w/auto-pre",
72 …"PublicDescription": "DRAM RD_CAS and WR_CAS Commands. : DRAM RD_CAS commands w/auto-pre : DRAM RD…
115 …"Counts the total number of DRAM Write CAS commands issued, w/ and w/o auto-pre, on this channel.",
120 "BriefDescription": "DRAM RD_CAS and WR_CAS Commands. : DRAM WR_CAS commands w/o auto-pre",
126 …"PublicDescription": "DRAM RD_CAS and WR_CAS Commands. : DRAM WR_CAS commands w/o auto-pre : DRAM …
131 "BriefDescription": "DRAM RD_CAS and WR_CAS Commands. : DRAM WR_CAS commands w/ auto-pre",
137 …"PublicDescription": "DRAM RD_CAS and WR_CAS Commands. : DRAM WR_CAS commands w/ auto-pre : DRAM R…
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/linux/drivers/gpu/drm/nouveau/nvkm/engine/disp/
H A Duhead.c4 * Permission is hereby granted, free of charge, to any person obtaining a
38 if (argc != sizeof(args->vn)) in nvkm_uhead_uevent()
39 return -ENOSYS; in nvkm_uhead_uevent()
41 return nvkm_uevent_add(uevent, &head->disp->vblank, head->id, in nvkm_uhead_uevent()
50 if (argc != sizeof(args->v0) || args->v0.version != 0) in nvkm_uhead_mthd_scanoutpos()
51 return -ENOSYS; in nvkm_uhead_mthd_scanoutpos()
53 head->func->state(head, &head->arm); in nvkm_uhead_mthd_scanoutpos()
54 args->v0.vtotal = head->arm.vtotal; in nvkm_uhead_mthd_scanoutpos()
55 args->v0.vblanks = head->arm.vblanks; in nvkm_uhead_mthd_scanoutpos()
56 args->v0.vblanke = head->arm.vblanke; in nvkm_uhead_mthd_scanoutpos()
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/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6ul-var-som.dtsi1 // SPDX-License-Identifier: GPL-2.0+
3 * Support for Variscite VAR-SOM-MX6UL Module
9 /dts-v1/;
12 #include <dt-bindings/clock/imx6ul-clock.h>
13 #include <dt-bindings/gpio/gpio.h>
16 model = "Variscite VAR-SOM-MX6UL module";
17 compatible = "variscite,var-som-imx6ul", "fsl,imx6ul";
24 reg_gpio_dvfs: reg-gpio-dvfs {
25 compatible = "regulator-gpio";
26 regulator-min-microvolt = <1300000>;
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H A Dimx6ull-engicam-microgea-bmm.dts1 // SPDX-License-Identifier: GPL-2.0
7 /dts-v1/;
9 #include "imx6ull-engicam-microgea.dtsi"
12 compatible = "engicam,microgea-imx6ull-bmm",
13 "engicam,microgea-imx6ull", "fsl,imx6ull";
17 compatible = "pwm-backlight";
18 brightness-levels = <0 100>;
19 num-interpolated-steps = <100>;
20 default-brightness-level = <85>;
25 compatible = "pwm-beeper";
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H A Dimx6ul-imx6ull-opos6uldev.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
7 stdout-path = &uart1;
11 compatible = "pwm-backlight";
13 brightness-levels = <0 4 8 16 32 64 128 255>;
14 default-brightness-level = <7>;
15 power-supply = <&reg_5v>;
19 gpio-keys {
20 compatible = "gpio-keys";
21 pinctrl-names = "default";
22 pinctrl-0 = <&pinctrl_gpio_keys>;
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H A Dimx6ul-geam.dts1 // SPDX-License-Identifier: GPL-2.0 OR X11
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
15 compatible = "engicam,imx6ul-geam", "fsl,imx6ul";
23 compatible = "pwm-backlight";
25 brightness-levels = < 0 1 2 3 4 5 6 7 8 9
36 default-brightness-level = <100>;
40 stdout-path = &uart1;
43 reg_1p8v: regulator-1p8v {
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H A Dimx6ull-dhcom-som.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
6 #include "imx6ull-dhcor-som.dtsi"
10 /delete-property/ spi2;
11 /delete-property/ spi3;
28 stdout-path = "serial0:115200n8";
31 reg_ext_3v3_ref: regulator-ext-3v3-ref {
32 compatible = "regulator-fixed";
33 regulator-always-on;
34 regulator-max-microvolt = <3300000>;
35 regulator-min-microvolt = <3300000>;
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/linux/Documentation/devicetree/bindings/iio/proximity/
H A Dsemtech,sx9324.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Gwendal Grignou <gwendal@chromium.org>
11 - Daniel Campello <campello@chromium.org>
17 - $ref: /schemas/iio/iio.yaml#
32 vdd-supply:
35 svdd-supply:
38 "#io-channel-cells":
41 semtech,ph0-pin:
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/linux/Documentation/scsi/
H A Dscsi_eh.rst1 .. SPDX-License-Identifier: GPL-2.0
14 [1-1] struct scsi_cmnd
15 [1-2] How do scmd's get completed?
16 [1-2-1] Completing a scmd w/ scsi_done
17 [1-2-2] Completing a scmd w/ timeout
18 [1-3] How EH takes over
20 [2-1] EH through fine-grained callbacks
21 [2-1-1] Overview
22 [2-1-2] Flow of scmds through EH
23 [2-1-3] Flow of control
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/linux/drivers/input/keyboard/
H A Dqt1050.c1 // SPDX-License-Identifier: GPL-2.0
80 /* Charge Share Delay */
229 err = regmap_read(ts->regmap, QT1050_CHIP_ID, &val); in qt1050_identify()
231 dev_err(&ts->client->dev, "Failed to read chip ID: %d\n", err); in qt1050_identify()
236 dev_err(&ts->client->dev, "ID %d not supported\n", val); in qt1050_identify()
241 err = regmap_read(ts->regmap, QT1050_FW_VERSION, &val); in qt1050_identify()
243 dev_err(&ts->client->dev, "could not read the firmware version\n"); in qt1050_identify()
247 dev_info(&ts->client->dev, "AT42QT1050 firmware version %1d.%1d\n", in qt1050_identify()
256 struct input_dev *input = ts->input; in qt1050_irq_threaded()
262 err = regmap_read(ts->regmap, QT1050_DET_STATUS, &val); in qt1050_irq_threaded()
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/linux/mm/
H A Dmemcontrol.c1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /* memcontrol.c - Memory Controller
19 * Charge lifetime sanitation
28 #include <linux/cgroup-defs.h>
40 #include <linux/page-flags.h>
41 #include <linux/backing-dev.h>
70 #include "memcontrol-v1.h"
108 (current->flags & PF_EXITING); in task_is_dying()
116 return &memcg->vmpressure; in memcg_to_vmpressure()
146 * objcg->nr_charged_bytes can't have an arbitrary byte value. in obj_cgroup_release()
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/linux/drivers/gpu/drm/amd/display/dc/gpio/dcn10/
H A Dhw_translate_dcn10.c2 * Copyright 2013-15 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
27 * Pre-requisites: headers required by header of this unit
47 /* compile time expand base address. */
212 info->mask = DC_GPIO_DDC6_A__DC_GPIO_DDC6DATA_A_MASK; in id_to_offset()
215 info->offset = REG(DC_GPIO_DDC1_A); in id_to_offset()
218 info->offset = REG(DC_GPIO_DDC2_A); in id_to_offset()
221 info->offset = REG(DC_GPIO_DDC3_A); in id_to_offset()
224 info->offset = REG(DC_GPIO_DDC4_A); in id_to_offset()
227 info->offset = REG(DC_GPIO_DDC5_A); in id_to_offset()
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/linux/drivers/gpu/drm/amd/display/dc/gpio/dce120/
H A Dhw_translate_dce120.c2 * Copyright 2013-15 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
27 * Pre-requisites: headers required by header of this unit
47 /* compile time expand base address. */
212 info->mask = DC_GPIO_DDC6_A__DC_GPIO_DDC6DATA_A_MASK; in id_to_offset()
215 info->offset = REG(DC_GPIO_DDC1_A); in id_to_offset()
218 info->offset = REG(DC_GPIO_DDC2_A); in id_to_offset()
221 info->offset = REG(DC_GPIO_DDC3_A); in id_to_offset()
224 info->offset = REG(DC_GPIO_DDC4_A); in id_to_offset()
227 info->offset = REG(DC_GPIO_DDC5_A); in id_to_offset()
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/linux/arch/x86/platform/pvh/
H A Dhead.S1 /* SPDX-License-Identifier: GPL-2.0 */
10 #define _pa(x) ((x) - __START_KERNEL_map)
12 #define rva(x) ((x) - pvh_start_xen)
22 #include <asm/processor-flags.h>
24 #include <asm/nospec-branch.h>
34 * - `ebx`: contains the physical memory address where the loader has placed
36 * - `cr0`: bit 0 (PE) must be set. All the other writeable bits are cleared.
37 * - `cr4`: all bits are cleared.
38 * - `cs `: must be a 32-bit read/execute code segment with a base of `0`
40 * - `ds`, `es`: must be a 32-bit read/write data segment with a base of
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/linux/drivers/misc/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
27 See Documentation/misc-devices/ad525x_dpot.rst for the
40 module will be called ad525x_dpot-i2c.
51 module will be called ad525x_dpot-spi.
65 This option enables device driver support for in-band access to the
78 website <https://www-03.ibm.com/systems/info/x86servers/serverproven/compat/us/>
112 UFS. Provides interface for in-kernel security controllers to access
211 called smpro-errmon.
221 called smpro-misc.
224 tristate "CS5535/CS5536 Geode Multi-Function General Purpose Timer (MFGPT) support"
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/linux/drivers/firmware/arm_scmi/
H A Dnotify.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2020-2021 ARM Ltd.
36 * All users provided callbacks and allocated notification-chains are stored in
44 * hash-keys.
54 * pushes the event-data itself on a protocol-dedicated kfifo queue for further
59 * queued items into the proper notification-chain: notifications processing can
62 * still strictly sequentially ordered by time of arrival.
65 * conveyed, converted into a custom per-event report struct, as the void *data
73 #define dev_fmt(fmt) "SCMI Notifications - " fmt
74 #define pr_fmt(fmt) "SCMI Notifications - " fmt
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/linux/include/linux/sched/
H A Dmm.h1 /* SPDX-License-Identifier: GPL-2.0 */
19 * mmgrab() - Pin a &struct mm_struct.
28 * of time.
32 * See also <Documentation/mm/active_mm.rst> for an in-depth explanation
37 atomic_inc(&mm->mm_count); in mmgrab()
52 * user-space, after storing to rq->curr. in mmdrop()
54 if (unlikely(atomic_dec_and_test(&mm->mm_count))) in mmdrop()
77 if (atomic_dec_and_test(&mm->mm_count)) in mmdrop_sched()
78 call_rcu(&mm->delayed_drop, __mmdrop_delayed); in mmdrop_sched()
116 * mmget() - Pin the address space associated with a &struct mm_struct.
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/linux/include/linux/
H A Dslab.h1 /* SPDX-License-Identifier: GPL-2.0 */
8 * (C) Linux Foundation 2008-2013
21 #include <linux/percpu-refcount.h>
71 * The ones marked DEBUG need CONFIG_SLUB_DEBUG enabled, otherwise are no-op
82 * define SLAB_HWCACHE_ALIGN - Align objects on cache line boundaries.
102 * define SLAB_TYPESAFE_BY_RCU - **WARNING** READ THIS!
106 * that memory location is free to be reused at any time. Thus it may
123 * if (obj->key != key) { // not the object we expected
155 * the locks at page-allocation time, as is done in __i915_request_ctor(),
157 * to safely acquire those ctor-initialized locks under rcu_read_lock()
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/linux/Documentation/driver-api/dmaengine/
H A Dprovider.rst20 DMA-eligible devices to the controller itself. Whenever the device
34 that requires data to be written exactly 16 or 24 bits at a time. This
44 transfer into smaller sub-transfers.
49 non-contiguous buffers to a contiguous buffer, which is called
50 scatter-gather.
53 scatter-gather. So we're left with two cases here: either we have a
56 that implements in hardware scatter-gather.
79 These were just the general memory-to-memory (also called mem2mem) or
80 memory-to-device (mem2dev) kind of transfers. Most devices often
91 Over time, the need for memory to device transfers arose, and
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/linux/drivers/gpu/drm/amd/display/amdgpu_dm/
H A Damdgpu_dm.h1 /* SPDX-License-Identifier: MIT */
3 * Copyright (C) 2015-2020 Advanced Micro Devices, Inc. All rights reserved.
5 * Permission is hereby granted, free of charge, to any person obtaining a
100 * struct dm_compressor_info - Buffer info used by frame buffer compression
114 * struct dmub_hpd_work - Handle time consuming work in low priority outbox IRQ
127 * struct vblank_control_work - Work data for vblank control
143 * struct idle_workqueue - Work data for periodic action in idle
157 * struct vupdate_offload_work - Work data for offloading task from vupdate handler
173 * struct amdgpu_dm_luminance_data - Custom luminance data
175 * @input_signal: Input signal in range 0-255
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/linux/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/
H A Dsmu13_driver_if_v13_0_0.h4 * Permission is hereby granted, free of charge, to any person obtaining a
503 uint8_t SnapToDiscrete; // 0 - Fine grained DPM, 1 - Discrete DPM
506 LinearInt_t ConversionToAvfsClk; // Transfer function to AVFS Clock (GHz->GHz)
976 …// Per year normalized Vmax state failure rates (sum of the two domains divided by life time in ye…
1007 …uint16_t Vmin_Hot_T0[PMFW_VOLT_PLANE_COUNT]; //In mV(Q2) Initial (pre-aging) Vse…
1008 …uint16_t Vmin_Cold_T0[PMFW_VOLT_PLANE_COUNT]; //In mV(Q2) Initial (pre-aging) Vse…
1009 …uint16_t Vmin_Hot_Eol[PMFW_VOLT_PLANE_COUNT]; //In mV(Q2) End-of-life Vset to be …
1010 …uint16_t Vmin_Cold_Eol[PMFW_VOLT_PLANE_COUNT]; //In mV(Q2) End-of-life Vset to be …
1011 uint16_t Vmin_Aging_Offset[PMFW_VOLT_PLANE_COUNT]; //In mV(Q2) Worst-case aging margin
1017 …//Linear offset or GB term to account for mis-correlation between PSM and Vmin shift trends across…
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H A Dsmu13_driver_if_v13_0_7.h4 * Permission is hereby granted, free of charge, to any person obtaining a
504 uint8_t SnapToDiscrete; // 0 - Fine grained DPM, 1 - Discrete DPM
507 LinearInt_t ConversionToAvfsClk; // Transfer function to AVFS Clock (GHz->GHz)
985 …// Per year normalized Vmax state failure rates (sum of the two domains divided by life time in ye…
1016 …uint16_t Vmin_Hot_T0[PMFW_VOLT_PLANE_COUNT]; //In mV(Q2) Initial (pre-aging) Vse…
1017 …uint16_t Vmin_Cold_T0[PMFW_VOLT_PLANE_COUNT]; //In mV(Q2) Initial (pre-aging) Vse…
1018 …uint16_t Vmin_Hot_Eol[PMFW_VOLT_PLANE_COUNT]; //In mV(Q2) End-of-life Vset to be …
1019 …uint16_t Vmin_Cold_Eol[PMFW_VOLT_PLANE_COUNT]; //In mV(Q2) End-of-life Vset to be …
1020 uint16_t Vmin_Aging_Offset[PMFW_VOLT_PLANE_COUNT]; //In mV(Q2) Worst-case aging margin
1026 …//Linear offset or GB term to account for mis-correlation between PSM and Vmin shift trends across…
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