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/freebsd/sys/contrib/device-tree/src/arm64/freescale/
H A Dfsl-lx2160a-rev2.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 /dts-v1/;
9 #include "fsl-lx2160a.dtsi"
12 compatible = "fsl,lx2160ar2-pcie", "fsl,ls2088a-pcie";
15 reg-names = "regs", "config";
21 interrupt-names = "intr";
23 /delete-property/ apio-wins;
24 /delete-property/ ppio-wins;
28 compatible = "fsl,lx2160ar2-pcie", "fsl,ls2088a-pcie";
31 reg-names = "regs", "config";
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H A Dfsl-lx2160a.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 // Device Tree Include file for Layerscape-LX2160A family SoC.
5 // Copyright 2018-2020 NXP
7 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/thermal/thermal.h>
16 interrupt-parent = <&gic>;
17 #address-cells = <2>;
18 #size-cells = <2>;
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/freebsd/sys/contrib/device-tree/Bindings/pci/
H A Dmbvl,gpex40-pcie.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/mbvl,gpex40-pcie.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Frank Li <Frank Li@nxp.com>
21 - fsl,lx2160a-pcie
22 - mbvl,gpex40-pcie
26 - description: PCIe controller registers
27 - description: Bridge config registers
28 - description: GPIO registers to control slot power
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H A Dmobiveil-pcie.txt7 - #address-cells: Address representation for root ports, set to <3>
8 - #size-cells: Size representation for root ports, set to <2>
9 - #interrupt-cells: specifies the number of cells needed to encode an
11 - compatible: Should contain "mbvl,gpex40-pcie"
12 - reg: Should contain PCIe registers location and length
20 - device_type: must be "pci"
21 - apio-wins : number of requested apio outbound windows
22 default 2 outbound windows are configured -
25 - ppio-wins : number of requested ppio inbound windows
27 - bus-range: PCI bus numbers covered
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H A Dlayerscape-pcie-gen4.txt4 the common properties defined in mobiveil-pcie.txt.
7 - compatible: should contain the platform identifier such as:
8 "fsl,lx2160a-pcie"
9 - reg: base addresses and lengths of the PCIe controller register blocks.
12 - interrupts: A list of interrupt outputs of the controller. Must contain an
13 entry for each entry in the interrupt-names property.
14 - interrupt-names: It could include the following entries:
17 none MSI/MSI-X/INTx mode,but there is interrupt line for aer.
19 none MSI/MSI-X/INTx mode,but there is interrupt line for pme.
20 - dma-coherent: Indicates that the hardware IP block can ensure the coherency
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