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/linux/Documentation/devicetree/bindings/display/panel/
H A Dpanel-edp.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/panel/panel-edp.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Douglas Anderson <dianders@chromium.org>
14 to a Embedded DisplayPort AUX bus (see display/dp-aux-bus.yaml) without
17 board, either for second-sourcing purposes or to support multiple SKUs
18 with different LCDs that hook up to a common board.
27 provided anywhere on the DP AUX bus is the power sequencing timings.
30 power on timings for any panels expected to be connected to a board are
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/linux/Documentation/devicetree/bindings/sound/
H A Dcs35l33.txt5 - compatible : "cirrus,cs35l33"
7 - reg : the I2C address of the device for I2C
9 - VA-supply, VP-supply : power supplies for the device,
15 - reset-gpios : gpio used to reset the amplifier
17 - interrupts : IRQ line info CS35L33.
18 (See Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
21 - cirrus,boost-ctl : Booster voltage use to supply the amp. If the value is
26 - cirrus,ramp-rate : On power up, it affects the time from when the power
27 up sequence begins to the time the audio reaches a full-scale output.
28 On power down, it affects the time from when the power-down sequence
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H A Drealtek,rt1015.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jack Yu <jack.yu@realtek.com>
15 - realtek,rt1015
20 realtek,power-up-delay-ms:
21 description: Set a delay time for flush work to be completed,
26 - compatible
27 - reg
32 - |
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H A Dadi,adau7002.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Analog Devices ADAU7002 Stereo PDM-to-I2S/TDM Converter
10 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
13 - $ref: dai-common.yaml#
19 IOVDD-supply:
21 IOVDD power supply, if skipped then it is assumed that the supply pin is
24 wakeup-delay-ms:
26 Delay after power up needed for device to settle.
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/linux/Documentation/devicetree/bindings/mfd/
H A Drohm,bd71847-pmic.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mfd/rohm,bd71847-pmic.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ROHM BD71847 and BD71850 Power Management Integrated Circuit
10 - Matti Vaittinen <mazziesaccount@gmail.com>
13 BD71847AMWV and BD71850MWV are programmable Power Management ICs for powering
14 single-core, dual-core, and quad-core SoCs such as NXP-i.MX 8M. It is
18 …s://www.rohm.com/products/power-management/power-management-ic-for-system/industrial-consumer-appl…
19 …s://www.rohm.com/products/power-management/power-management-ic-for-system/industrial-consumer-appl…
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/linux/Documentation/devicetree/bindings/mmc/
H A Dmmc-pwrseq-simple.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mmc/mmc-pwrseq-simple.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Simple MMC power sequence provider
10 - Ulf Hansson <ulf.hansson@linaro.org>
13 The purpose of the simple MMC power sequence provider is to supports a set
19 const: mmc-pwrseq-simple
21 reset-gpios:
27 at initialization and prior we start the power up procedure of the card.
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/linux/drivers/phy/intel/
H A Dphy-intel-keembay-emmc.c1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <linux/delay.h>
66 ret = regmap_update_bits(priv->syscfg, PHY_CFG_0, PWR_DOWN_MASK, in keembay_emmc_phy_power()
69 dev_err(&phy->dev, "CALIO power down bar failed: %d\n", ret); in keembay_emmc_phy_power()
73 ret = regmap_update_bits(priv->syscfg, PHY_CFG_0, DLL_EN_MASK, in keembay_emmc_phy_power()
76 dev_err(&phy->dev, "turn off the dll failed: %d\n", ret); in keembay_emmc_phy_power()
80 /* Already finish power off above */ in keembay_emmc_phy_power()
84 mhz = DIV_ROUND_CLOSEST(clk_get_rate(priv->emmcclk), 1000000); in keembay_emmc_phy_power()
100 dev_warn(&phy->dev, "Unsupported rate: %d MHz\n", mhz); in keembay_emmc_phy_power()
109 ret = regmap_update_bits(priv->syscfg, PHY_CFG_0, PWR_DOWN_MASK, in keembay_emmc_phy_power()
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H A Dphy-intel-lgm-emmc.c1 // SPDX-License-Identifier: GPL-2.0
9 #include <linux/delay.h>
64 ret = regmap_update_bits(priv->syscfg, EMMC_PHYCTRL1_REG, PDB_MASK, in intel_emmc_phy_power()
67 dev_err(&phy->dev, "CALIO power down bar failed: %d\n", ret); in intel_emmc_phy_power()
75 rate = clk_get_rate(priv->emmcclk); in intel_emmc_phy_power()
78 dev_warn(&phy->dev, "Unsupported rate: %lu\n", rate); in intel_emmc_phy_power()
88 ret = regmap_update_bits(priv->syscfg, EMMC_PHYCTRL1_REG, PDB_MASK, in intel_emmc_phy_power()
91 dev_err(&phy->dev, "CALIO power down bar failed: %d\n", ret); in intel_emmc_phy_power()
102 ret = regmap_read_poll_timeout(priv->syscfg, EMMC_PHYSTAT_REG, in intel_emmc_phy_power()
106 dev_err(&phy->dev, "caldone failed, ret=%d\n", ret); in intel_emmc_phy_power()
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/linux/tools/power/pm-graph/
H A DREADME8 pm-graph: suspend/resume/boot timing analysis tools
11 …Home Page: https://www.intel.com/content/www/us/en/developer/topic-technology/open/pm-graph/overvi…
13 Report bugs/issues at bugzilla.kernel.org Tools/pm-graph
14 - https://bugzilla.kernel.org/buglist.cgi?component=pm-graph&product=Tools
17 - Getting Started:
20 - Feature Summary:
21 https://www.intel.com/content/www/us/en/developer/topic-technology/open/pm-graph/features.html
23 - upstream version in git:
24 git clone https://github.com/intel/pm-graph/
27 - Overview
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/linux/include/linux/mfd/wm8994/
H A Dpdata.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * include/linux/mfd/wm8994/pdata.h -- Platform data for WM8994
39 * panel provided by the WISCE - see http://www.wolfsonmicro.com/wisce/
52 * control panel in WISCE - see http://www.wolfsonmicro.com/wisce/
64 * WISCE - see http://www.wolfsonmicro.com/wisce/
78 * multiband compressor configuration panel in WISCE - see
89 * multiband compressor configuration panel in WISCE - see
100 * the multiband compressor configuration panel in WISCE - see
109 * Microphone detection rates, used to tune response rates and power
129 * Default values for GPIOs if non-zero, WM8994_CONFIGURE_GPIO
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/linux/tools/power/pm-graph/config/
H A Dexample.cfg9 # sudo ./sleepgraph.py -config config/example.cfg
14 # ---- General Options ----
26 output-dir: suspend-{hostname}-{date}-{time}
49 # Enable/disable runtime suspend for all devices, restore all after test (default: no-action)
53 # Switch the display on/off for the test using xset (default: no-action)
57 # Print the status of the test run in the given file (default: no-action)
64 # ---- Advanced Options ----
67 # command: echo mem > /sys/power/state
85 # Back to Back Suspend Delay
86 # Time delay between the two test runs in ms (default: 0 ms)
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/linux/drivers/soc/bcm/brcmstb/pm/
H A Ds2-mips.S1 /* SPDX-License-Identifier: GPL-2.0-only */
38 * s3: I-Cache line size
51 /* Lock this asm section into the I-cache */
52 addiu t1, s3, -1
65 /* Lock the interrupt vector into the I-cache */
77 /* Power down request */
109 /* 1ms delay needed for stable recovery */
110 /* Use TIMER1 to count 1 ms */
119 /* Prepare delay */
123 /* 1ms delay */
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/linux/arch/arm64/boot/dts/allwinner/
H A Dsun50i-a64-pine64-plus.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 #include "sun50i-a64-pine64.dts"
8 compatible = "pine64,pine64-plus", "allwinner,sun50i-a64";
14 pinctrl-names = "default";
15 pinctrl-0 = <&rgmii_pins>;
16 phy-mode = "rgmii-txid";
17 phy-handle = <&ext_rgmii_phy>;
22 ext_rgmii_phy: ethernet-phy@1 {
23 compatible = "ethernet-phy-ieee802.3-c22";
30 * Ethernet PHY needs 30ms to properly power up and some more
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/linux/arch/arm64/boot/dts/qcom/
H A Dsc7280-herobrine-crd.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
10 #include "sc7280-herobrine.dtsi"
11 #include "sc7280-herobrine-audio-wcd9385.dtsi"
12 #include "sc7280-herobrine-lte-sku.dtsi"
27 vreg_edp_bl_crd: vreg-edp-bl-crd-regulator {
28 compatible = "regulator-fixed";
29 regulator-name = "vreg_edp_bl_crd";
32 enable-active-high;
33 pinctrl-names = "default";
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H A Dsc7280-crd-r3.dts1 // SPDX-License-Identifier: BSD-3-Clause
8 /dts-v1/;
10 #include "sc7280-idp.dtsi"
11 #include "sc7280-idp-ec-h1.dtsi"
14 model = "Qualcomm Technologies, Inc. sc7280 CRD platform (rev3 - 4)";
15 compatible = "qcom,sc7280-crd",
16 "google,hoglin-rev3", "google,hoglin-rev4",
17 "google,piglin-rev3", "google,piglin-rev4",
25 stdout-path = "serial0:115200n8";
30 regulators-2 {
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/linux/arch/arm64/boot/dts/mediatek/
H A Dmt8173-elm-hana.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
6 #include "mt8173-elm.dtsi"
9 clock-frequency = <200000>;
16 interrupts-extended = <&pio 88 IRQ_TYPE_LEVEL_LOW>;
17 status = "fail-needs-probe";
22 * Gen (MTK) are using synaptics touchscreen (hid-over-i2c driver) as a
26 compatible = "hid-over-i2c";
28 hid-descr-addr = <0x0020>;
29 interrupts-extended = <&pio 88 IRQ_TYPE_LEVEL_LOW>;
30 status = "fail-needs-probe";
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H A Dmt8186-corsola-krabby.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 /dts-v1/;
7 #include "mt8186-corsola.dtsi"
8 #include <dt-bindings/gpio/gpio.h>
17 remote-endpoint = <&ps8640_in>;
21 clock-frequency = <400000>;
23 edp-bridge@8 {
26 pinctrl-names = "default";
27 pinctrl-0 = <&ps8640_pins>;
28 powerdown-gpios = <&pio 96 GPIO_ACTIVE_LOW>;
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/linux/drivers/gpu/drm/panel/
H A Dpanel-panasonic-vvx10f034n00.c1 // SPDX-License-Identifier: GPL-2.0-only
10 #include <linux/delay.h>
23 * When power is turned off to this panel a minimum off time of 500ms has to be
25 * track of earliest wakeup time and delay subsequent prepare call accordingly
47 return mipi_dsi_turn_on_peripheral(wuxga_nt->dsi); in wuxga_nt_panel_on()
54 return mipi_dsi_shutdown_peripheral(wuxga_nt->dsi); in wuxga_nt_panel_disable()
61 regulator_disable(wuxga_nt->supply); in wuxga_nt_panel_unprepare()
62 wuxga_nt->earliest_wake = ktime_add_ms(ktime_get_real(), MIN_POFF_MS); in wuxga_nt_panel_unprepare()
74 * If the user re-enabled the panel before the required off-time then in wuxga_nt_panel_prepare()
75 * we need to wait the remaining period before re-enabling regulator in wuxga_nt_panel_prepare()
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H A Dpanel-edp.c17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
25 #include <linux/delay.h>
46 * struct panel_delay - Describes delays for a simple panel.
57 * Presumably some old panels simply didn't have HPD hooked up and put
59 * hpd_absent. While that works, it's non-ideal.
64 * @hpd_absent: Time to wait if HPD isn't hooked up.
66 * Add this to the prepare delay if we know Hot Plug Detect isn't used.
68 * This is T3-max on eDP timing diagrams or the delay from power on
79 * This is (T3+T4+T5+T6+T8)-min on eDP timing diagrams or after the
80 * power supply enabled until we can turn the backlight on and see
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/linux/arch/arm64/boot/dts/rockchip/
H A Drk3399-gru-chromebook.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Google Gru-Chromebook shared properties
8 #include "rk3399-gru.dtsi"
11 pp900_ap: regulator-pp900-ap {
12 compatible = "regulator-fixed";
13 regulator-name = "pp900_ap";
16 regulator-always-on;
17 regulator-boot-on;
18 regulator-min-microvolt = <900000>;
19 regulator-max-microvolt = <900000>;
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/linux/Documentation/devicetree/bindings/cpu/
H A Didle-states.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/cpu/idle-states.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
11 - Anup Patel <anup@brainfault.org>
15 1 - Introduction
18 ARM and RISC-V systems contain HW capable of managing power consumption
19 dynamically, where cores can be put in different low-power states (ranging
20 from simple wfi to power gating) according to OS PM policies. The CPU states
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/linux/drivers/iio/light/
H A Dbh1780.c1 // SPDX-License-Identifier: GPL-2.0-only
14 #include <linux/delay.h>
34 /* power on settling time in ms */
36 /* max time before value available in ms */
45 int ret = i2c_smbus_write_byte_data(bh1780->client, in bh1780_write()
49 dev_err(&bh1780->client->dev, in bh1780_write()
58 int ret = i2c_smbus_read_byte_data(bh1780->client, in bh1780_read()
61 dev_err(&bh1780->client->dev, in bh1780_read()
70 int ret = i2c_smbus_read_word_data(bh1780->client, in bh1780_read_word()
73 dev_err(&bh1780->client->dev, in bh1780_read_word()
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/linux/drivers/pci/
H A Dpci.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright 1993 -- 1997 Drew Eckhardt, Frederic Potter,
6 * David Mosberger-Tang
8 * Copyright 1997 -- 2000 Martin Mares <mj@ucw.cz>
13 #include <linux/delay.h>
82 unsigned int delay_ms = max(dev->d3hot_delay, pci_pm_d3hot_delay); in pci_dev_d3_sleep()
86 /* Use a 20% upper bound, 1ms minimum */ in pci_dev_d3_sleep()
95 return dev->reset_methods[0] != 0; in pci_reset_supported()
114 * pci=hpmmiosize=nnM overrides non-prefetchable MMIO size,
125 /* PCIe MPS/MRRS strategy; can be overridden by kernel command-line param */
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/linux/drivers/iio/accel/
H A Dkxsd9.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * Copyright (c) 2008-2009 Jonathan Cameron <jic23@kernel.org>
9 * I have a suitable wire made up.
22 #include <linux/delay.h>
61 #define KXSD9_CTRL_B_ST BIT(5) /* Self-test */
66 * struct kxsd9_state - device related storage
89 #define KXSD9_ZERO_G_OFFSET -2048
109 return -EINVAL; in kxsd9_write_scale()
111 ret = regmap_update_bits(st->map, in kxsd9_write_scale()
119 st->scale = i; in kxsd9_write_scale()
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/linux/drivers/phy/rockchip/
H A Dphy-rockchip-emmc.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2016 Shawn Lin <shawn.lin@rock-chips.com>
10 #include <linux/delay.h>
20 * The higher 16-bit of this register is used for write protection
106 regmap_write(rk_phy->reg_base, in rockchip_emmc_phy_power()
107 rk_phy->reg_offset + GRF_EMMCPHY_CON6, in rockchip_emmc_phy_power()
111 regmap_write(rk_phy->reg_base, in rockchip_emmc_phy_power()
112 rk_phy->reg_offset + GRF_EMMCPHY_CON6, in rockchip_emmc_phy_power()
121 rate = clk_get_rate(rk_phy->emmcclk); in rockchip_emmc_phy_power()
146 rate - ideal_rate : ideal_rate - rate; in rockchip_emmc_phy_power()
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