/linux/arch/arm64/boot/dts/apple/ |
H A D | t600x-pmgr.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 3 * PMGR Power domains for the Apple T6001 "M1 Max" SoC 9 DIE_NODE(ps_pms_bridge): power-controller@100 { 10 compatible = "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 12 #power-domain-cells = <0>; 13 #reset-cells = <0>; 15 apple,always-on; /* Core device */ 18 DIE_NODE(ps_aic): power-controller@108 { 19 compatible = "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 21 #power-domain-cells = <0>; [all …]
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H A D | t8112-pmgr.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 3 * PMGR Power domains for the Apple T8112 "M2" SoC 10 ps_sbr: power-controller@100 { 11 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; 13 #power-domain-cells = <0>; 14 #reset-cells = <0>; 16 apple,always-on; /* Core device */ 19 ps_aic: power-controller@108 { 20 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; 22 #power-domain-cells = <0>; [all …]
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H A D | t8012-pmgr.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 3 * PMGR Power domains for the Apple T8012 "T2" SoC 9 ps_cpu0: power-controller@80000 { 10 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 12 #power-domain-cells = <0>; 13 #reset-cells = <0>; 15 apple,always-on; /* Core device */ 18 ps_cpu1: power-controller@80008 { 19 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 21 #power-domain-cells = <0>; [all …]
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H A D | t8103-pmgr.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 3 * PMGR Power domains for the Apple T8103 "M1" SoC 10 ps_sbr: power-controller@100 { 11 compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate"; 13 #power-domain-cells = <0>; 14 #reset-cells = <0>; 16 apple,always-on; /* Core device */ 19 ps_aic: power-controller@108 { 20 compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate"; 22 #power-domain-cells = <0>; [all …]
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H A D | t8011-pmgr.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 3 * PMGR Power domains for the Apple T8011 "A10X" SoC 9 ps_cpu0: power-controller@80000 { 10 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 12 #power-domain-cells = <0>; 13 #reset-cells = <0>; 15 apple,always-on; /* Core device */ 18 ps_cpu1: power-controller@80008 { 19 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 21 #power-domain-cells = <0>; [all …]
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H A D | s5l8960x-pmgr.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 3 * PMGR Power domains for the Apple S5L8960X "A7" SoC 9 ps_cpu0: power-controller@20000 { 10 compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate"; 12 #power-domain-cells = <0>; 13 #reset-cells = <0>; 15 apple,always-on; /* Core device */ 18 ps_cpu1: power-controller@20008 { 19 compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate"; 21 #power-domain-cells = <0>; [all …]
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H A D | s8001-pmgr.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 3 * PMGR Power domains for the Apple S8001 "A9X" SoC 9 ps_cpu0: power-controller@80000 { 10 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 12 #power-domain-cells = <0>; 13 #reset-cells = <0>; 15 apple,always-on; /* Core device */ 18 ps_cpu1: power-controller@80008 { 19 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 21 #power-domain-cells = <0>; [all …]
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H A D | t7001-pmgr.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 3 * PMGR Power domains for the Apple T7001 "A8X" SoC 9 ps_cpu0: power-controller@20000 { 10 compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 12 #power-domain-cells = <0>; 13 #reset-cells = <0>; 15 apple,always-on; /* Core device */ 18 ps_cpu1: power-controller@20008 { 19 compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 21 #power-domain-cells = <0>; [all …]
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H A D | t8010-pmgr.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 3 * PMGR Power domains for the Apple T8010 "A10" SoC 9 ps_cpu0: power-controller@80000 { 10 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 12 #power-domain-cells = <0>; 13 #reset-cells = <0>; 15 apple,always-on; /* Core device */ 18 ps_cpu1: power-controller@80008 { 19 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 21 #power-domain-cells = <0>; [all …]
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H A D | s800-0-3-pmgr.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 3 * PMGR Power domains for the Apple S8000/3 "A9" SoC 9 ps_cpu0: power-controller@80000 { 10 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 12 #power-domain-cells = <0>; 13 #reset-cells = <0>; 15 apple,always-on; /* Core device */ 18 ps_cpu1: power-controller@80008 { 19 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 21 #power-domain-cells = <0>; [all …]
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H A D | t7000-pmgr.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 3 * PMGR Power domains for the Apple T7000 "A8" SoC 8 ps_cpu0: power-controller@20000 { 9 compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 11 #power-domain-cells = <0>; 12 #reset-cells = <0>; 14 apple,always-on; /* Core device */ 17 ps_cpu1: power-controller@20008 { 18 compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 20 #power-domain-cells = <0>; [all …]
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/linux/Documentation/driver-api/thermal/ |
H A D | power_allocator.rst | 2 Power allocator governor tunables 6 ----------- 10 1. "switch on" trip point: temperature above which the governor 15 "switch on" trip point. This the target temperature the governor 20 -------------- 22 The power allocator governor implements a 23 Proportional-Integral-Derivative controller (PID controller) with 24 temperature as the control input and power as the controlled output: 29 - e = desired_temperature - current_temperature 30 - err_integral is the sum of previous errors [all …]
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H A D | cpu-idle-cooling.rst | 1 .. SPDX-License-Identifier: GPL-2.0 8 ---------- 13 act on a cooling device to mitigate the dissipated power. When the 20 to the static leakage. The only solution is to power down the 24 Last but not least, the system can ask for a specific power budget but 25 because of the OPP density, we can only choose an OPP with a power 26 budget lower than the requested one and under-utilize the CPU, thus 27 losing performance. In other words, one OPP under-utilizes the CPU 28 with a power less than the requested power budget and the next OPP 29 exceeds the power budget. An intermediate OPP could have been used if [all …]
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/linux/Documentation/power/powercap/ |
H A D | dtpm.rst | 1 .. SPDX-License-Identifier: GPL-2.0 4 Dynamic Thermal Power Management framework 7 On the embedded world, the complexity of the SoC leads to an 12 Another aspect is to sustain the performance for a given power budget, 15 reduce the battery charging because the dissipated power is too high 16 compared with the power consumed by other devices. 18 The user space is the most adequate place to dynamically act on the 19 different devices by limiting their power given an application 22 The Dynamic Thermal Power Management (DTPM) is a technique acting on 23 the device power by limiting and/or balancing a power budget among [all …]
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/linux/Documentation/hwmon/ |
H A D | occ.rst | 1 Kernel driver occ-hwmon 12 ----------- 14 This driver supports hardware monitoring for the On-Chip Controller (OCC) 15 embedded on POWER processors. The OCC is a device that collects and aggregates 17 sensor data as well as perform thermal and power management on the system. 20 manually if an "ibm,p8-occ-hwmon" compatible device is found under the 21 appropriate I2C bus node in the device-tree. 23 The P9 version of this driver is a client driver of the FSI-based OCC driver. 24 It will be probed automatically by the FSI-based OCC driver. 27 ------------- [all …]
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/linux/Documentation/devicetree/bindings/mfd/ |
H A D | maxim,max77802.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Maxim MAX77802 Power Management IC 10 - Javier Martinez Canillas <javier@dowhile0.org> 11 - Krzysztof Kozlowski <krzk@kernel.org> 14 This is a part of device tree bindings for Maxim MAX77802 Power Management 17 The Maxim MAX77802 is a Power Management IC which includes voltage and 18 current regulators (10 high efficiency Buck regulators and 32 Low-DropOut 23 in dt-bindings/clock/maxim,max77802.h. [all …]
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/linux/Documentation/driver-api/usb/ |
H A D | power-management.rst | 1 .. _usb-power-management: 3 Power Management for USB 7 :Date: Last-updated: February 2014 11 --------- 12 * What is Power Management? 17 * Changing the default idle-delay time 19 * The driver interface for Power Management 25 * USB Port Power Control 26 * User Interface for Port Power Control 27 * Suggested Userspace Port Power Policy [all …]
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/linux/Documentation/networking/device_drivers/wifi/intel/ |
H A D | ipw2100.rst | 1 .. SPDX-License-Identifier: GPL-2.0 10 - Intel(R) PRO/Wireless 2100 Network Connection 12 Copyright |copy| 2003-2006, Intel Corporation 16 :Version: git-1.1.5 23 2. Release git-1.1.5 Current Features 28 7. Power Management 51 parameters include, without limitation, RF power, spectrum usage, 64 the warranty and/or issues arising from regulatory non-compliance, and 69 modules, and accordingly, condition system-level regulatory approval 72 non-compliant. [all …]
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/linux/Documentation/trace/coresight/ |
H A D | coresight-cpu-debug.rst | 9 ------------ 11 Coresight CPU debug module is defined in ARMv8-a architecture reference manual 13 debug module and it is mainly used for two modes: self-hosted debug and 15 debugger connects with SoC from JTAG port; on the other hand the program can 16 explore debugging method which rely on self-hosted debug mode, this document 17 is to focus on this part. 19 The debug module provides sample-based profiling extension, which can be used 21 every CPU has one dedicated debug module to be connected. Based on self-hosted 29 -------------- 31 - During driver registration, it uses EDDEVID and EDDEVID1 - two device ID [all …]
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/linux/Documentation/devicetree/bindings/soc/tegra/ |
H A D | nvidia,tegra20-pmc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/soc/tegra/nvidia,tegra20-pmc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Tegra Power Management Controller (PMC) 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Jonathan Hunter <jonathanh@nvidia.com> 16 - nvidia,tegra20-pmc 17 - nvidia,tegra30-pmc 18 - nvidia,tegra114-pmc [all …]
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/linux/drivers/pmdomain/bcm/ |
H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 5 bool "BCM2835 power domain driver" 6 depends on ARCH_BCM2835 || (COMPILE_TEST && OF) 11 This enables support for the BCM2835 power domains and reset 12 controller. Any usage of power domains by the Raspberry Pi 13 firmware means that Linux usage of the same power domain 17 bool "Raspberry Pi power domain driver" 18 depends on ARCH_BCM2835 || (COMPILE_TEST && OF) 19 depends on RASPBERRYPI_FIRMWARE=y 22 This enables support for the RPi power domains which can be enabled [all …]
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/linux/Documentation/admin-guide/pm/ |
H A D | sleep-states.rst | 1 .. SPDX-License-Identifier: GPL-2.0 13 Sleep states are global low-power states of the entire system in which user 21 Depending on its configuration and the capabilities of the platform it runs on, 28 Suspend-to-Idle 29 --------------- 31 This is a generic, pure software, light-weight variant of system suspend (also 34 I/O devices into low-power states (possibly lower-power than available in the 38 The system is woken up from this state by in-band interrupts, so theoretically 42 This state can be used on platforms without support for :ref:`standby <standby>` 43 or :ref:`suspend-to-RAM <s2ram>`, or it can be used in addition to any of the [all …]
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/linux/include/linux/mfd/ |
H A D | db8500-prcmu.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 4 * Copyright (C) ST-Ericsson SA 2010 27 /* This portion previously known as <mach/prcmu-fw-defs_v1.h> */ 30 * enum state - ON/OFF state definition 31 * @OFF: State is ON 32 * @ON: State is OFF 37 ON = 0x1, enumerator 41 * enum ret_state - general purpose On/Off/Retention states 51 * enum clk_arm - ARM Cortex A9 clock schemes 67 * enum clk_gen - GEN#0/GEN#1 clock schemes [all …]
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/linux/drivers/power/sequencing/ |
H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 4 tristate "Power Sequencing support" 6 Say Y here to enable the Power Sequencing subsystem. 8 This subsystem is designed to control power to devices that share 9 complex resources and/or require specific power sequences to be run 10 during power-up. 19 depends on OF || COMPILE_TEST 21 Say Y here to enable the power sequencing driver for Qualcomm 25 and WLAN modules whose power is controlled by the PMU module. As the 26 former two share the power-up sequence which is executed by the PMU, [all …]
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/linux/Documentation/devicetree/bindings/sound/ |
H A D | st,sta350.txt | 7 - compatible: "st,sta350" 8 - reg: the I2C address of the device for I2C 9 - reset-gpios: a GPIO spec for the reset pin. If specified, it will be 12 - power-down-gpios: a GPIO spec for the power down pin. If specified, 16 - vdd-dig-supply: regulator spec, providing 3.3V 17 - vdd-pll-supply: regulator spec, providing 3.3V 18 - vcc-supply: regulator spec, providing 5V - 26V 22 - st,output-conf: number, Selects the output configuration: 23 0: 2-channel (full-bridge) power, 2-channel data-out 24 1: 2 (half-bridge). 1 (full-bridge) on-board power [all …]
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