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/linux/drivers/cpuidle/
H A Dcpuidle-cps.c1 // SPDX-License-Identifier: GPL-2.0-or-later
12 #include <asm/pm-cps.h>
17 STATE_NC_WAIT, /* MIPS wait instruction, non-coherent */
18 STATE_CLOCK_GATED, /* Core clock gated */
19 STATE_POWER_GATED, /* Core power gated */
36 if (cpus_are_siblings(0, dev->cpu) && (index > STATE_NC_WAIT)) in cps_nc_enter()
52 return -EINVAL; in cps_nc_enter()
55 /* Notify listeners the CPU is about to power down */ in cps_nc_enter()
57 return -EINTR; in cps_nc_enter()
78 .name = "nc-wait",
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H A Dcpuidle-tegra.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (c) 2010-2013, NVIDIA Corporation.
15 #define pr_fmt(fmt) "tegra-cpuidle: " fmt
68 while (retries--) { in tegra_cpuidle_wait_for_secondary_cpus_parking()
74 * shutdown in order to power-off CPU's cluster safely. in tegra_cpuidle_wait_for_secondary_cpus_parking()
76 * it takes about 40-150us in average and over 1000us in in tegra_cpuidle_wait_for_secondary_cpus_parking()
85 } while (timeout_us--); in tegra_cpuidle_wait_for_secondary_cpus_parking()
94 return -ETIMEDOUT; in tegra_cpuidle_wait_for_secondary_cpus_parking()
134 if (err && err != -ENOSYS) in tegra_cpuidle_c7_enter()
157 return -EINTR; in tegra_cpuidle_coupled_barrier()
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/linux/arch/arm/mach-tegra/
H A Dplatsmp.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/arch/arm/mach-tegra/platsmp.c
26 #include <asm/mach-types.h>
50 * power-gated via the flow controller). This will have no in tegra20_boot_secondary()
58 * power-gate the CPU this will cause the flow controller to in tegra20_boot_secondary()
80 * The power up sequence of cold boot CPU and warm boot CPU in tegra30_boot_secondary()
84 * power will be resumed automatically after un-halting the in tegra30_boot_secondary()
103 * The power status of the cold boot CPU is power gated as in tegra30_boot_secondary()
104 * default. To power up the cold boot CPU, the power should in tegra30_boot_secondary()
105 * be un-gated by un-toggling the power gate register in tegra30_boot_secondary()
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H A Dsleep-tegra30.S1 /* SPDX-License-Identifier: GPL-2.0-only */
11 #include <asm/asm-offsets.h>
37 #define PMC_CTRL_SIDE_EFFECT_LP0 (1 << 14) /* enter LP0 when CPU pwr gated */
81 .arch armv7-a
192 * Puts the current CPU in wait-for-event mode on the flow controller
193 * and powergates it -- flags (in R0) indicate the request type.
196 * corrupts r0-r4, r10-r12
215 * Clear this CPU's "event" and "interrupt" flags and power gate
260 wfeeq @ CPU should be power gated here
293 * CPU power-gating process, to avoid loading from SDRAM which
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H A Dreset-handler.S1 /* SPDX-License-Identifier: GPL-2.0-only */
13 #include <asm/asm-offsets.h>
22 .arch armv7-a
30 * re-enabling sdram.
56 @ & ext flags for CPU power mgnt
74 /* L2 cache resume & re-enable */
106 * r0=3 for the wake-up notification.
135 * must be position-independent.
156 # Tegra20 is a Cortex-A9 r1p1
172 # Tegra30 is a Cortex-A9 r2p9
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/linux/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/
H A Dsmu_v13_0_4_ppsmc.h27 /*! @mainpage PMFW-PPS (PPLib) Message Interface
59 #define PPSMC_MSG_PowerDownVcn 0x06 ///< Power down VCN
60 #define PPSMC_MSG_PowerUpVcn 0x07 ///< Power up VCN; VCN is power gated by defau…
88 #define PPSMC_MSG_SetPowerLimitPercentage 0x20 ///< Set power limit percentage
89 #define PPSMC_MSG_PowerDownJpeg 0x21 ///< Power down Jpeg
90 #define PPSMC_MSG_PowerUpJpeg 0x22 ///< Power up Jpeg; VCN is power gated by defa…
98 #define PPSMC_MSG_PowerDownIspByTile 0x29 ///< ISP is power gated by default
99 #define PPSMC_MSG_PowerUpIspByTile 0x2A ///< This message is used to power up ISP tile…
102 #define PPSMC_MSG_PowerDownUmsch 0x2D ///< Power down VCN.UMSCH (aka VSCH) scheduler
103 #define PPSMC_MSG_PowerUpUmsch 0x2E ///< Power up VCN.UMSCH (aka VSCH) scheduler
/linux/arch/mips/include/asm/
H A Dpm-cps.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
11 * The CM & CPC can only handle coherence & power control on a per-core basis,
25 CPS_PM_NC_WAIT, /* MIPS wait instruction, non-coherent */
26 CPS_PM_CLOCK_GATED, /* Core clock gated */
27 CPS_PM_POWER_GATED, /* Core power gated */
32 * cps_pm_support_state - determine whether the system supports a PM state
40 * cps_pm_enter_state - enter a PM state
43 * Enter the given PM state. If coupled_coherence is non-zero then it is
45 * each coupled CPU. Returns 0 on successful entry & exit, otherwise -errno.
/linux/include/dt-bindings/clock/
H A Dtegra234-clock.h1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright (c) 2018-2022, NVIDIA CORPORATION. All rights reserved. */
78 * throughput and memory controller power.
81 /** @brief CLK_RST_CONTROLLER_CLK_SOURCE_EQOS_AXI_CLK_0 divider gated output */
83 /** @brief CLK_RST_CONTROLLER_CLK_SOURCE_EQOS_PTP_REF_CLK_0 divider gated output */
87 /** @brief CLK_RST_CONTROLLER_CLK_SOURCE_EQOS_TX_CLK divider gated output */
242 /** @brief CLK_RST_CONTROLLER_CLK_SOURCE_SE switch divider gated output */
533 /** @brief NVHS PLL hardware power sequencer (overrides 'manual' programming of PLL) */
589 /** @brief GBE PLL hardware power sequencer */
599 /** @brief PLLE hardware power sequencer (overrides 'manual' programming of PLL) */
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/linux/Documentation/devicetree/bindings/memory-controllers/
H A Drockchip,rk3399-dmc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/rockchip,rk3399-dmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Brian Norris <briannorris@chromium.org>
15 - rockchip,rk3399-dmc
17 devfreq-events:
26 clock-names:
28 - const: dmc_clk
30 operating-points-v2: true
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/linux/drivers/staging/rtl8723bs/include/
H A Dhal_pwr_seq.h1 /* SPDX-License-Identifier: GPL-2.0 */
8 Check document WM-20130815-JackieLau-RTL8723B_Power_Architecture v08.vsd
9 There are 6 HW Power States:
10 0: POFF--Power Off
11 1: PDN--Power Down
12 2: CARDEMU--Card Emulation
13 3: ACT--Active Mode
14 4: LPS--Low Power State
15 5: SUS--Suspend
48 …LL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT1, BIT1},/* wait till 0x04[17] = 1 power ready*/ \
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/linux/drivers/mmc/host/
H A Dtoshsd.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
14 #define SD_PCICFG_GATEDCLK 0x41 /* Gated clock */
22 #define SD_PCICFG_EXTGATECLK1 0xf0 /* Could be used for gated clock */
23 #define SD_PCICFG_EXTGATECLK2 0xf1 /* Could be used for gated clock */
34 #define SD_PCICFG_PWR1_OFF 0x00 /* Turn off power */
/linux/arch/arm/mach-omap2/
H A Dclkt2xxx_dpll.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * OMAP2-specific DPLL control functions
16 #include "cm-regbits-24xx.h"
21 * _allow_idle - enable DPLL autoidle bits
24 * Enable DPLL automatic idle control. The DPLL will enter low-power
25 * stop when its downstream clocks are gated. No return value.
26 * REVISIT: DPLL can optionally enter low-power bypass by writing 0x1
31 if (!clk || !clk->dpll_data) in _allow_idle()
38 * _deny_idle - prevent DPLL from automatically idling
45 if (!clk || !clk->dpll_data) in _deny_idle()
/linux/arch/arm/include/asm/
H A Dmcpm.h1 /* SPDX-License-Identifier: GPL-2.0-only */
6 * Copyright: (C) 2012-2013 Linaro Limited
40 * branch once it is ready to re-enter the kernel using ptr, or NULL if it
41 * should be gated. A gated CPU is held in a WFE loop until its vector
55 * CPU/cluster power operations API for higher subsystems to use.
59 * mcpm_is_available - returns whether MCPM is initialized and available
66 * mcpm_cpu_power_up - make given CPU in given cluster runable
87 * mcpm_cpu_power_down - power the calling CPU down
92 * then the cluster is prepared for power-down too.
96 * On success this does not return. Re-entry in the kernel is expected
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/linux/arch/arm/mach-s3c/
H A Dcpuidle-s3c64xx.c1 // SPDX-License-Identifier: GPL-2.0
19 #include "regs-sys-s3c64xx.h"
20 #include "regs-syscon-power-s3c64xx.h"
47 .desc = "System active, ARM gated",
/linux/include/linux/pinctrl/
H A Dpinctrl-state.h1 /* SPDX-License-Identifier: GPL-2.0 */
25 * but not fully sleeping - some power may be on but clocks gated for
/linux/Documentation/devicetree/bindings/mfd/
H A Dmaxim,max77802.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Maxim MAX77802 Power Management IC
10 - Javier Martinez Canillas <javier@dowhile0.org>
11 - Krzysztof Kozlowski <krzk@kernel.org>
14 This is a part of device tree bindings for Maxim MAX77802 Power Management
17 The Maxim MAX77802 is a Power Management IC which includes voltage and
18 current regulators (10 high efficiency Buck regulators and 32 Low-DropOut
22 (gated/ungated) over I2C. The clock IDs are defined as preprocessor macros
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/linux/Documentation/arch/arm/sunxi/
H A Dclocks.rst11 A: The 24MHz oscillator allows gating to save power. Indeed, if gated
49 A: The linux-sunxi wiki contains a page documenting the clock registers,
52 http://linux-sunxi.org/A10/CCM
57 https://github.com/linux-sunxi/linux-sunxi/tree/sunxi-3.0/arch/arm/mach-sun4i/clock/ccmu
/linux/drivers/soc/samsung/
H A Dexynos5420-pmu.c1 // SPDX-License-Identifier: GPL-2.0
3 // Copyright (c) 2011-2015 Samsung Electronics Co., Ltd.
6 // Exynos5420 - CPU PMU (Power Management Unit) support
10 #include <linux/soc/samsung/exynos-regs-pmu.h>
11 #include <linux/soc/samsung/exynos-pmu.h>
15 #include "exynos-pmu.h"
220 * for local power blocks to Low initially as per Table 8-4: in exynos5420_pmu_init()
221 * "System-Level Power-Down Configuration Registers". in exynos5420_pmu_init()
239 * bridge are gated. Thus, when ISP power is gated, LPI in exynos5420_pmu_init()
/linux/arch/arm/mach-lpc32xx/
H A Dpm.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * arch/arm/mach-lpc32xx/pm.c
12 * LPC32XX CPU and system power management
14 * The LPC32XX has three CPU modes for controlling system power: run,
15 * direct-run, and halt modes. When switching between halt and run modes,
16 * the CPU transistions through direct-run mode. For Linux, direct-run
25 * Direct-run mode:
32 * SYSCLK is gated off and the CPU and system clocks are halted.
36 * wake the system up back into direct-run mode.
41 * SDRAM will still be accessible in direct-run mode. In DDR based systems,
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/linux/drivers/gpu/drm/tegra/
H A Dgr3d.c1 // SPDX-License-Identifier: GPL-2.0-only
62 struct drm_device *dev = dev_get_drvdata(client->host); in gr3d_init()
67 gr3d->channel = host1x_channel_request(client); in gr3d_init()
68 if (!gr3d->channel) in gr3d_init()
69 return -ENOMEM; in gr3d_init()
71 client->syncpts[0] = host1x_syncpt_request(client, flags); in gr3d_init()
72 if (!client->syncpts[0]) { in gr3d_init()
73 err = -ENOMEM; in gr3d_init()
74 dev_err(client->dev, "failed to request syncpoint: %d\n", err); in gr3d_init()
80 dev_err(client->dev, "failed to attach to domain: %d\n", err); in gr3d_init()
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/linux/include/sound/
H A Dsoc-dai.h1 /* SPDX-License-Identifier: GPL-2.0
3 * linux/sound/soc-dai.h -- ALSA SoC Layer
5 * Copyright: 2005-2008 Wolfson Microelectronics. PLC.
58 * DAI bit clocks can be gated (disabled) when the DAI is not
59 * sending or receiving PCM data in a frame. This can be used to save power.
62 #define SND_SOC_DAIFMT_GATED (0 << 4) /* clock is gated */
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/linux/Documentation/driver-api/gpio/
H A Ddrivers-on-gpio.rst6 the right in-kernel and userspace APIs/ABIs for the job, and that these
10 - leds-gpio: drivers/leds/leds-gpio.c will handle LEDs connected to GPIO
13 - ledtrig-gpio: drivers/leds/trigger/ledtrig-gpio.c will provide a LED trigger,
15 (and that LED may in turn use the leds-gpio as per above).
17 - gpio-keys: drivers/input/keyboard/gpio_keys.c is used when your GPIO line
20 - gpio-keys-polled: drivers/input/keyboard/gpio_keys_polled.c is used when your
24 - gpio_mouse: drivers/input/mouse/gpio_mouse.c is used to provide a mouse with
29 - gpio-beeper: drivers/input/misc/gpio-beeper.c is used to provide a beep from
31 off/on, for an actual PWM waveform, see pwm-gpio below.)
33 - pwm-gpio: drivers/pwm/pwm-gpio.c is used to toggle a GPIO with a high
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/linux/Documentation/arch/arm/samsung/
H A Dbootloader-interface.rst14 In the document "boot loader" means any of following: U-boot, proprietary
19 1. Non-Secure mode
65 3. Other (regardless of secure/non-secure mode)
72 0x0908 Non-zero Secondary CPU boot up indicator
79 AFTR - ARM Off Top Running, a low power mode, Cortex cores and many other
80 modules are power gated, except the TOP modules
81 MCPM - Multi-Cluster Power Management
/linux/Documentation/devicetree/bindings/clock/
H A Dst,stm32mp21-rcc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/st,stm32mp21-rcc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Gabriel Fernandez <gabriel.fernandez@foss.st.com>
14 RCC makes also power management (resume/suspend).
17 include/dt-bindings/clock/st,stm32mp21-rcc.h
18 include/dt-bindings/reset/st,stm32mp21-rcc.h
23 - st,stm32mp21-rcc
28 '#clock-cells':
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H A Dst,stm32mp25-rcc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/st,stm32mp25-rcc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Gabriel Fernandez <gabriel.fernandez@foss.st.com>
14 RCC makes also power management (resume/suspend).
17 include/dt-bindings/clock/st,stm32mp25-rcc.h
18 include/dt-bindings/reset/st,stm32mp25-rcc.h
23 - st,stm32mp25-rcc
28 '#clock-cells':
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