Home
last modified time | relevance | path

Searched +full:power +full:- +full:domain +full:- +full:node (Results 1 – 25 of 275) sorted by relevance

1234567891011

/linux/Documentation/devicetree/bindings/power/
H A Dpower_domain.txt4 used for power gating of selected IP blocks for power saving by reduced leakage
7 This device tree binding can be used to bind PM domain consumer devices with
8 their PM domains provided by PM domain providers. A PM domain provider can be
9 represented by any node in the device tree and can provide one or more PM
10 domains. A consumer node can refer to the provider by a phandle and a set of
11 phandle arguments (so called PM domain specifiers) of length specified by the
12 #power-domain-cells property in the PM domain provider node.
14 ==PM domain providers==
16 See power-domain.yaml.
18 ==PM domain consumers==
[all …]
H A Drockchip,power-controller.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/power/rockchip,power-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip Power Domains
10 - Elaine Zhang <zhangqing@rock-chips.com>
11 - Heiko Stuebner <heiko@sntech.de>
14 Rockchip processors include support for multiple power domains
16 application scenarios to save power.
18 Power domains contained within power-controller node are
[all …]
H A Drenesas,sysc-rmobile.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/power/renesas,sysc-rmobile.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas R-Mobile System Controller
10 - Geert Uytterhoeven <geert+renesas@glider.be>
11 - Magnus Damm <magnus.damm@gmail.com>
14 The R-Mobile System Controller provides the following functions:
15 - Boot mode management,
16 - Reset generation,
[all …]
H A Dpower-domain.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/power/power-domain.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rafael J. Wysocki <rafael@kernel.org>
11 - Kevin Hilman <khilman@kernel.org>
12 - Ulf Hansson <ulf.hansson@linaro.org>
16 used for power gating of selected IP blocks for power saving by reduced
20 This device tree binding can be used to bind PM domain consumer devices with
21 their PM domains provided by PM domain providers. A PM domain provider can be
[all …]
H A Dfsl,imx-gpcv2.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/power/fsl,imx-gpcv2.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale i.MX General Power Controller v2
10 - Andrey Smirnov <andrew.smirnov@gmail.com>
13 The i.MX7S/D General Power Control (GPC) block contains Power Gating
14 Control (PGC) for various power domains.
16 Power domains contained within GPC node are generic power domain
18 Documentation/devicetree/bindings/power/power-domain.yaml, which are
[all …]
H A Dfsl,scu-pd.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/power/fsl,scu-pd.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: i.MX SCU Client Device Node - Power Domain Based on SCU Message Protocol
10 - Dong Aisheng <aisheng.dong@nxp.com>
12 description: i.MX SCU Client Device Node
13 Client nodes are maintained as children of the relevant IMX-SCU device node.
14 Power domain bindings based on SCU Message Protocol
17 - $ref: power-domain.yaml#
[all …]
H A Damlogic,meson-gx-pwrc.txt1 Amlogic Meson Power Controller (deprecated)
4 The Amlogic Meson SoCs embeds an internal Power domain controller.
6 VPU Power Domain
7 ----------------
9 The Video Processing Unit power domain is controlled by this power controller,
10 but the domain requires some external resources to meet the correct power
12 The bindings must respect the power domain bindings as described in the file
13 power-domain.yaml
16 ---------------------
19 - compatible: should be one of the following :
[all …]
H A Damlogic,meson-ee-pwrc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/power/amlogic,meson-ee-pwrc.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Amlogic Meson Everything-Else Power Domains
11 - Neil Armstrong <neil.armstrong@linaro.org>
14 The Everything-Else Power Domains node should be the child of a syscon
15 node with the required property:
17 - compatible: Should be the following:
18 "amlogic,meson-gx-hhi-sysctrl", "simple-mfd", "syscon"
[all …]
/linux/drivers/pmdomain/xilinx/
H A Dzynqmp-pm-domains.c1 // SPDX-License-Identifier: GPL-2.0
3 * ZynqMP Generic PM domain support
5 * Copyright (C) 2015-2019 Xilinx, Inc.
20 #include <linux/firmware/xlnx-zynqmp.h>
27 * struct zynqmp_pm_domain - Wrapper around struct generic_pm_domain
28 * @gpd: Generic power domain
29 * @node_id: PM node ID corresponding to device inside PM domain
30 * @requested: The PM node mapped to the PM domain has been requested
42 * zynqmp_gpd_is_active_wakeup_path() - Check if device is in wakeup source
65 * zynqmp_gpd_power_on() - Power on PM domain
[all …]
/linux/Documentation/devicetree/bindings/soc/dove/
H A Dpmu.txt4 - compatible: value should be "marvell,dove-pmu".
5 May also include "simple-bus" if there are child devices, in which
6 case the ranges node is required.
7 - reg: two base addresses and sizes of the PM controller and PMU.
8 - interrupts: single interrupt number for the PMU interrupt
9 - interrupt-controller: must be specified as the PMU itself is an
11 - #interrupt-cells: must be 1.
12 - #reset-cells: must be 1.
13 - domains: sub-node containing domain descriptions
16 - ranges: defines the address mapping for child devices, as per the
[all …]
/linux/Documentation/devicetree/bindings/soc/ti/
H A Dsci-pm-domain.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/ti/sci-pm-domain.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: TI-SCI generic power domain
10 - Nishanth Menon <nm@ti.com>
13 - $ref: /schemas/power/power-domain.yaml#
16 Some TI SoCs contain a system controller (like the Power Management Micro
20 through a protocol called TI System Control Interface (TI-SCI protocol).
22 This PM domain node represents the global PM domain managed by the TI-SCI
[all …]
/linux/Documentation/devicetree/bindings/firmware/
H A Dnvidia,tegra186-bpmp.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/firmware/nvidia,tegra186-bpmp.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra Boot and Power Management Processor (BPMP)
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
15 booting process handling and offloading the power management, clock
21 This node is a mailbox consumer. See the following files for details
25 - .../mailbox/mailbox.txt
[all …]
H A Darm,scpi.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: System Control and Power Interface (SCPI) Message Protocol
11 - Sudeep Holla <sudeep.holla@arm.com>
16 used by Linux to initiate various system control and power operations.
33 - const: arm,scpi # SCPI v1.0 and above
34 - const: arm,scpi-pre-1.0 # Unversioned SCPI before v1.0
35 - items:
36 - enum:
[all …]
/linux/drivers/pmdomain/samsung/
H A Dexynos-pm-domains.c1 // SPDX-License-Identifier: GPL-2.0
3 // Exynos Generic power domain support.
8 // Implementation of Exynos specific power domain control which is used in
9 // conjunction with runtime-pm. Support for both device-tree and non-device-tree
10 // based power domain support is included.
23 /* Value for LOCAL_PWR_CFG and STATUS fields for each domain */
28 * Exynos specific wrapper around the generic power domain
36 static int exynos_pd_power(struct generic_pm_domain *domain, bool power_on) in exynos_pd_power() argument
43 pd = container_of(domain, struct exynos_pm_domain, pd); in exynos_pd_power()
44 base = pd->base; in exynos_pd_power()
[all …]
/linux/Documentation/devicetree/bindings/soc/tegra/
H A Dnvidia,tegra20-pmc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/tegra/nvidia,tegra20-pmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Tegra Power Management Controller (PMC)
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jonathan Hunter <jonathanh@nvidia.com>
16 - nvidia,tegra20-pmc
17 - nvidia,tegra30-pmc
18 - nvidia,tegra114-pmc
[all …]
/linux/drivers/cpuidle/
H A Dcpuidle-psci-domain.c1 // SPDX-License-Identifier: GPL-2.0
3 * PM domains for CPUs via genpd - managed by cpuidle-psci.
22 #include "cpuidle-psci.h"
27 struct device_node *node; member
34 struct genpd_power_state *state = &pd->states[pd->state_idx]; in psci_pd_power_off()
37 if (!state->data) in psci_pd_power_off()
40 /* OSI mode is enabled, set the corresponding domain state. */ in psci_pd_power_off()
41 pd_state = state->data; in psci_pd_power_off()
42 psci_set_domain_state(pd, pd->state_idx, *pd_state); in psci_pd_power_off()
52 int ret = -ENOMEM; in psci_pd_init()
[all …]
H A Ddt_idle_genpd.c1 // SPDX-License-Identifier: GPL-2.0-only
12 #define pr_fmt(fmt) "dt-idle-genpd: " fmt
38 ret = -ENOMEM; in pd_parse_state_nodes()
48 i--; in pd_parse_state_nodes()
49 for (; i >= 0; i--) in pd_parse_state_nodes()
61 /* Parse the domain idle states. */ in pd_parse_states()
86 pd_free_states(pd->states, pd->state_count); in dt_idle_pd_free()
87 kfree(pd->name); in dt_idle_pd_free()
102 pd->name = kasprintf(GFP_KERNEL, "%pOF", np); in dt_idle_pd_alloc()
103 if (!pd->name) in dt_idle_pd_alloc()
[all …]
H A Dcpuidle-riscv-sbi.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * RISC-V SBI CPU idle driver.
9 #define pr_fmt(fmt) "cpuidle-riscv-sbi: " fmt
52 data->available = true; in sbi_set_domain_state()
53 data->state = state; in sbi_set_domain_state()
60 return data->state; in sbi_get_domain_state()
67 data->available = false; in sbi_clear_domain_state()
74 return data->available; in sbi_is_domain_state_available()
95 u32 *states = data->states; in __sbi_enter_domain_idle_state()
96 struct device *pd_dev = data->dev; in __sbi_enter_domain_idle_state()
[all …]
/linux/Documentation/devicetree/bindings/arm/keystone/
H A Dti,sci.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: TI-SCI controller
10 - Nishanth Menon <nm@ti.com>
19 block called Power Management Micro Controller (PMMC). This hardware block is
23 See https://software-dl.ti.com/tisci/esd/latest/index.html for protocol definition.
25 The TI-SCI node describes the Texas Instrument's System Controller entity node.
26 This parent node may optionally have additional children nodes which describe
27 specific functionality such as clocks, power domain, reset or additional
[all …]
/linux/drivers/pci/
H A Dof.c1 // SPDX-License-Identifier: GPL-2.0+
3 * PCI <-> OF mapping helpers
22 * pci_set_of_node - Find and set device's DT device_node
26 * DT. Returns -ENODEV if the device is present, but disabled in the DT.
30 if (!dev->bus->dev.of_node) in pci_set_of_node()
33 struct device_node *node __free(device_node) = in pci_set_of_node()
34 of_pci_find_child_device(dev->bus->dev.of_node, dev->devfn); in pci_set_of_node()
35 if (!node) in pci_set_of_node()
39 bus_find_device_by_of_node(&platform_bus_type, node); in pci_set_of_node()
41 dev->bus->dev.of_node_reused = true; in pci_set_of_node()
[all …]
/linux/drivers/net/pse-pd/
H A Dpse_core.c1 // SPDX-License-Identifier: GPL-2.0-only
3 // Framework for Ethernet Power Sourcing Equipment
13 #include <linux/pse-pd/pse.h>
27 * struct pse_control - a PSE control
46 * struct pse_power_domain - a PSE power domain
47 * @id: ID of the power domain
48 * @supply: Power supply the Power Domain
50 * @budget_eval_strategy: Current power budget evaluation strategy of the
51 * power domain
60 static int of_load_single_pse_pi_pairset(struct device_node *node, in of_load_single_pse_pi_pairset() argument
[all …]
/linux/arch/arm/mach-rockchip/
H A Dplatsmp.c1 // SPDX-License-Identifier: GPL-2.0-or-later
57 np = dev->of_node; in rockchip_get_core_reset()
77 * We need to soft reset the cpu when we turn off the cpu power domain, in pmu_set_power_domain()
87 pr_err("%s: could not update power domain\n", in pmu_set_power_domain()
92 ret = -1; in pmu_set_power_domain()
96 pr_err("%s: could not read power domain state\n", in pmu_set_power_domain()
122 return -ENXIO; in rockchip_boot_secondary()
128 return -ENXIO; in rockchip_boot_secondary()
159 * rockchip_smp_prepare_sram - populate necessary sram block
160 * Starting cores execute the code residing at the start of the on-chip sram
[all …]
/linux/Documentation/devicetree/bindings/pinctrl/
H A Dsophgo,cv1800-pinctrl.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/sophgo,cv1800-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Inochi Amaoto <inochiama@outlook.com>
15 - sophgo,cv1800b-pinctrl
16 - sophgo,cv1812h-pinctrl
17 - sophgo,sg2000-pinctrl
18 - sophgo,sg2002-pinctrl
22 - description: pinctrl for system domain
[all …]
/linux/arch/arm/mach-imx/
H A Dgpc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright 2011-2013 Freescale Semiconductor, Inc.
67 /* Tell GPC to power off ARM core when suspend */ in imx_gpc_pre_suspend()
82 /* Keep ARM core powered on for other low-power modes */ in imx_gpc_post_resume()
91 unsigned int idx = d->hwirq / 32; in imx_gpc_irq_set_wake()
94 mask = 1 << d->hwirq % 32; in imx_gpc_irq_set_wake()
100 * wake-up facility... in imx_gpc_irq_set_wake()
149 imx_gpc_hwirq_unmask(d->hwirq); in imx_gpc_irq_unmask()
155 imx_gpc_hwirq_mask(d->hwirq); in imx_gpc_irq_mask()
177 if (is_of_node(fwspec->fwnode)) { in imx_gpc_domain_translate()
[all …]
/linux/Documentation/devicetree/bindings/dvfs/
H A Dperformance-domain.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dvfs/performance-domain.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sudeep Holla <sudeep.holla@arm.com>
14 CPUs that run in the same performance domain. Performance domains must not
15 be confused with power domains. A performance domain is defined by a set
17 performance domain, there is a single point of control that affects all the
18 devices in the domain, making it impossible to set the performance level of
19 an individual device in the domain independently from other devices in
[all …]

1234567891011