Lines Matching +full:power +full:- +full:domain +full:- +full:node

1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dvfs/performance-domain.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sudeep Holla <sudeep.holla@arm.com>
14 CPUs that run in the same performance domain. Performance domains must not
15 be confused with power domains. A performance domain is defined by a set
17 performance domain, there is a single point of control that affects all the
18 devices in the domain, making it impossible to set the performance level of
19 an individual device in the domain independently from other devices in
20 that domain. For example, a set of CPUs that share a voltage domain, and
22 domain.
24 This device tree binding can be used to bind performance domain consumer
25 devices with their performance domains provided by performance domain
26 providers. A performance domain provider can be represented by any node in
28 node can refer to the provider by a phandle and a set of phandle arguments
29 (so called performance domain specifiers) of length specified by the
30 \#performance-domain-cells property in the performance domain provider node.
35 "#performance-domain-cells":
37 Number of cells in a performance domain specifier. Typically 0 for nodes
38 representing a single performance domain and 1 for nodes providing
44 performance-domains:
45 $ref: /schemas/types.yaml#/definitions/phandle-array
47 A phandle and performance domain specifier as defined by bindings of the
53 - |
55 #address-cells = <2>;
56 #size-cells = <2>;
58 performance: performance-controller@11bc00 {
59 compatible = "mediatek,cpufreq-hw";
62 #performance-domain-cells = <1>;
66 // The node above defines a performance controller that is a performance
67 // domain provider and expects one cell as its phandle argument.
70 #address-cells = <2>;
71 #size-cells = <0>;
75 compatible = "arm,cortex-a57";
77 performance-domains = <&performance 1>;