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/linux/Documentation/netlink/specs/
H A Ddevlink.yaml1 # SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause)
5 protocol: genetlink-legacy
10 -
12 name: sb-pool-type
14 -
16 -
18 -
20 name: port-type
22 -
24 -
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H A Ddpll.yaml1 # SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause)
8 -
16 -
20 -
23 render-max: true
24 -
26 name: lock-status
31 -
37 -
41 -
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/linux/Documentation/livepatch/
H A Dcallbacks.rst5 Livepatch (un)patch-callbacks provide a mechanism for livepatch modules
10 - Safe updates to global data
12 - "Patches" to init and probe functions
14 - Patching otherwise unpatchable code (i.e. assembly)
25 - Module init/exit code doesn't run when disabling and re-enabling a
28 - A module notifier can't stop a to-be-patched module from loading.
39 * Pre-patch
40 - before a klp_object is patched
42 * Post-patch
43 - after a klp_object has been patched and is active
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/linux/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/
H A Dgm200.c35 struct nvkm_device *device = init->base.subdev.device; in pmu_code()
36 struct nvkm_bios *bios = device->bios; in pmu_code()
55 struct nvkm_device *device = init->base.subdev.device; in pmu_data()
56 struct nvkm_bios *bios = device->bios; in pmu_data()
67 struct nvkm_device *device = init->base.subdev.device; in pmu_args()
76 struct nvkm_device *device = init->base.subdev.device; in pmu_exec()
83 pmu_load(struct nv50_devinit *init, u8 type, bool post, in pmu_load() argument
86 struct nvkm_subdev *subdev = &init->base.subdev; in pmu_load()
87 struct nvkm_bios *bios = subdev->device->bios; in pmu_load()
92 return -EINVAL; in pmu_load()
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H A Dbase.c32 if (init->func->mmio) in nvkm_devinit_mmio()
33 addr = init->func->mmio(init, addr); in nvkm_devinit_mmio()
40 return init->func->pll_set(init, type, khz); in nvkm_devinit_pll_set()
46 if (init->func->meminit) in nvkm_devinit_meminit()
47 init->func->meminit(init); in nvkm_devinit_meminit()
53 if (init && init->func->disable) in nvkm_devinit_disable()
54 init->func->disable(init); in nvkm_devinit_disable()
63 if (init && init->func->post) in nvkm_devinit_post()
64 ret = init->func->post(init, init->post); in nvkm_devinit_post()
75 init->post = true; in nvkm_devinit_fini()
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H A Dnv50.c37 struct nvkm_subdev *subdev = &init->subdev; in nv50_devinit_pll_set()
38 struct nvkm_device *device = subdev->device; in nv50_devinit_pll_set()
39 struct nvkm_bios *bios = device->bios; in nv50_devinit_pll_set()
53 return -EINVAL; in nv50_devinit_pll_set()
83 struct nvkm_device *device = init->subdev.device; in nv50_devinit_disable()
93 struct nvkm_subdev *subdev = &base->subdev; in nv50_devinit_preinit()
94 struct nvkm_device *device = subdev->device; in nv50_devinit_preinit()
98 * missing, assume it's a secondary gpu which requires post in nv50_devinit_preinit()
100 if (!base->post) { in nv50_devinit_preinit()
102 if (!device->disp) in nv50_devinit_preinit()
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/linux/tools/testing/selftests/livepatch/
H A Dtest-callbacks.sh2 # SPDX-License-Identifier: GPL-2.0
19 # - On livepatch enable, before the livepatch transition starts,
20 # pre-patch callbacks are executed for vmlinux and $MOD_TARGET (those
22 # according to the klp_patch, their post-patch callbacks run and the
25 # - Similarly, on livepatch disable, pre-patch callbacks run before the
26 # unpatching transition starts. klp_objects are reverted, post-patch
43 $MOD_LIVEPATCH: pre_patch_callback: $MOD_TARGET -> [MODULE_STATE_LIVE] Normal state
47 $MOD_LIVEPATCH: post_patch_callback: $MOD_TARGET -> [MODULE_STATE_LIVE] Normal state
52 $MOD_LIVEPATCH: pre_unpatch_callback: $MOD_TARGET -> [MODULE_STATE_LIVE] Normal state
56 $MOD_LIVEPATCH: post_unpatch_callback: $MOD_TARGET -> [MODULE_STATE_LIVE] Normal state
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/linux/drivers/media/i2c/cx25840/
H A Dcx25840-audio.c1 // SPDX-License-Identifier: GPL-2.0-or-later
8 #include <media/v4l2-common.h>
9 #include <media/drv-intf/cx25840.h>
11 #include "cx25840-core.h"
35 if (state->aud_input != CX25840_AUDIO_SERIAL) { in cx25840_set_audclk_freq()
39 * VID_PLL Integer = 0x0f, VID_PLL Post Divider = 0x04 in cx25840_set_audclk_freq()
40 * AUX_PLL Integer = 0x06, AUX PLL Post Divider = 0x10 in cx25840_set_audclk_freq()
47 * 432 MHz pre-postdivide in cx25840_set_audclk_freq()
53 * 196.6 MHz pre-postdivide in cx25840_set_audclk_freq()
61 * SA_MCLK_DIV = 0x10 = 384/384 * AUX_PLL post dvivider in cx25840_set_audclk_freq()
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/linux/drivers/md/dm-vdo/indexer/
H A Dindex-session.h1 /* SPDX-License-Identifier: GPL-2.0-only */
12 #include "thread-utils.h"
20 * functions in the top-level UDS API.
28 /* Post requests that found an entry */ in __aligned()
30 /* Post requests found in the open chapter */ in __aligned()
32 /* Post requests found in the dense index */ in __aligned()
34 /* Post requests found in the sparse index */ in __aligned()
36 /* Post requests that did not find an entry */ in __aligned()
/linux/Documentation/devicetree/bindings/clock/
H A Dkeystone-pll.txt2 a divider and a post divider. The additional PLL IPs like ARMPLL, DDRPLL
9 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
12 - #clock-cells : from common clock binding; shall be set to 0.
13 - compatible : shall be "ti,keystone,main-pll-clock" or "ti,keystone,pll-clock"
14 - clocks : parent clock phandle
15 - reg - pll control0 and pll multiplier registers
16 - reg-names : control, multiplier and post-divider. The multiplier and
17 post-divider registers are applicable only for main pll clock
18 - fixed-postdiv : fixed post divider value. If absent, use clkod register bits
23 #clock-cells = <0>;
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/linux/drivers/media/pci/cx18/
H A Dcx18-av-audio.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Derived from cx25840-audio.c
11 #include "cx18-driver.h"
15 struct cx18_av_state *state = &cx->av_state; in set_audclk_freq()
18 return -EINVAL; in set_audclk_freq()
31 * the NTSC Standards", Proceedings of the I-R-E, January 1954, pp 79-80 in set_audclk_freq()
34 * NTSC Standards", Proceedings of the I-R-E, January 1954, pp 81-83 in set_audclk_freq()
56 if (state->aud_input > CX18_AV_AUDIO_SERIAL2) { in set_audclk_freq()
60 * VID_PLL Integer = 0x0f, VID_PLL Post Divider = 0x04 in set_audclk_freq()
61 * AUX_PLL Integer = 0x0d, AUX PLL Post Divider = 0x20 in set_audclk_freq()
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/linux/drivers/clk/sophgo/
H A Dclk-cv18xx-pll.c1 // SPDX-License-Identifier: GPL-2.0
6 #include <linux/clk-provider.h>
11 #include "clk-cv18xx-pll.h"
39 value = readl(pll->common.base + pll->pll_reg); in ipll_recalc_rate()
54 unsigned long pre, div, post; in ipll_find_rate() local
58 for_each_pll_limit_range(pre, &limit->pre_div) { in ipll_find_rate()
59 for_each_pll_limit_range(div, &limit->div) { in ipll_find_rate()
60 for_each_pll_limit_range(post, &limit->post_div) { in ipll_find_rate()
61 tmp = ipll_calc_rate(prate, pre, div, post); in ipll_find_rate()
66 if ((trate - tmp) < (trate - best_rate)) { in ipll_find_rate()
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/linux/drivers/net/ethernet/mellanox/mlx5/core/en/tc/
H A Dpost_act.c1 // SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB
38 if (!MLX5_CAP_FLOWTABLE_TYPE(priv->mdev, ignore_flow_level, table_type)) { in mlx5e_tc_post_act_init()
39 if (priv->mdev->coredev_type == MLX5_COREDEV_PF) in mlx5e_tc_post_act_init()
40 mlx5_core_dbg(priv->mdev, "firmware flow level support is missing\n"); in mlx5e_tc_post_act_init()
41 err = -EOPNOTSUPP; in mlx5e_tc_post_act_init()
47 err = -ENOMEM; in mlx5e_tc_post_act_init()
50 post_act->ft = mlx5_chains_create_global_table(chains); in mlx5e_tc_post_act_init()
51 if (IS_ERR(post_act->ft)) { in mlx5e_tc_post_act_init()
52 err = PTR_ERR(post_act->ft); in mlx5e_tc_post_act_init()
53 mlx5_core_warn(priv->mdev, "failed to create post action table, err: %d\n", err); in mlx5e_tc_post_act_init()
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/linux/drivers/gpu/drm/i915/gt/
H A Dgen6_engine_cs.c1 // SPDX-License-Identifier: MIT
18 * Emits a PIPE_CONTROL with a non-zero post-sync operation, for
22 * [DevSNB-C+{W/A}] Before any depth stall flush (including those
23 * produced by non-pipelined state commands), software needs to first
24 * send a PIPE_CONTROL with no bits set except Post-Sync Operation !=
27 * [Dev-SNB{W/A}]: Before a PIPE_CONTROL with Write Cache Flush Enable
28 * =1, a PIPE_CONTROL with any non-zero post-sync-op is required.
32 * [Dev-SNB{W/A}]: Pipe-control with CS-stall bit set must be sent
33 * BEFORE the pipe-control with a post-sync op and no write-cache
41 * - Render Target Cache Flush Enable ([12] of DW1)
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/linux/drivers/video/fbdev/matrox/
H A Dmatroxfb_misc.h1 /* SPDX-License-Identifier: GPL-2.0 */
9 unsigned int* in, unsigned int* feed, unsigned int* post);
13 unsigned int *post) in PLL_calcclock() argument
15 return matroxfb_PLL_calcclock(&minfo->features.pll, freq, fmax, in, feed, post); in PLL_calcclock()
/linux/tools/testing/selftests/drivers/net/netdevsim/
H A Ddevlink.sh2 # SPDX-License-Identifier: GPL-2.0
22 "$@" | grep -q $DL_HANDLE
34 DUMMYFILE=$(find /lib/firmware -type f -printf '%P\n' | head -1)
37 if [ -z "$DUMMYFILE" ]
80 cmd_jq "devlink dev param show $DL_HANDLE name $name -j" \
125 check_value max_macs post-set 16 32
126 check_value test1 post-set false Y
130 check_value max_macs post-reload 16 16
131 check_value test1 post-reload false N
141 size=$(devlink region show $DL_HANDLE/$name -j | jq -e -r '.[][].size')
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/linux/tools/testing/selftests/tc-testing/creating-plugins/
H A DAddingPlugins.txt1 tdc - Adding plugins for tdc
3 Author: Brenda J. Butler - bjb@mojatatu.com
6 --------------
9 There are some examples in plugin-lib.
14 - adding commands to be run before and/or after the test suite
15 - adding commands to be run before and/or after the test cases
16 - adding commands to be run before and/or after the execute phase of the test cases
17 - ability to alter the command to be run in any phase:
18 pre (the pre-suite stage)
23 post (the post-suite stage)
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/linux/drivers/infiniband/hw/qedr/
H A Dqedr_roce_cm.c2 * Copyright (c) 2015-2016 QLogic Corporation
14 * - Redistributions of source code must retain the above
18 * - Redistributions in binary form must reproduce the above
32 #include <linux/dma-mapping.h>
50 #include <rdma/qedr-abi.h>
55 info->gsi_cons = (info->gsi_cons + 1) % info->max_wr; in qedr_inc_sw_gsi_cons()
61 dev->gsi_qp_created = 1; in qedr_store_gsi_qp_cq()
62 dev->gsi_sqcq = get_qedr_cq(attrs->send_cq); in qedr_store_gsi_qp_cq()
63 dev->gsi_rqcq = get_qedr_cq(attrs->recv_cq); in qedr_store_gsi_qp_cq()
64 dev->gsi_qp = qp; in qedr_store_gsi_qp_cq()
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/linux/sound/core/
H A Dpcm_timer.c1 // SPDX-License-Identifier: GPL-2.0-or-later
21 unsigned long rate, mult, fsize, l, post; in snd_pcm_timer_resolution_change() local
22 struct snd_pcm_runtime *runtime = substream->runtime; in snd_pcm_timer_resolution_change()
25 rate = runtime->rate; in snd_pcm_timer_resolution_change()
31 fsize = runtime->period_size; in snd_pcm_timer_resolution_change()
37 post = 1; in snd_pcm_timer_resolution_change()
40 post *= 2; in snd_pcm_timer_resolution_change()
43 pcm_err(substream->pcm, in snd_pcm_timer_resolution_change()
45 runtime->rate, runtime->period_size); in snd_pcm_timer_resolution_change()
46 runtime->timer_resolution = -1; in snd_pcm_timer_resolution_change()
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/linux/drivers/mmc/core/
H A Dcore.h1 /* SPDX-License-Identifier: GPL-2.0-only */
140 * mmc_claim_host - exclusively claim a host
155 * mmc_pre_req - Prepare for a new request
165 if (host->ops->pre_req) in mmc_pre_req()
166 host->ops->pre_req(host, mrq); in mmc_pre_req()
170 * mmc_post_req - Post process a completed request
171 * @host: MMC host to post process command
172 * @mrq: MMC request to post process for
175 * Let the host post process a completed request. Post processing of
181 if (host->ops->post_req) in mmc_post_req()
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/linux/Documentation/ABI/testing/
H A Dconfigfs-most9 # mount -t configfs none /sys/kernel/config/
22 configure the sub-buffer size for this channel
60 configuration, the creation is post-poned until
77 configure the sub-buffer size for this channel
115 configuration, the creation is post-poned until
132 configure the sub-buffer size for this channel
170 configuration, the creation is post-poned until
198 configure the sub-buffer size for this channel
236 configuration, the creation is post-poned until
/linux/drivers/net/ethernet/amd/pds_core/
H A Dadminq.c1 // SPDX-License-Identifier: GPL-2.0
11 struct pdsc *pdsc = qcq->pdsc; in pdsc_process_notifyq()
12 struct pdsc_cq *cq = &qcq->cq; in pdsc_process_notifyq()
17 cq_info = &cq->info[cq->tail_idx]; in pdsc_process_notifyq()
18 comp = cq_info->comp; in pdsc_process_notifyq()
19 eid = le64_to_cpu(comp->event.eid); in pdsc_process_notifyq()
20 while (eid > pdsc->last_eid) { in pdsc_process_notifyq()
21 u16 ecode = le16_to_cpu(comp->event.ecode); in pdsc_process_notifyq()
25 dev_info(pdsc->dev, "NotifyQ LINK_CHANGE ecode %d eid %lld\n", in pdsc_process_notifyq()
31 dev_info(pdsc->dev, "NotifyQ RESET ecode %d eid %lld\n", in pdsc_process_notifyq()
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/linux/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_pll.c33 * amdgpu_pll_reduce_ratio - fractional number reduction
70 * amdgpu_pll_get_fb_ref_div - feedback and ref divider calculation
75 * @post_div: post divider
81 * Calculate feedback and reference divider for a given post divider. Makes
90 /* limit reference * post divider to a maximum */ in amdgpu_pll_get_fb_ref_div()
91 if (adev->family == AMDGPU_FAMILY_SI) in amdgpu_pll_get_fb_ref_div()
108 * amdgpu_pll_compute - compute PLL paramaters
131 unsigned target_clock = pll->flags & AMDGPU_PLL_USE_FRAC_FB_DIV ? in amdgpu_pll_compute()
141 fb_div_min = pll->min_feedback_div; in amdgpu_pll_compute()
142 fb_div_max = pll->max_feedback_div; in amdgpu_pll_compute()
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/linux/tools/testing/selftests/tc-testing/
H A DREADME1 tdc - Linux Traffic Control (tc) unit testing suite
3 Author: Lucas Bates - lucasb@mojatatu.com
10 ------------
23 * All tc-related features being tested must be built in or available as
25 ./tdc.py -c
29 teardown commands - which includes not being able to run a test simply
31 handled in a future version - the current workaround is to run the tests
36 --------------
43 using the -p option when running tdc:
44 ./tdc.py -p /path/to/tc
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/linux/Documentation/devicetree/bindings/display/
H A Damlogic,meson-vpu.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/display/amlogic,meson-vpu.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Neil Armstrong <neil.armstrong@linaro.org>
17 DMC|---------------VPU (Video Processing Unit)----------------|------HHI------|
19 D |-------| |----| | | | | HDMI PLL |
20 D | vd2 | VIU | | Video Post | | Video Encoders |<---|-----VCLK |
21 R |-------| |----| Processing | | | | |
22 | osd2 | | | |---| Enci ----------|----|-----VDAC------|
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