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/linux/Documentation/devicetree/bindings/clock/
H A Dallwinner,sun4i-a10-tcon-ch0-clk.yaml64 clocks = <&pll3>, <&pll7>, <&pll3x2>, <&pll7x2>;
73 clocks = <&pll3>, <&pll7>, <&pll3x2>, <&pll7x2>;
H A Dallwinner,sun4i-a10-display-clk.yaml53 clocks = <&pll3>, <&pll7>, <&pll5 1>;
/linux/drivers/clk/
H A Dclk-milbeaut.c26 #define M10V_PLL7 "pll7"
27 #define M10V_PLL7DIV2 "pll7-2"
28 #define M10V_PLL7DIV5 "pll7-5"
/linux/drivers/clk/imx/
H A Dclk-imx6sll.c29 static const char *pll7_bypass_sels[] = { "pll7", "pll7_bypass_src", };
129 …hws[IMX6SLL_CLK_PLL7] = imx_clk_hw_pllv3(IMX_PLLV3_USB, "pll7", "pll7_bypass_src", base + 0x20, 0… in imx6sll_clocks_init()
H A Dclk-vf610.c83 static const char *pll7_bypass_sels[] = { "pll7", "pll7_bypass_src", };
225 …clk[VF610_CLK_PLL7] = imx_clk_pllv3(IMX_PLLV3_USB_VF610, "pll7", "pll7_bypass_src", PLL7_CTRL,… in vf610_clocks_init()
H A Dclk-imx6sl.c70 static const char *pll7_bypass_sels[] = { "pll7", "pll7_bypass_src", };
223 hws[IMX6SL_CLK_PLL7] = imx_clk_hw_pllv3(IMX_PLLV3_USB, "pll7", "osc", base + 0x20, 0x3); in imx6sl_clocks_init()
H A Dclk-imx6ul.c28 static const char *pll7_bypass_sels[] = { "pll7", "pll7_bypass_src", };
169 hws[IMX6UL_CLK_PLL7] = imx_clk_hw_pllv3(IMX_PLLV3_USB, "pll7", "osc", base + 0x20, 0x3); in imx6ul_clocks_init()
H A Dclk-imx6sx.c83 static const char *pll7_bypass_sels[] = { "pll7", "pll7_bypass_src", };
167 hws[IMX6SX_CLK_PLL7] = imx_clk_hw_pllv3(IMX_PLLV3_USB, "pll7", "osc", base + 0x20, 0x3); in imx6sx_clocks_init()
H A Dclk-imx6q.c91 static const char *pll7_bypass_sels[] = { "pll7", "pll7_bypass_src", };
488 hws[IMX6QDL_CLK_PLL7] = imx_clk_hw_pllv3(IMX_PLLV3_USB, "pll7", "osc", base + 0x20, 0x3); in imx6q_clocks_init()
/linux/drivers/accel/habanalabs/include/gaudi/
H A Dgaudi_async_ids_map_extended.h272 { .fc_id = 246, .cpu_id = 119, .valid = 1, .name = "PLL7" },
/linux/drivers/clk/qcom/
H A Dcamcc-sm8450.c3085 /* Update CAMCC PLL7 */ in cam_cc_sm8450_probe()