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/linux/Documentation/devicetree/bindings/spi/
H A Dspi-pl022.yaml4 $id: http://devicetree.org/schemas/spi/spi-pl022.yaml#
7 title: ARM PL022 SPI controller
21 const: arm,pl022
28 - const: arm,pl022
45 pl022,autosuspend-delay:
51 pl022,rt:
87 compatible = "arm,pl022", "arm,primecell";
102 pl022,interface = <0>;
103 pl022,com-mode = <0x2>;
104 pl022,rx-level-trig = <0>;
[all …]
H A Darm,pl022-peripheral-props.yaml4 $id: http://devicetree.org/schemas/spi/arm,pl022-peripheral-props.yaml#
7 title: Peripheral-specific properties for Arm PL022 SPI controller
15 pl022,interface:
23 pl022,com-mode:
32 pl022,rx-level-trig:
38 pl022,tx-level-trig:
44 pl022,ctrl-len:
50 pl022,wait-state:
55 pl022,duplex:
H A Dspi-peripheral-props.yaml124 - $ref: arm,pl022-peripheral-props.yaml#
/linux/arch/arm/boot/dts/st/
H A Dspear1310-evb.dts355 pl022,interface = <0>;
356 pl022,com-mode = <0>;
357 pl022,rx-level-trig = <0>;
358 pl022,tx-level-trig = <0>;
359 pl022,ctrl-len = <0x7>;
360 pl022,wait-state = <0>;
361 pl022,duplex = <0>;
386 pl022,interface = <0>;
387 pl022,com-mode = <0x2>;
388 pl022,rx-level-trig = <0>;
[all …]
H A Dspear1340-evb.dts448 pl022,interface = <0>;
449 pl022,com-mode = <0x2>;
450 pl022,rx-level-trig = <0>;
451 pl022,tx-level-trig = <0>;
452 pl022,ctrl-len = <0x11>;
453 pl022,wait-state = <0>;
454 pl022,duplex = <0>;
462 pl022,interface = <0>;
463 pl022,com-mode = <0>;
464 pl022,rx-level-trig = <0>;
[all …]
H A Dspear600.dtsi212 compatible = "arm,pl022", "arm,primecell";
222 compatible = "arm,pl022", "arm,primecell";
232 compatible = "arm,pl022", "arm,primecell";
H A Dspear320.dtsi61 compatible = "arm,pl022", "arm,primecell";
71 compatible = "arm,pl022", "arm,primecell";
H A Dste-dbx5x0.dtsi822 compatible = "arm,pl022", "arm,primecell";
839 compatible = "arm,pl022", "arm,primecell";
856 compatible = "arm,pl022", "arm,primecell";
873 compatible = "arm,pl022", "arm,primecell";
890 compatible = "arm,pl022", "arm,primecell";
907 compatible = "arm,pl022", "arm,primecell";
H A Dspear3xx.dtsi68 compatible = "arm,pl022", "arm,primecell";
/linux/arch/arm/boot/dts/nxp/lpc/
H A Dlpc3250-phy3250.dts208 pl022,interface = <0>;
209 pl022,com-mode = <0>;
210 pl022,rx-level-trig = <1>;
211 pl022,tx-level-trig = <1>;
212 pl022,ctrl-len = <11>;
213 pl022,wait-state = <0>;
214 pl022,duplex = <0>;
H A Dlpc32xx.dtsi178 compatible = "arm,pl022", "arm,primecell";
202 compatible = "arm,pl022", "arm,primecell";
/linux/arch/arm64/boot/dts/amd/
H A Damd-overdrive-rev-b0.dts66 pl022,interface = <0>;
67 pl022,com-mode = <0x0>;
68 pl022,rx-level-trig = <0>;
69 pl022,tx-level-trig = <0>;
H A Damd-seattle-soc.dtsi122 compatible = "arm,pl022", "arm,primecell";
131 compatible = "arm,pl022", "arm,primecell";
/linux/Documentation/devicetree/bindings/gpio/
H A Dspear_spics.txt3 SPEAr platform provides a provision to control chipselects of ARM PL022 Prime
5 PL022 control. If chipselect remain under PL022 control then they would be
12 directly control each PL022 chipselect. Hence, it is natural for SPEAr to export
/linux/arch/arm/mach-spear/
H A Dspear320.c13 #include <linux/amba/pl022.h>
218 OF_DEV_AUXDATA("arm,pl022", SPEAR3XX_ICM1_SSP_BASE, NULL,
222 OF_DEV_AUXDATA("arm,pl022", SPEAR320_SSP0_BASE, NULL,
224 OF_DEV_AUXDATA("arm,pl022", SPEAR320_SSP1_BASE, NULL,
H A Dspear1310.c13 #include <linux/amba/pl022.h>
H A Dspear3xx.c13 #include <linux/amba/pl022.h>
H A Dspear13xx.c13 #include <linux/amba/pl022.h>
H A Dspear300.c182 OF_DEV_AUXDATA("arm,pl022", SPEAR3XX_ICM1_SSP_BASE, NULL,
/linux/arch/arm64/boot/dts/toshiba/
H A Dtmpv7708.dtsi355 compatible = "arm,pl022", "arm,primecell";
369 compatible = "arm,pl022", "arm,primecell";
383 compatible = "arm,pl022", "arm,primecell";
397 compatible = "arm,pl022", "arm,primecell";
411 compatible = "arm,pl022", "arm,primecell";
425 compatible = "arm,pl022", "arm,primecell";
439 compatible = "arm,pl022", "arm,primecell";
/linux/arch/arm/boot/dts/hisilicon/
H A Dhi3519.dtsi127 compatible = "arm,pl022", "arm,primecell";
139 compatible = "arm,pl022", "arm,primecell";
151 compatible = "arm,pl022", "arm,primecell";
/linux/drivers/gpio/
H A Dgpio-spear-spics.c21 * Provision is available on some SPEAr SoCs to control ARM PL022 spi cs
22 * through system registers. This register lies outside spi (pl022)
26 * (out of 4 possible chipselects in pl022) can be made low to select
/linux/include/linux/amba/
H A Dpl022.h3 * include/linux/amba/pl022.h
12 * Initial adoption to PL022 by:
66 * this feature is only available in ST versionf of PL022
/linux/arch/riscv/boot/dts/starfive/
H A Djh7110.dtsi468 compatible = "arm,pl022", "arm,primecell";
483 compatible = "arm,pl022", "arm,primecell";
498 compatible = "arm,pl022", "arm,primecell";
740 compatible = "arm,pl022", "arm,primecell";
755 compatible = "arm,pl022", "arm,primecell";
770 compatible = "arm,pl022", "arm,primecell";
785 compatible = "arm,pl022", "arm,primecell";
/linux/arch/arm/boot/dts/broadcom/
H A Dbcm-cygnus.dtsi396 compatible = "arm,pl022", "arm,primecell";
408 compatible = "arm,pl022", "arm,primecell";
420 compatible = "arm,pl022", "arm,primecell";

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