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/linux/drivers/clocksource/
H A Dtimer-nxp-pit.c16 * Each pit takes 0x10 Bytes register space
98 static inline void pit_timer_irqack(struct pit_timer *pit) in pit_timer_irqack() argument
100 writel(PITTFLG_TIF, PITTFLG(pit->clkevt_base)); in pit_timer_irqack()
110 struct pit_timer *pit = cs_to_pit(cs); in pit_timer_clocksource_read() local
112 return (u64)~readl(PITCVAL(pit->clksrc_base)); in pit_timer_clocksource_read()
115 static int pit_clocksource_init(struct pit_timer *pit, const char *name, in pit_clocksource_init() argument
123 pit->clksrc_base = base + PIT_CH(2); in pit_clocksource_init()
124 pit->cs.name = name; in pit_clocksource_init()
125 pit->cs.rating = 300; in pit_clocksource_init()
126 pit->cs.read = pit_timer_clocksource_read; in pit_clocksource_init()
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H A Djcore-pit.c3 * J-Core SoC PIT/clocksource driver
62 static int jcore_pit_disable(struct jcore_pit *pit) in jcore_pit_disable() argument
64 writel(0, pit->base + REG_PITEN); in jcore_pit_disable()
68 static int jcore_pit_set(unsigned long delta, struct jcore_pit *pit) in jcore_pit_set() argument
70 jcore_pit_disable(pit); in jcore_pit_set()
71 writel(delta, pit->base + REG_THROT); in jcore_pit_set()
72 writel(pit->enable_val, pit->base + REG_PITEN); in jcore_pit_set()
78 struct jcore_pit *pit = container_of(ced, struct jcore_pit, ced); in jcore_pit_set_state_shutdown() local
80 return jcore_pit_disable(pit); in jcore_pit_set_state_shutdown()
85 struct jcore_pit *pit = container_of(ced, struct jcore_pit, ced); in jcore_pit_set_state_oneshot() local
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H A Dtimer-atmel-pit.c3 * at91sam926x_time.c - Periodic Interval Timer (PIT) for at91sam926x
10 #define pr_fmt(fmt) "AT91: PIT: " fmt
71 * We don't care whether or not PIT irqs are enabled.
126 /* Clear any pending interrupts, wait for PIT to stop counting */ in at91sam926x_pit_reset()
130 /* Start PIT but don't enable IRQ */ in at91sam926x_pit_reset()
149 /* The PIT interrupt may be disabled, and is shared */ in at91sam926x_pit_interrupt()
179 pr_err("Could not map PIT address\n"); in at91sam926x_pit_dt_init()
222 data->clksrc.name = "pit"; in at91sam926x_pit_dt_init()
244 data->clkevt.name = "pit"; in at91sam926x_pit_dt_init()
263 TIMER_OF_DECLARE(at91sam926x_pit, "atmel,at91sam9260-pit",
H A Di8253.c3 * i8253 PIT clocksource
25 * Since the PIT overflows every tick, its not very useful
91 .name = "pit",
116 * in-kernel PIT) or the next interrupt (QEMU). And in those cases, in clockevent_i8253_disable()
170 * Delta is given in PIT ticks
183 * On UP the PIT can serve all of the possible timer functions. On SMP systems
187 .name = "pit",
205 * Start pit with the boot cpu mask. x86 might make it global in clockevent_i8253_init()
H A DMakefile4 obj-$(CONFIG_ATMEL_PIT) += timer-atmel-pit.o
10 obj-$(CONFIG_CLKSRC_JCORE_PIT) += jcore-pit.o
52 obj-$(CONFIG_NXP_PIT_TIMER) += timer-nxp-pit.o
/linux/arch/x86/kvm/
H A Di8254.c54 static void pit_set_gate(struct kvm_pit *pit, int channel, u32 val) in pit_set_gate() argument
56 struct kvm_kpit_channel_state *c = &pit->pit_state.channels[channel]; in pit_set_gate()
77 static int pit_get_gate(struct kvm_pit *pit, int channel) in pit_get_gate() argument
79 return pit->pit_state.channels[channel].gate; in pit_get_gate()
82 static s64 __kpit_elapsed(struct kvm_pit *pit) in __kpit_elapsed() argument
86 struct kvm_kpit_state *ps = &pit->pit_state; in __kpit_elapsed()
106 static s64 kpit_elapsed(struct kvm_pit *pit, struct kvm_kpit_channel_state *c, in kpit_elapsed() argument
110 return __kpit_elapsed(pit); in kpit_elapsed()
115 static int pit_get_count(struct kvm_pit *pit, int channel) in pit_get_count() argument
117 struct kvm_kpit_channel_state *c = &pit->pit_state.channels[channel]; in pit_get_count()
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H A DKconfig173 bool "I/O APIC, PIC, and PIT emulation"
177 Provides support for KVM to emulate an I/O APIC, PIC, and PIT, i.e.
/linux/Documentation/devicetree/bindings/timer/
H A Dfsl,vf610-pit.yaml4 $id: http://devicetree.org/schemas/timer/fsl,vf610-pit.yaml#
7 title: Freescale Periodic Interrupt Timer (PIT)
13 The PIT module is an array of timers that can be used to raise interrupts
20 - fsl,vf610-pit
21 - nxp,s32g2-pit
23 - const: nxp,s32g3-pit
24 - const: nxp,s32g2-pit
37 - const: pit
54 compatible = "fsl,vf610-pit";
58 clock-names = "pit";
H A Djcore,pit.yaml4 $id: http://devicetree.org/schemas/jcore,pit.yaml#
14 const: jcore,pit
24 An interrupt to assign for the timer. The actual pit core is integrated
40 compatible = "jcore,pit";
/linux/arch/m68k/include/asm/
H A Dmcfpit.h5 * mcfpit.h -- ColdFire internal PIT timer support defines.
16 * Define the PIT timer register address offsets.
18 #define MCFPIT_PCSR 0x0 /* PIT control register */
19 #define MCFPIT_PMR 0x2 /* PIT modulus register */
20 #define MCFPIT_PCNTR 0x4 /* PIT count register */
23 * Bit definitions for the PIT Control and Status register.
43 #define MCFPIT_PCSR_OVW 0x0010 /* Overwrite PIT counter now */
44 #define MCFPIT_PCSR_PIE 0x0008 /* Enable PIT interrupt */
45 #define MCFPIT_PCSR_PIF 0x0004 /* PIT interrupt flag */
47 #define MCFPIT_PCSR_EN 0x0001 /* Enable PIT */
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/linux/arch/x86/kernel/
H A Di8253.c3 * 8253/PIT functions
18 * HPET replaces the PIT, when enabled. So we need to know, which of
24 * Modern chipsets can disable the PIT clock which makes it unusable. It
30 * calibrated against the PIT interrupt.
45 * Don't just ignore the PIT. Ensure it's stopped, because in pit_timer_init()
62 * Several reasons not to register PIT as a clocksource: in init_pit_clocksource()
64 * - On SMP PIT does not scale due to i8253_lock in init_pit_clocksource()
66 * - when local APIC timer is active (PIT is switched off) in init_pit_clocksource()
H A Dtime.c35 * Default timer interrupt handler for PIT/HPET
49 * without legacy PIC/PIT we need this for the HPET0 in legacy in setup_default_timer_irq()
70 * Before PIT/HPET init, select the interrupt mode. This is required in x86_late_time_init()
71 * to make the decision whether PIT should be initialized correct. in x86_late_time_init()
79 * After PIT/HPET timers init, set up the final interrupt mode for in x86_late_time_init()
/linux/arch/m68k/bvme6000/
H A Dconfig.c54 volatile PitRegsPtr pit = (PitRegsPtr)BVME_PIT_BASE; in bvme6000_reset() local
60 /* Enable the watchdog, via PIT port C bit 4 */ in bvme6000_reset()
62 pit->pcddr |= 0x10; /* WDOG enable */ in bvme6000_reset()
84 volatile PitRegsPtr pit = (PitRegsPtr)BVME_PIT_BASE; in config_bvme6000() local
110 /* Now do the PIT configuration */ in config_bvme6000()
112 pit->pgcr = 0x00; /* Unidirectional 8 bit, no handshake for now */ in config_bvme6000()
113 pit->psrr = 0x18; /* PIACK and PIRQ functions enabled */ in config_bvme6000()
114 pit->pacr = 0x00; /* Sub Mode 00, H2 i/p, no DMA */ in config_bvme6000()
115 pit->padr = 0x00; /* Just to be tidy! */ in config_bvme6000()
116 pit->paddr = 0x00; /* All inputs for now (safest) */ in config_bvme6000()
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/linux/arch/m68k/coldfire/
H A Dpit.c5 * pit.c -- Freescale ColdFire PIT timer. Currently this type of
41 * Initialize the PIT timer.
43 * This is also called after resume to bring the PIT into operation again.
73 * Delta is given in PIT ticks
83 .name = "pit",
131 .name = "pit",
/linux/Documentation/devicetree/bindings/arm/
H A Datmel-sysregs.txt8 PIT Timer required properties:
9 - compatible: Should be "atmel,at91sam9260-pit"
11 - interrupts: Should contain interrupt for the PIT which is the IRQ line
/linux/arch/arm/boot/dts/samsung/
H A Dexynos5420-peach-pit.dts3 * Google Peach Pit Rev 6+ board device tree source
19 model = "Google Peach Pit Rev 6+";
21 compatible = "google,pit-rev16",
22 "google,pit-rev15", "google,pit-rev14",
23 "google,pit-rev13", "google,pit-rev12",
24 "google,pit-rev11", "google,pit-rev10",
25 "google,pit-rev9", "google,pit-rev8",
26 "google,pit-rev7", "google,pit-rev6",
27 "google,pit", "google,peach","samsung,exynos5420",
91 samsung,model = "Peach-Pit-I2S-MAX98090";
/linux/arch/mips/include/asm/
H A Dtimex.h22 * This is the clock rate of the i8253 PIT. A MIPS system may not have
23 * a PIT by the symbol is used all over the kernel including some APIs.
24 * So keeping it defined to the number for the PIT is the only sane thing
/linux/drivers/net/wwan/t7xx/
H A Dt7xx_hif_dpmaif_rx.h30 /* Structure of DL PIT */
47 /* PIT header fields */
53 /* PIT footer fields */
H A Dt7xx_dpmaif.c753 dev_err(hw_info->dev, "Data plane modem DL PIT is not ready\n"); in t7xx_dpmaif_dl_dlq_pit_init_done()
763 dev_err(hw_info->dev, "Data plane modem DL PIT initialization failed\n"); in t7xx_dpmaif_dl_dlq_pit_init_done()
853 /* Init PIT (two PIT table) */ in t7xx_dpmaif_config_dlq_hw()
1180 * Check that HW PIT write index equals read index with the same
1201 /* Check middle PIT sync done */ in t7xx_dpmaif_hw_stop_all_rxq()
1213 dev_err(hw_info->dev, "Check middle PIT sync fail\n"); in t7xx_dpmaif_hw_stop_all_rxq()
/linux/arch/mips/kernel/
H A Di8253.c3 * i8253.c 8253/PIT functions
32 if (num_possible_cpus() > 1 || /* PIT does not scale! */ in init_pit_clocksource()
/linux/arch/arm/mach-footbridge/
H A Disa-timer.c33 IRQF_TIMER | IRQF_IRQPOLL, "pit", &i8253_clockevent)) in isa_timer_init()
34 pr_err("Failed to request irq %d(pit)\n", i8253_clockevent.irq); in isa_timer_init()
/linux/arch/arm/boot/dts/microchip/
H A Dat91-dvk_som60.dts20 tick-timer = &pit;
64 &pit {
/linux/Documentation/virt/kvm/x86/
H A Dtimekeeping.rst41 2.1. i8254 - PIT
45 or PIT. The PIT has a fixed frequency 1.193182 MHz base clock and three
50 speaker. Now the PIT is typically integrated as part of an emulated chipset
51 and a separate physical PIT is not used.
53 The PIT uses I/O ports 0x40 - 0x43. Access to the 16-bit counters is done
127 In addition to normal binary counting, the PIT supports BCD counting. The
131 PIT commands, issued to port 0x43, using the following bit encoding::
294 HPET is quite complex, and was originally intended to replace the PIT / RTC
305 In general, the HPET is recommended as a high precision (compared to PIT /RTC)
506 time by counting periodic interrupts. These interrupts may come from the PIT
/linux/arch/arm/mach-imx/
H A DKconfig244 bool "Use PIT timer"
247 Use SoC Periodic Interrupt Timer (PIT) as clocksource
/linux/arch/powerpc/include/asm/
H A Dtime.h59 * generic timer interrupt code, which seems OK, with the 4xx PIT
60 * in auto-reload mode. The problem is PIT stops counting when it

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