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/linux/arch/arm64/boot/dts/ti/
H A Dk3-am68-phycore-som.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
6 * https://www.phytec.eu/en/produkte/system-on-modules/phycore-am68x-tda4x/
9 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/net/ti-dp83867.h>
13 #include "k3-j721s2.dtsi"
16 compatible = "phytec,am68-phycore-som", "ti,j721s2";
17 model = "PHYTEC phyCORE-AM68x";
30 bootph-all;
33 reserved_memory: reserved-memory {
[all …]
H A Dk3-j784s4-j742s2-evm-common.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/
9 #include <dt-bindings/phy/phy-cadence.h>
13 stdout-path = "serial2:115200n8";
28 reserved_memory: reserved-memory {
29 #address-cells = <2>;
30 #size-cells = <2>;
35 no-map;
39 compatible = "shared-dma-pool";
41 no-map;
[all …]
H A Dk3-j721s2-evm-gesi-exp-board.dtso1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
7 * Copyright (C) 2023-2024 Texas Instruments Incorporated - https://www.ti.com/
10 /dts-v1/;
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/net/ti-dp83867.h>
16 #include "k3-pinctrl.h"
20 ethernet1 = "/bus@100000/ethernet@c200000/ethernet-ports/port@1";
25 main_cpsw_mdio_default_pins: main-cpsw-mdio-default-pins {
26 pinctrl-single,pins = <
27 J721S2_IOPAD(0x0c0, PIN_OUTPUT, 6) /* (T28) MCASP1_AXR0.MDIO0_MDC */
[all …]
/linux/arch/arm/boot/dts/samsung/
H A Dexynos4412-p4note.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 * Based on exynos4412-midas.dtsi.
10 /dts-v1/;
12 #include "exynos4412-ppmu-common.dtsi"
14 #include <dt-bindings/clock/maxim,max77686.h>
15 #include <dt-bindings/gpio/gpio.h>
16 #include <dt-bindings/input/linux-event-codes.h>
17 #include <dt-bindings/interrupt-controller/irq.h>
18 #include <dt-bindings/power/summit,smb347-charger.h>
19 #include "exynos-pinctrl.h"
[all …]
H A Dexynos4412-midas.dtsi1 // SPDX-License-Identifier: GPL-2.0
12 /dts-v1/;
14 #include "exynos4412-ppmu-common.dtsi"
16 #include <dt-bindings/gpio/gpio.h>
17 #include <dt-bindings/input/input.h>
18 #include <dt-bindings/interrupt-controller/irq.h>
19 #include <dt-bindings/clock/maxim,max77686.h>
20 #include "exynos-pinctrl.h"
34 stdout-path = &serial_2;
38 compatible = "samsung,secure-firmware";
[all …]
H A Dexynos4212-tab3.dtsi1 // SPDX-License-Identifier: GPL-2.0
9 /dts-v1/;
11 #include "exynos4412-ppmu-common.dtsi"
12 #include "exynos-mfc-reserved-memory.dtsi"
13 #include <dt-bindings/clock/samsung,s2mps11.h>
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/leds/common.h>
16 #include <dt-bindings/input/gpio-keys.h>
17 #include <dt-bindings/input/input.h>
18 #include <dt-bindings/interrupt-controller/irq.h>
[all …]
H A Ds5pv210-galaxys.dts1 // SPDX-License-Identifier: GPL-2.0
3 /dts-v1/;
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/input/input.h>
6 #include "s5pv210-aries.dtsi"
9 model = "Samsung Galaxy S1 (GT-I9000) based on S5PV210";
11 chassis-type = "handset";
14 stdout-path = &uart2;
17 nand_pwrseq: nand-pwrseq {
18 compatible = "mmc-pwrseq-simple";
[all …]
/linux/arch/arm64/boot/dts/renesas/
H A Drzt2h-n2h-evk-common.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/leds/common.h>
10 #include <dt-bindings/net/mscc-phy-vsc8531.h>
11 #include <dt-bindings/net/renesas,r9a09g077-pcs-miic.h>
12 #include <dt-bindings/pinctrl/renesas,r9a09g077-pinctrl.h>
26 stdout-path = "serial0:115200n8";
29 reg_1p8v: regulator-1p8v {
30 compatible = "regulator-fixed";
31 regulator-name = "fixed-1.8V";
[all …]
H A Dr9a09g087m44-rzn2h-evk.dts1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
8 /dts-v1/;
17 * DSW17[5] = OFF; DSW17[6] = ON
24 * P02_6 = SD0_IOVS; DSW17[5] = OFF; DSW17[6] = ON
39 * This board is equipped with three USB connectors: Type-A (CN7), Mini-B
40 * (CN8), and Micro-AB (CN9). The RZ/N2H SoC has a single USB channel, so
44 * By default, the Type-A (CN7) and Mini-B (CN8) connectors are enabled.
46 * - P02_2 - P02_3 (control signals for USB power supply): DSW2[6] = OFF;
47 * - P02_2 (used for VBUSEN): DSW14[5] = OFF; DSW14[6] = ON
48 * - P02_3 (used for USB_OVRCUR): DSW14[1] = OFF; DSW14[2] = ON
[all …]
H A Dr9a09g057h44-rzv2h-evk.dts1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
8 /dts-v1/;
10 #include <dt-bindings/pinctrl/renesas,r9a09g057-pinctrl.h>
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
17 compatible = "renesas,rzv2h-evk", "renesas,r9a09g057h44", "renesas,r9a09g057";
35 stdout-path = "serial0:115200n8";
39 compatible = "gpio-keys";
41 key-wakeup {
42 interrupts-extended = <&icu 0 IRQ_TYPE_EDGE_FALLING>;
[all …]
H A Dr9a09g077m44-rzt2h-evk.dts1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
8 /dts-v1/;
35 * This board is equipped with three USB connectors: Type-A (CN80), Mini-B
36 * (CN79), and Micro-AB (CN33). The RZ/T2H SoC has a single USB channel, so
40 * By default, the Type-A (CN80) and Mini-B (CN79) connectors are enabled.
42 * - P00_0 - P00_2 (control signals for USB power supply): SW1[5] = ON
43 * - USB_VBUSIN (used for USB function): SW7[7] = OFF; SW7[8] = ON
44 * - USB_VBUSEN (used for USB_HF_VBUSEN): SW7[9] = OFF; SW7[10] = ON
46 * To enable the Micro-AB (CN33) USB OTG connector, set the following macro
48 * - P00_0 - P00_2 (control signals for USB power supply): SW1[5] = ON
[all …]
/linux/arch/arm/boot/dts/st/
H A Dstm32mp15xxab-pinctrl.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2019 - All Rights Reserved
7 &pinctrl {
13 gpio-ranges = <&pinctrl 0 0 16>;
19 gpio-ranges = <&pinctrl 0 16 16>;
25 gpio-ranges = <&pinctrl 0 32 16>;
31 gpio-ranges = <&pinctrl 0 48 16>;
37 gpio-ranges = <&pinctrl 0 64 16>;
42 ngpios = <6>;
43 gpio-ranges = <&pinctrl 6 86 6>;
[all …]
H A Dstm32mp15xxad-pinctrl.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2019 - All Rights Reserved
7 &pinctrl {
13 gpio-ranges = <&pinctrl 0 0 16>;
19 gpio-ranges = <&pinctrl 0 16 16>;
25 gpio-ranges = <&pinctrl 0 32 16>;
31 gpio-ranges = <&pinctrl 0 48 16>;
37 gpio-ranges = <&pinctrl 0 64 16>;
42 ngpios = <6>;
43 gpio-ranges = <&pinctrl 6 86 6>;
[all …]
H A Dstm32mp15x-mecio1-io.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
8 #include "stm32mp15-pinctrl.dtsi"
9 #include "stm32mp15xxaa-pinctrl.dtsi"
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/input/input.h>
15 stdout-path = "serial0:1500000n8";
34 reserved-memory {
35 #address-cells = <1>;
36 #size-cells = <1>;
40 compatible = "shared-dma-pool";
[all …]
H A Dste-href-tvk1281618-r3.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
7 #include <dt-bindings/interrupt-controller/irq.h>
8 #include <dt-bindings/input/input.h>
12 compatible = "gpio-keys";
13 #address-cells = <1>;
14 #size-cells = <0>;
15 vdd-supply = <&ab8500_ldo_aux1_reg>;
16 pinctrl-names = "default";
17 pinctrl-0 = <&hall_tvk_mode>;
32 interrupt-parent = <&gpio2>;
[all …]
/linux/drivers/pinctrl/bcm/
H A Dpinctrl-ns2-mux.c1 // SPDX-License-Identifier: GPL-2.0-only
16 #include <linux/pinctrl/pinconf-generic.h>
17 #include <linux/pinctrl/pinconf.h>
18 #include <linux/pinctrl/pinctrl.h>
19 #include <linux/pinctrl/pinmux.h>
22 #include "../pinctrl-utils.h"
100 * Northstar2 IOMUX pinctrl core
139 * @pull_shift: pull-up/pull-down control bit shift in the register
182 NS2_PIN_DESC(0, "mfio_0", -1, 0, 0, 0, 0, 0),
183 NS2_PIN_DESC(1, "mfio_1", -1, 0, 0, 0, 0, 0),
[all …]
/linux/Documentation/devicetree/bindings/pinctrl/
H A Dfsl,imx35-pinctrl.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/fsl,imx35-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Dong Aisheng <aisheng.dong@nxp.com>
13 Please refer to fsl,imx-pinctrl.txt and pinctrl-bindings.txt in this directory
17 - $ref: pinctrl.yaml#
22 - enum:
23 - fsl,imx35-iomuxc
24 - fsl,imx51-iomuxc
[all …]
H A Dsamsung,pinctrl.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/samsung,pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
11 - Sylwester Nawrocki <s.nawrocki@samsung.com>
12 - Tomasz Figa <tomasz.figa@gmail.com>
19 the following format 'pinctrl{n}' where n is a unique number for the alias.
22 - External GPIO interrupts (see interrupts property in pin controller node);
24 - External wake-up interrupts - multiplexed (capable of waking up the system
[all …]
/linux/arch/arm/boot/dts/ti/omap/
H A Dam335x-pdu001.dts6 * Copyright (C) 2018 EETS GmbH - https://www.eets.ch/
8 * Copyright (C) 2011, Texas Instruments, Incorporated - https://www.ti.com/
10 * SPDX-License-Identifier: GPL-2.0+
13 /dts-v1/;
16 #include <dt-bindings/interrupt-controller/irq.h>
17 #include <dt-bindings/leds/leds-pca9532.h>
24 stdout-path = "serial3:115200n8";
29 cpu0-supply = <&vdd1_reg>;
39 compatible = "regulator-fixed";
40 regulator-name = "vbat";
[all …]
H A Dam335x-pocketbeagle.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
7 /dts-v1/;
10 #include "am335x-osd335x-common.dtsi"
11 #include <dt-bindings/leds/common.h>
15 compatible = "ti,am335x-pocketbeagle", "ti,am335x-bone", "ti,am33xx";
18 stdout-path = "serial0:115200n8";
22 pinctrl-names = "default";
23 pinctrl-0 = <&usr_leds_pins>;
25 compatible = "gpio-leds";
[all …]
/linux/arch/riscv/boot/dts/allwinner/
H A Dsun20i-d1-mangopi-mq-pro.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/leds/common.h>
7 /dts-v1/;
9 #include "sun20i-d1.dtsi"
10 #include "sun20i-common-regulators.dtsi"
14 compatible = "widora,mangopi-mq-pro", "allwinner,sun20i-d1";
22 stdout-path = "serial0:115200n8";
26 compatible = "gpio-leds";
28 led-0 {
[all …]
/linux/arch/arm/boot/dts/renesas/
H A Dr9a06g032-rzn1d400-db.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the RZN1D-DB Board
9 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/leds/common.h>
14 #include <dt-bindings/net/pcs-rzn1-miic.h>
15 #include <dt-bindings/pinctrl/rzn1-pinctrl.h>
20 model = "RZN1D-DB Board";
21 compatible = "renesas,rzn1d400-db", "renesas,r9a06g032";
[all …]
/linux/arch/arm/boot/dts/allwinner/
H A Dsunxi-bananapi-m2-plus.dtsi2 * Copyright (C) 2016 Chen-Yu Tsai <wens@csie.org>
4 * This file is dual-licensed: you can use it either under the terms
43 #include "sunxi-common-regulators.dtsi"
45 #include <dt-bindings/gpio/gpio.h>
46 #include <dt-bindings/input/input.h>
56 stdout-path = "serial0:115200n8";
60 compatible = "hdmi-connector";
65 remote-endpoint = <&hdmi_out_con>;
71 compatible = "gpio-leds";
74 label = "bananapi-m2-plus:red:pwr";
[all …]
H A Dsun8i-h3-nanopi-r1.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 * Copyright (C) 2020 Yu-Tung Chang <mtwget@gmail.com>
8 #include "sun8i-h3-nanopi.dtsi"
9 #include <dt-bindings/leds/common.h>
13 compatible = "friendlyarm,nanopi-r1", "allwinner,sun8i-h3";
21 reg_gmac_3v3: gmac-3v3 {
22 compatible = "regulator-fixed";
23 regulator-name = "gmac-3v3";
24 regulator-min-microvolt = <3300000>;
25 regulator-max-microvolt = <3300000>;
[all …]
/linux/arch/arm64/boot/dts/mediatek/
H A Dmt8390-genio-common.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
4 * Author: Chris Chen <chris-qj.chen@mediatek.com>
9 * Louis-Alexis Eyraud <louisalexis.eyraud@collabora.com>
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/input/input.h>
16 #include <dt-bindings/interrupt-controller/irq.h>
17 #include <dt-bindings/pinctrl/mediatek,mt8188-pinfunc.h>
18 #include <dt-bindings/regulator/mediatek,mt6360-regulator.h>
19 #include <dt-bindings/spmi/spmi.h>
20 #include <dt-bindings/usb/pd.h>
[all …]

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