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/linux/sound/soc/
H A Dsoc-jack.c1 // SPDX-License-Identifier: GPL-2.0+
3 // soc-jack.c -- ALSA SoC jack handling
20 * snd_soc_jack_report - Report the current status for a jack
36 struct snd_soc_jack_pin *pin; in snd_soc_jack_report() local
39 if (!jack || !jack->jack) in snd_soc_jack_report()
43 dapm = &jack->card->dapm; in snd_soc_jack_report()
45 mutex_lock(&jack->mutex); in snd_soc_jack_report()
47 jack->status &= ~mask; in snd_soc_jack_report()
48 jack->status |= status & mask; in snd_soc_jack_report()
52 list_for_each_entry(pin, &jack->pins, list) { in snd_soc_jack_report()
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H A Dsoc-dapm.c1 // SPDX-License-Identifier: GPL-2.0+
3 // soc-dapm.c -- ALSA SoC Dynamic Audio Power Management
12 // o Platform power domain - can support external components i.e. amps and
15 // o Jack insertion power event initiation - e.g. hp insertion will enable
43 #define DAPM_UPDATE_STAT(widget, val) widget->dapm->car
2333 dapm_widget_power_read_file(struct file * file,char __user * user_buf,size_t count,loff_t * ppos) dapm_widget_power_read_file() argument
2413 dapm_bias_read_file(struct file * file,char __user * user_buf,size_t count,loff_t * ppos) dapm_bias_read_file() argument
2636 dapm_widget_show_component(struct snd_soc_component * component,char * buf,int count) dapm_widget_show_component() argument
2705 int i, count = 0; dapm_widget_show() local
2787 dapm_find_widget(struct snd_soc_dapm_context * dapm,const char * pin,bool search_other_contexts) dapm_find_widget() argument
2825 __snd_soc_dapm_set_pin(struct snd_soc_dapm_context * dapm,const char * pin,int status) __snd_soc_dapm_set_pin() argument
2856 snd_soc_dapm_set_pin(struct snd_soc_dapm_context * dapm,const char * pin,int status) snd_soc_dapm_set_pin() argument
3538 __snd_soc_dapm_get_pin_switch(struct snd_soc_dapm_context * dapm,const char * pin,struct snd_ctl_elem_value * ucontrol) __snd_soc_dapm_get_pin_switch() argument
3561 const char *pin = (const char *)kcontrol->private_value; snd_soc_dapm_get_pin_switch() local
3580 const char *pin = (const char *)kcontrol->private_value; snd_soc_dapm_get_component_pin_switch() local
3587 __snd_soc_dapm_put_pin_switch(struct snd_soc_dapm_context * dapm,const char * pin,struct snd_ctl_elem_value * ucontrol) __snd_soc_dapm_put_pin_switch() argument
3614 const char *pin = (const char *)kcontrol->private_value; snd_soc_dapm_put_pin_switch() local
3633 const char *pin = (const char *)kcontrol->private_value; snd_soc_dapm_put_component_pin_switch() local
4081 int count; snd_soc_dapm_free_kcontrol() local
4110 int count; snd_soc_dapm_alloc_kcontrol() local
4548 snd_soc_dapm_enable_pin_unlocked(struct snd_soc_dapm_context * dapm,const char * pin) snd_soc_dapm_enable_pin_unlocked() argument
4565 snd_soc_dapm_enable_pin(struct snd_soc_dapm_context * dapm,const char * pin) snd_soc_dapm_enable_pin() argument
4594 snd_soc_dapm_force_enable_pin_unlocked(struct snd_soc_dapm_context * dapm,const char * pin) snd_soc_dapm_force_enable_pin_unlocked() argument
4633 snd_soc_dapm_force_enable_pin(struct snd_soc_dapm_context * dapm,const char * pin) snd_soc_dapm_force_enable_pin() argument
4660 snd_soc_dapm_disable_pin_unlocked(struct snd_soc_dapm_context * dapm,const char * pin) snd_soc_dapm_disable_pin_unlocked() argument
4677 snd_soc_dapm_disable_pin(struct snd_soc_dapm_context * dapm,const char * pin) snd_soc_dapm_disable_pin() argument
4701 snd_soc_dapm_get_pin_status(struct snd_soc_dapm_context * dapm,const char * pin) snd_soc_dapm_get_pin_status() argument
4724 snd_soc_dapm_ignore_suspend(struct snd_soc_dapm_context * dapm,const char * pin) snd_soc_dapm_ignore_suspend() argument
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/linux/drivers/gpio/
H A Dgpio-dln2.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Driver for the Diolan DLN-2 USB-GPIO adapter
51 * Cache pin direction to save us one transfer, since the hardware has
56 /* active IRQs - not synced to hardware */
58 /* active IRQS - synced to hardware */
65 __le16 pin; member
69 __le16 pin __packed;
76 __le16 count; in dln2_gpio_get_pin_count() local
77 int len = sizeof(count); in dln2_gpio_get_pin_count()
79 ret = dln2_transfer_rx(pdev, DLN2_GPIO_GET_PIN_COUNT, &count, &len); in dln2_gpio_get_pin_count()
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/linux/drivers/tty/serial/
H A Dsh-sci.h1 /* SPDX-License-Identifier: GPL-2.0 */
20 SCFDR, /* FIFO Data Count Register */
24 SCTFDR, /* Transmit FIFO Data Count Register */
25 SCRFDR, /* Receive FIFO Data Count Register */
32 HSRTRGR, /* Rx FIFO Data Count Trigger Register */
33 HSTTRGR, /* Tx FIFO Data Count Trigger Register */
40 #define SCSMR_CSYNC BIT(7) /* - Clocked synchronous mode */
41 #define SCSMR_ASYNC 0 /* - Asynchronous mode */
42 #define SCSMR_CHR BIT(6) /* 7-bit Character Length */
67 /* Serial Control Register, HSCIF-only bits */
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/linux/include/sound/
H A Dsoc-jack.h1 /* SPDX-License-Identifier: GPL-2.0
3 * soc-jack.h
12 * struct snd_soc_jack_pin - Describes a pin to update based on jack detection
14 * @pin: name of the pin to update
16 * @invert: if non-zero then pin is enabled when status is not reported
21 const char *pin; member
27 * struct snd_soc_jack_zone - Describes voltage zones of jack detection
45 * struct snd_soc_jack_gpio - Describes a gpio pin for jack detection
92 int snd_soc_jack_add_pins(struct snd_soc_jack *jack, int count,
98 int snd_soc_jack_add_zones(struct snd_soc_jack *jack, int count,
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/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Dqcom,mpm.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/qcom,mpm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shawn Guo <shawn.guo@linaro.org>
14 MSM Power Manager (MPM) that is in always-on domain. In addition to managing
21 - $ref: /schemas/interrupt-controller.yaml#
26 - const: qcom,mpm
34 qcom,rpm-msg-ram:
49 interrupt-controller: true
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/linux/drivers/net/ethernet/intel/ice/
H A Dice_dpll.c1 // SPDX-License-Identifier: GPL-2.0
53 * enum ice_dpll_pin_type - enumerate ice pin types:
54 * @ICE_DPLL_PIN_INVALID: invalid pin type
55 * @ICE_DPLL_PIN_TYPE_INPUT: input pin
56 * @ICE_DPLL_PIN_TYPE_OUTPUT: output pin
57 * @ICE_DPLL_PIN_TYPE_RCLK_INPUT: recovery clock input pin
71 [ICE_DPLL_PIN_TYPE_RCLK_INPUT] = "rclk-input",
83 * ice_dpll_is_sw_pin - check if given pin shall be controlled by SW
85 * @index: index of a pin as understood by FW
88 * Check if the pin shall be controlled by SW - instead of providing raw access
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/linux/drivers/pinctrl/ti/
H A Dpinctrl-ti-iodelay.c5 * Copyright (C) 2015-2017 Texas Instruments Incorporated - https://www.ti.com/
23 #include <linux/pinctrl/pinconf-generic.h>
30 #define DRIVER_NAME "ti-iodelay"
33 * struct ti_iodelay_reg_data - Describes the registers for the iodelay instance
44 * @coarse_delay_count_mask: Coarse delay count mask
45 * @coarse_ref_count_mask: Coarse ref count mask
47 * @fine_delay_count_mask: Fine delay count mask
48 * @fine_ref_count_mask: Fine ref count mask
54 * @reg_nr_per_pin: Number of iodelay registers for each pin
89 * struct ti_iodelay_reg_values - Computed io_reg configuration values (see TRM)
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/linux/drivers/pinctrl/spear/
H A Dpinctrl-plgpio.c27 #define PIN_OFFSET(pin) (pin % MAX_GPIO_PER_REG) argument
28 #define REG_OFFSET(base, reg, pin) (base + reg + (pin / MAX_GPIO_PER_REG) \ argument
59 * p2o: function ptr for pin to offset conversion. This is required only for
60 * machines where mapping b/w pin and offset is not 1-to-1.
61 * o2p: function ptr for offset to pin conversion. This is required only for
62 * machines where mapping b/w pin and offset is not 1-to-1.
72 int (*p2o)(int pin); /* pin_to_offset */
82 static inline u32 is_plgpio_set(struct regmap *regmap, u32 pin, u32 reg) in is_plgpio_set() argument
84 u32 offset = PIN_OFFSET(pin); in is_plgpio_set()
85 u32 reg_off = REG_OFFSET(0, reg, pin); in is_plgpio_set()
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/linux/sound/hda/codecs/
H A Dgeneric.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Generic BIOS auto-parser helper functions for HD-audio
16 /* table entry for multi-io paths */
18 hda_nid_t pin; /* multi-io widget pin NID */ member
20 unsigned int ctl_in; /* cached input-pin control value */
25 * For output, stored in the order of DAC -> ... -> pin,
26 * for input, pin -> ... -> ADC.
30 * multi[] indicates whether it's a selector widget with multi-connectors
52 bool pin_fixed:1; /* path with fixed pin */
56 /* mic/line-in auto switching entry */
[all …]
/linux/drivers/dpll/zl3073x/
H A Dprop.c1 // SPDX-License-Identifier: GPL-2.0-only
16 * zl3073x_pin_check_freq - verify frequency for given pin
18 * @dir: pin direction
19 * @id: pin index
47 /* Get output pin synthesizer */ in zl3073x_pin_check_freq()
62 dev_warn(zldev->dev, in zl3073x_pin_check_freq()
69 * zl3073x_prop_pin_package_label_set - get package label for the pin
71 * @props: pointer to pin properties
72 * @dir: pin direction
73 * @id: pin index
[all …]
/linux/arch/arm/mach-orion5x/
H A Dterastation_pro2-setup.c1 // SPDX-License-Identifier: GPL-2.0-or-later
18 #include <asm/mach-types.h>
31 * - Marvell 88F5281-D0
32 * - Marvell 88SX6042 SATA controller (PCI)
33 * - Marvell 88E1118 Gigabit Ethernet PHY
34 * - 256KB NOR flash
35 * - 128MB of DDR RAM
36 * - PCIe port (not equipped)
57 .end = TSP2_NOR_BOOT_BASE + TSP2_NOR_BOOT_SIZE - 1,
61 .name = "physmap-flash",
[all …]
/linux/drivers/firmware/xilinx/
H A Dzynqmp.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2014-2022 Xilinx, Inc.
6 * Copyright (C) 2022 - 2024, Advanced Micro Devices, Inc.
14 #include <linux/arm-smccc.h>
28 #include <linux/firmware/xlnx-zynqmp.h>
29 #include <linux/firmware/xlnx-event-manager.h>
30 #include "zynqmp-debug.h"
37 /* BOOT_PIN_CTRL- Used to control the mode pins after boot */
39 /* BOOT_PIN_CTRL_MASK- out_val[11:8], out_en[3:0] */
54 * struct zynqmp_devinfo - Structure for Zynqmp device instance
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/linux/samples/rust/
H A Drust_driver_pci.rs1 // SPDX-License-Identifier: GPL-2.0
3 //! Rust PCI driver sample (based on QEMU's `pci-testdev`).
5 //! To make this driver probe, QEMU must be run with `-device pci-testdev`.
15 const COUNT: usize = 0xC; constant
31 #[pin]
47 fn testdev(index: &TestIndex, bar: &Bar0) -> Result<u32> { in testdev()
54 // Write `data` to `offset` to increase `count` b in testdev()
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/linux/Documentation/devicetree/bindings/arm/hisilicon/
H A Dlow-pin-count.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/arm/hisilicon/low-pin-count.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Hisilicon HiP06 Low Pin Count device
10 - Wei Xu <xuwei5@hisilicon.com>
13 Hisilicon HiP06 SoCs implement a Low Pin Count (LPC) controller, which
21 pattern: '^isa@[0-9a-f]+$'
28 - hisilicon,hip06-lpc
29 - hisilicon,hip07-lpc
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/linux/drivers/pinctrl/sunxi/
H A Dpinctrl-sunxi.c6 * Maxime Ripard <maxime.ripard@free-electrons.com>
28 #include <linux/pinctrl/pinconf-generic.h>
33 #include <dt-bindings/pinctrl/sun4i-a10.h>
36 #include "pinctrl-sunxi.h"
51 * - Mux config
52 * - Data value
53 * - Drive level
54 * - Pull direction
59 * They take a pin number which is relative to the start of the current device.
66 static u32 sunxi_bank_offset(const struct sunxi_pinctrl *pctl, u32 pin) in sunxi_bank_offset() argument
[all …]
/linux/include/uapi/sound/
H A Dsnd_sst_tokens.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
3 * snd_sst_tokens.h - Intel SST tokens definition
17 * %SKL_TKN_U8_IN_PIN_TYPE: Input pin type,
20 * %SKL_TKN_U8_OUT_PIN_TYPE: Output pin type,
22 * %SKL_TKN_U8_DYN_IN_PIN: Configure Input pin dynamically
25 * %SKL_TKN_U8_DYN_OUT_PIN: Configure Output pin dynamically
65 * %SKL_TKN_U16_PIN_INST_ID: Stores the pin instance id
96 * formats and the pin count.
99 * the pin count value.
107 * %SKL_TKN_U32_FMT_CH: Supported channel count
[all …]
/linux/sound/soc/ti/
H A Dams-delta.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * ams-delta.c -- SoC audio for Amstrad E3 (Delta) videophone
19 #include <linux/platform_data/asoc-ti-mcbsp.h>
21 #include "omap-mcbsp.h"
68 /* Selection <-> pin translation */
102 struct snd_soc_dapm_context *dapm = &card->dapm; in ams_delta_set_audio_mode()
103 struct soc_enum *control = (struct soc_enum *)kcontrol->private_value; in ams_delta_set_audio_mode()
105 int pin, changed = 0; in ams_delta_set_audio_mode() local
108 if (!cx20442_codec->card->pop_time) in ams_delta_set_audio_mode()
109 return -EUNATCH; in ams_delta_set_audio_mode()
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/linux/rust/kernel/sync/
H A Darc.rs1 // SPDX-License-Identifier: GPL-2.0
3 //! A reference-counted pointer.
5 //! This module implements a way for users to create reference-counted objects and pointers to
6 //! them. Such a pointer automatically increments and decrements the count, and drops the
13 //! 3. It saturates the reference count instead of aborting when it goes over a threshold.
17 //! [`Arc`]: https://doc.rust-lang.org/std/sync/struct.Arc.html
34 pin::Pin,
823 impl<T: ?Sized> From<UniqueArc<T>> for Pin<UniqueArc<T>> { global() implementation
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/linux/arch/sparc/kernel/
H A Dpcic.c1 // SPDX-License-Identifier: GPL-2.0
3 * pcic.c: MicroSPARC-IIep PCI controller support
11 * CP-1200 by Eric Brower.
49 * schematics. And this actually sucks. -- zaitcev 1999/05/12
56 * find PCIC pin number where INT line goes. Then we may either program
62 unsigned char pin; /* PCIC external interrupt pin */ member
74 * JavaEngine-1 apparently has different versions.
76 * According to communications with Sun folks, for P2 build 501-4628-03:
77 * pin 0 - parallel, audio;
78 * pin 1 - Ethernet;
[all …]
/linux/drivers/usb/misc/
H A Dbrcmstb-usb-pinmap.c1 // SPDX-License-Identifier: GPL-2.0
60 static void sync_in_pin(struct in_pin *pin) in sync_in_pin() argument
64 val = gpiod_get_value(pin->gpiod); in sync_in_pin()
66 pinmap_set(pin->pdata->regs, pin->value_mask); in sync_in_pin()
68 pinmap_unset(pin->pdata->regs, pin->value_mask); in sync_in_pin()
83 pr_debug("%s: reg: 0x%x\n", __func__, readl(pdata->regs)); in brcmstb_usb_pinmap_ovr_isr()
84 pout = pdata->out_pins; in brcmstb_usb_pinmap_ovr_isr()
85 for (x = 0; x < pdata->out_count; x++) { in brcmstb_usb_pinmap_ovr_isr()
86 val = readl(pdata->regs); in brcmstb_usb_pinmap_ovr_isr()
87 if (val & pout->changed_mask) { in brcmstb_usb_pinmap_ovr_isr()
[all …]
/linux/Documentation/core-api/
H A Dpin_user_pages.rst1 .. SPDX-License-Identifier: GPL-2.0
32 all combinations of get*(), pin*(), FOLL_LONGTERM, and more. Also, the
35 In other words, use pin_user_pages*() for DMA-pinned pages, and
40 multiple threads and call sites are free to pin the same struct pages, via both
54 flags the caller provides. The caller is required to pass in a non-null struct
72 --------
79 but the caller passed in a non-null struct pages* array, then the function
80 sets FOLL_GET for you, and proceeds to pin pages by incrementing the refcount
84 --------
89 Tracking dma-pinned pages
[all …]
/linux/drivers/pinctrl/
H A Dpinctrl-tb10x.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Abilis Systems TB10x pin control driver
22 #include "pinctrl-utils.h"
37 (((1 << PCFG_PORT_BITWIDTH) - 1) << (PCFG_PORT_BITWIDTH * (PORT)))
442 DEFPINFUNCGRP(gpiob, -1, 0, 1),
443 DEFPINFUNCGRP(gpiod, -1, 0, 1),
444 DEFPINFUNCGRP(gpiof, -1, 0, 1),
445 DEFPINFUNCGRP(gpioh, -1, 0, 1),
446 DEFPINFUNCGRP(gpioi, -1, 0, 1),
458 * struct tb10x_port - state of an I/O port
[all …]
/linux/rust/pin-init/examples/
H A Dstatic_init.rs1 // SPDX-License-Identifier: Apache-2.0 OR MIT
12 pin::Pin,
37 pub const fn new(init: I) -> Self { in new()
49 fn deref(&self) -> &Self::Target { in deref()
78 ) -> Result<(), core::convert::Infallible> { in __pinned_init()
85 pub static COUNT: StaticInit<CMutex<usize>, CountInit> = StaticInit::new(CountInit); variable
90 let mtx: Pin<Arc<CMutex<usize>>> = Arc::pin_init(CMutex::new(0)).unwrap(); in main()
101 *COUNT.lock() += 1; in main()
105 *COUNT.lock() += 1; in main()
121 println!("{:?}, {:?}", &*mtx.lock(), &*COUNT.lock()); in main()
/linux/Documentation/devicetree/bindings/display/bridge/
H A Dparade,ps8622.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
15 - parade,ps8622
16 - parade,ps8625
21 lane-count:
26 use-external-pwm:
30 reset-gpios:
32 description: GPIO connected to RST_ pin.
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