1 // SPDX-License-Identifier: GPL-2.0-only
3  * Driver for the Diolan DLN-2 USB-GPIO adapter
51 	 * Cache pin direction to save us one transfer, since the hardware has
56 	/* active IRQs - not synced to hardware */
58 	/* active IRQS - synced to hardware */
65 	__le16 pin;  member
69 	__le16 pin __packed;
76 	__le16 count;  in dln2_gpio_get_pin_count()  local
77 	int len = sizeof(count);  in dln2_gpio_get_pin_count()
79 	ret = dln2_transfer_rx(pdev, DLN2_GPIO_GET_PIN_COUNT, &count, &len);  in dln2_gpio_get_pin_count()
82 	if (len < sizeof(count))  in dln2_gpio_get_pin_count()
83 		return -EPROTO;  in dln2_gpio_get_pin_count()
85 	return le16_to_cpu(count);  in dln2_gpio_get_pin_count()
88 static int dln2_gpio_pin_cmd(struct dln2_gpio *dln2, int cmd, unsigned pin)  in dln2_gpio_pin_cmd()  argument
91 		.pin = cpu_to_le16(pin),  in dln2_gpio_pin_cmd()
94 	return dln2_transfer_tx(dln2->pdev, cmd, &req, sizeof(req));  in dln2_gpio_pin_cmd()
97 static int dln2_gpio_pin_val(struct dln2_gpio *dln2, int cmd, unsigned int pin)  in dln2_gpio_pin_val()  argument
101 		.pin = cpu_to_le16(pin),  in dln2_gpio_pin_val()
106 	ret = dln2_transfer(dln2->pdev, cmd, &req, sizeof(req), &rsp, &len);  in dln2_gpio_pin_val()
109 	if (len < sizeof(rsp) || req.pin != rsp.pin)  in dln2_gpio_pin_val()
110 		return -EPROTO;  in dln2_gpio_pin_val()
115 static int dln2_gpio_pin_get_in_val(struct dln2_gpio *dln2, unsigned int pin)  in dln2_gpio_pin_get_in_val()  argument
119 	ret = dln2_gpio_pin_val(dln2, DLN2_GPIO_PIN_GET_VAL, pin);  in dln2_gpio_pin_get_in_val()
125 static int dln2_gpio_pin_get_out_val(struct dln2_gpio *dln2, unsigned int pin)  in dln2_gpio_pin_get_out_val()  argument
129 	ret = dln2_gpio_pin_val(dln2, DLN2_GPIO_PIN_GET_OUT_VAL, pin);  in dln2_gpio_pin_get_out_val()
136 				     unsigned int pin, int value)  in dln2_gpio_pin_set_out_val()  argument
139 		.pin = cpu_to_le16(pin),  in dln2_gpio_pin_set_out_val()
143 	return dln2_transfer_tx(dln2->pdev, DLN2_GPIO_PIN_SET_OUT_VAL, &req,  in dln2_gpio_pin_set_out_val()
154 		.pin = cpu_to_le16(offset),  in dln2_gpio_request()
164 	/* cache the pin direction */  in dln2_gpio_request()
165 	ret = dln2_transfer(dln2->pdev, DLN2_GPIO_PIN_GET_DIRECTION,  in dln2_gpio_request()
169 	if (len < sizeof(rsp) || req.pin != rsp.pin) {  in dln2_gpio_request()
170 		ret = -EPROTO;  in dln2_gpio_request()
176 		clear_bit(offset, dln2->output_enabled);  in dln2_gpio_request()
179 		set_bit(offset, dln2->output_enabled);  in dln2_gpio_request()
182 		ret = -EPROTO;  in dln2_gpio_request()
202 	if (test_bit(offset, dln2->output_enabled))  in dln2_gpio_get_direction()
236 		.pin = cpu_to_le16(offset),  in dln2_gpio_set_direction()
241 	ret = dln2_transfer_tx(dln2->pdev, DLN2_GPIO_PIN_SET_DIRECTION,  in dln2_gpio_set_direction()
247 		set_bit(offset, dln2->output_enabled);  in dln2_gpio_set_direction()
249 		clear_bit(offset, dln2->output_enabled);  in dln2_gpio_set_direction()
279 		return -ENOTSUPP;  in dln2_gpio_set_config()
282 	return dln2_transfer_tx(dln2->pdev, DLN2_GPIO_SET_DEBOUNCE,  in dln2_gpio_set_config()
286 static int dln2_gpio_set_event_cfg(struct dln2_gpio *dln2, unsigned pin,  in dln2_gpio_set_event_cfg()  argument
290 		__le16 pin;  in dln2_gpio_set_event_cfg()  member
294 		.pin = cpu_to_le16(pin),  in dln2_gpio_set_event_cfg()
299 	return dln2_transfer_tx(dln2->pdev, DLN2_GPIO_PIN_SET_EVENT_CFG,  in dln2_gpio_set_event_cfg()
307 	int pin = irqd_to_hwirq(irqd);  in dln2_irq_unmask()  local
309 	gpiochip_enable_irq(gc, pin);  in dln2_irq_unmask()
310 	set_bit(pin, dln2->unmasked_irqs);  in dln2_irq_unmask()
317 	int pin = irqd_to_hwirq(irqd);  in dln2_irq_mask()  local
319 	clear_bit(pin, dln2->unmasked_irqs);  in dln2_irq_mask()
320 	gpiochip_disable_irq(gc, pin);  in dln2_irq_mask()
327 	int pin = irqd_to_hwirq(irqd);  in dln2_irq_set_type()  local
331 		dln2->irq_type[pin] = DLN2_GPIO_EVENT_LVL_HIGH;  in dln2_irq_set_type()
334 		dln2->irq_type[pin] = DLN2_GPIO_EVENT_LVL_LOW;  in dln2_irq_set_type()
337 		dln2->irq_type[pin] = DLN2_GPIO_EVENT_CHANGE;  in dln2_irq_set_type()
340 		dln2->irq_type[pin] = DLN2_GPIO_EVENT_CHANGE_RISING;  in dln2_irq_set_type()
343 		dln2->irq_type[pin] = DLN2_GPIO_EVENT_CHANGE_FALLING;  in dln2_irq_set_type()
346 		return -EINVAL;  in dln2_irq_set_type()
357 	mutex_lock(&dln2->irq_lock);  in dln2_irq_bus_lock()
364 	int pin = irqd_to_hwirq(irqd);  in dln2_irq_bus_unlock()  local
369 	enabled = test_bit(pin, dln2->enabled_irqs);  in dln2_irq_bus_unlock()
370 	unmasked = test_bit(pin, dln2->unmasked_irqs);  in dln2_irq_bus_unlock()
374 			type = dln2->irq_type[pin] & DLN2_GPIO_EVENT_MASK;  in dln2_irq_bus_unlock()
375 			set_bit(pin, dln2->enabled_irqs);  in dln2_irq_bus_unlock()
378 			clear_bit(pin, dln2->enabled_irqs);  in dln2_irq_bus_unlock()
381 		ret = dln2_gpio_set_event_cfg(dln2, pin, type, 0);  in dln2_irq_bus_unlock()
383 			dev_err(dln2->gpio.parent, "failed to set event\n");  in dln2_irq_bus_unlock()
386 	mutex_unlock(&dln2->irq_lock);  in dln2_irq_bus_unlock()
390 	.name = "dln2-irq",
403 	int pin, ret;  in dln2_gpio_event()  local
406 		__le16 count;  in dln2_gpio_event()  member
408 		__le16 pin;  in dln2_gpio_event()  member
414 		dev_err(dln2->gpio.parent, "short event message\n");  in dln2_gpio_event()
418 	pin = le16_to_cpu(event->pin);  in dln2_gpio_event()
419 	if (pin >= dln2->gpio.ngpio) {  in dln2_gpio_event()
420 		dev_err(dln2->gpio.parent, "out of bounds pin %d\n", pin);  in dln2_gpio_event()
424 	switch (dln2->irq_type[pin]) {  in dln2_gpio_event()
426 		if (!event->value)  in dln2_gpio_event()
430 		if (event->value)  in dln2_gpio_event()
435 	ret = generic_handle_domain_irq(dln2->gpio.irq.domain, pin);  in dln2_gpio_event()
437 		dev_err(dln2->gpio.parent, "pin %d not mapped to IRQ\n", pin);  in dln2_gpio_event()
443 	struct device *dev = &pdev->dev;  in dln2_gpio_probe()
450 		dev_err(dev, "failed to get pin count: %d\n", pins);  in dln2_gpio_probe()
458 	dln2 = devm_kzalloc(&pdev->dev, sizeof(*dln2), GFP_KERNEL);  in dln2_gpio_probe()
460 		return -ENOMEM;  in dln2_gpio_probe()
462 	mutex_init(&dln2->irq_lock);  in dln2_gpio_probe()
464 	dln2->pdev = pdev;  in dln2_gpio_probe()
466 	dln2->gpio.label = "dln2";  in dln2_gpio_probe()
467 	dln2->gpio.parent = dev;  in dln2_gpio_probe()
468 	dln2->gpio.owner = THIS_MODULE;  in dln2_gpio_probe()
469 	dln2->gpio.base = -1;  in dln2_gpio_probe()
470 	dln2->gpio.ngpio = pins;  in dln2_gpio_probe()
471 	dln2->gpio.can_sleep = true;  in dln2_gpio_probe()
472 	dln2->gpio.set = dln2_gpio_set;  in dln2_gpio_probe()
473 	dln2->gpio.get = dln2_gpio_get;  in dln2_gpio_probe()
474 	dln2->gpio.request = dln2_gpio_request;  in dln2_gpio_probe()
475 	dln2->gpio.free = dln2_gpio_free;  in dln2_gpio_probe()
476 	dln2->gpio.get_direction = dln2_gpio_get_direction;  in dln2_gpio_probe()
477 	dln2->gpio.direction_input = dln2_gpio_direction_input;  in dln2_gpio_probe()
478 	dln2->gpio.direction_output = dln2_gpio_direction_output;  in dln2_gpio_probe()
479 	dln2->gpio.set_config = dln2_gpio_set_config;  in dln2_gpio_probe()
481 	girq = &dln2->gpio.irq;  in dln2_gpio_probe()
484 	girq->parent_handler = NULL;  in dln2_gpio_probe()
485 	girq->num_parents = 0;  in dln2_gpio_probe()
486 	girq->parents = NULL;  in dln2_gpio_probe()
487 	girq->default_type = IRQ_TYPE_NONE;  in dln2_gpio_probe()
488 	girq->handler = handle_simple_irq;  in dln2_gpio_probe()
492 	ret = devm_gpiochip_add_data(dev, &dln2->gpio, dln2);  in dln2_gpio_probe()
514 	.driver.name	= "dln2-gpio",
524 MODULE_ALIAS("platform:dln2-gpio");