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/freebsd/sys/contrib/device-tree/Bindings/pinctrl/
H A Drenesas,pfc-pinctrl.txt1 * Renesas Pin Function Controller (GPIO and Pin Mux/Config)
3 The Pin Function Controller (PFC) is a Pin Mux/Config controller. On SH73A0,
7 Pin Control
8 -----------
12 - compatible: should be one of the following.
13 - "renesas,pfc-emev2": for EMEV2 (EMMA Mobile EV2) compatible pin-controller.
14 - "renesas,pfc-r8a73a4": for R8A73A4 (R-Mobile APE6) compatible pin-controller.
15 - "renesas,pfc-r8a7740": for R8A7740 (R-Mobile A1) compatible pin-controller.
16 - "renesas,pfc-r8a7742": for R8A7742 (RZ/G1H) compatible pin-controller.
17 - "renesas,pfc-r8a7743": for R8A7743 (RZ/G1M) compatible pin-controller.
[all …]
H A Dsamsung-pinctrl.txt1 Samsung GPIO and Pin Mux/Config controller
3 Samsung's ARM based SoC's integrates a GPIO and Pin mux/config hardware
6 on-chip controllers onto these pads.
9 - compatible: should be one of the following.
10 - "samsung,s3c2412-pinctrl": for S3C2412-compatible pin-controller,
11 - "samsung,s3c2416-pinctrl": for S3C2416-compatible pin-controller,
12 - "samsung,s3c2440-pinctrl": for S3C2440-compatible pin-controller,
13 - "samsung,s3c2450-pinctrl": for S3C2450-compatible pin-controller,
14 - "samsung,s3c64xx-pinctrl": for S3C64xx-compatible pin-controller,
15 - "samsung,s5pv210-pinctrl": for S5PV210-compatible pin-controller,
[all …]
H A Dsamsung,pinctrl.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung S3C/S5P/Exynos SoC pin controller
10 - Krzysztof Kozlowski <krzk@kernel.org>
11 - Sylwester Nawrocki <s.nawrocki@samsung.com>
12 - Tomasz Figa <tomasz.figa@gmail.com>
15 This is a part of device tree bindings for Samsung S3C/S5P/Exynos SoC pin
18 All the pin controller nodes should be represented in the aliases node using
22 - External GPIO interrupts (see interrupts property in pin controller node);
[all …]
H A Dcnxt,cx92755-pinctrl.txt1 Conexant Digicolor CX92755 General Purpose Pin Mapping
3 This document describes the device tree binding of the pin mapping hardware
7 === Pin Controller Node ===
11 - compatible: Must be "cnxt,cx92755-pinctrl"
12 - reg: Base address of the General Purpose Pin Mapping register block and the
14 - gpio-controller: Marks the device node as a GPIO controller.
15 - #gpio-cells: Must be <2>. The first cell is the pin number and the
16 second cell is used to specify flags. See include/dt-bindings/gpio/gpio.h
22 compatible = "cnxt,cx92755-pinctrl";
24 gpio-controller;
[all …]
/freebsd/sys/contrib/device-tree/src/arm/microchip/
H A Dsama5d4.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * sama5d4.dtsi - Device Tree Include file for SAMA5D4 family SoC
9 #include <dt-bindings/clock/at91.h>
10 #include <dt-bindings/dma/at91.h>
11 #include <dt-bindings/mfd/at91-usart.h>
12 #include <dt-bindings/pinctrl/at91.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
14 #include <dt-bindings/gpio/gpio.h>
17 #address-cells = <1>;
18 #size-cells = <1>;
[all …]
H A Dat91sam9n12.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * at91sam9n12.dtsi - Device Tree include file for AT91SAM9N12 SoC
9 #include <dt-bindings/dma/at91.h>
10 #include <dt-bindings/pinctrl/at91.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/clock/at91.h>
14 #include <dt-bindings/mfd/at91-usart.h>
17 #address-cells = <1>;
18 #size-cells = <1>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm/samsung/
H A Ds5pv210-aries.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
12 compatible = "samsung,aries", "samsung,s5pv210";
32 reserved-memory {
33 #address-cells = <1>;
34 #size-cells = <1>;
38 compatible = "shared-dma-pool";
39 no-map;
[all …]
H A Dexynos4210-i9100.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Samsung's Exynos4210 based Galaxy S2 (GT-I9100 version) device tree
11 /dts-v1/;
13 #include "exynos4412-ppmu-common.dtsi"
15 #include <dt-bindings/gpio/gpio.h>
16 #include <dt-bindings/input/linux-event-codes.h>
19 model = "Samsung Galaxy S2 (GT-I9100)";
20 compatible = "samsung,i9100", "samsung,exynos4210", "samsung,exynos4";
21 chassis-type = "handset";
35 stdout-path = "serial2:115200n8";
[all …]
H A Dexynos5420-peach-pit.dts1 // SPDX-License-Identifier: GPL-2.0
8 /dts-v1/;
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/clock/maxim,max77802.h>
13 #include <dt-bindings/regulator/maxim,max77802.h>
14 #include <dt-bindings/sound/samsung-i2s.h>
16 #include "exynos5420-cpus.dtsi"
21 compatible = "google,pit-rev16",
[all …]
H A Dexynos5250-snow-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/clock/maxim,max77686.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/sound/samsung-i2
[all...]
H A Dexynos5800-peach-pi.dts1 // SPDX-License-Identifier: GPL-2.0
8 /dts-v1/;
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/clock/maxim,max77802.h>
13 #include <dt-bindings/regulator/maxim,max77802.h>
14 #include <dt-bindings/sound/samsung-i2s.h>
16 #include "exynos5420-cpus.dtsi"
21 compatible = "google,pi-rev16",
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/freescale/
H A Dimx8mq-nitrogen.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/input/input.h>
13 compatible = "boundary,imx8mq-nitrogen8m", "fsl,imx8mq";
16 stdout-path = "serial0:115200n8";
24 gpio-keys {
25 compatible
[all...]
/freebsd/sys/contrib/device-tree/src/arm/broadcom/
H A Dbcm2711.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/soc/bcm2835-pm.h>
8 compatible = "brcm,bcm2711";
10 #address-cells = <2>;
11 #size-cells = <1>;
13 interrupt-parent = <&gicv2>;
16 compatible = "brcm,bcm2711-vc5";
20 clk_27MHz: clk-27M {
21 #clock-cells = <0>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm/amlogic/
H A Dmeson8b-odroidc1.dts1 // SPDX-License-Identifier: GPL-2.0 OR MIT
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
12 model = "Hardkernel ODROID-C1";
13 compatible = "hardkernel,odroid-c1", "amlogic,meson8b";
22 stdout-path = "serial0:115200n8";
30 emmc_pwrseq: emmc-pwrseq {
31 compatible = "mmc-pwrseq-emmc";
32 reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
36 compatible = "gpio-leds";
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/rockchip/
H A Drk3566-soquartz-model-a.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 /dts-v1/;
5 #include "rk3566-soquartz.dtsi"
9 compatible = "pine64,soquartz-model-a", "pine64,soquartz", "rockchip,rk3566";
16 vcc12v_dcin: regulator-vcc12v-dcin {
17 compatible = "regulator-fixed";
18 regulator-name = "vcc12v_dcin";
19 regulator-always-on;
20 regulator-boot-on;
21 regulator-min-microvolt = <12000000>;
[all …]
H A Drk3588-friendlyelec-cm3588-nas.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/pinctrl/rockchip.h>
14 #include <dt-bindings/soc/rockchip,vop2.h>
15 #include <dt-bindings/usb/pd.h>
16 #include "rk3588-friendlyelec-cm3588.dtsi"
20 compatible = "friendlyarm,cm3588-nas", "friendlyarm,cm3588", "rockchip,rk3588";
22 adc_key_recovery: adc-key-recovery {
[all …]
H A Drk3566-soquartz-cm4.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 /dts-v1/;
5 #include "rk3566-soquartz.dtsi"
8 model = "Pine64 SOQuartz on CM4-IO carrier board";
9 compatible = "pine64,soquartz-cm4io", "pine64,soquartz", "rockchip,rk3566";
16 vcc12v_dcin: regulator-vcc12v-dcin {
17 compatible = "regulator-fixed";
18 regulator-name = "vcc12v_dcin";
19 regulator-always-on;
20 regulator-boot-on;
[all …]
H A Drk3328-rock-pi-e.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * (C) Copyright 2020 Chen-Yu Tsai <wens@csie.org>
5 * Based on ./rk3328-rock64.dts, which is
10 /dts-v1/;
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/input/input.h>
14 #include <dt-bindings/leds/common.h>
15 #include <dt-bindings/pinctrl/rockchip.h>
21 compatible = "radxa,rockpi-e", "rockchip,rk3328";
31 stdout-path = "serial2:1500000n8";
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/hisilicon/
H A Dhi6220-hikey.dts1 // SPDX-License-Identifier: GPL-2.0
9 /dts-v1/;
11 #include "hikey-pinctrl.dtsi"
12 #include <dt-bindings/gpio/gpio.h>
16 compatible = "hisilicon,hi6220-hikey", "hisilicon,hi6220";
26 stdout-path = "serial3:115200n8";
32 * 0x05e0,0000 - 0x05ef,ffff: MCU firmware runtime using
33 * 0x05f0,1000 - 0x05f0,1fff: Reboot reason
34 * 0x06df,f000 - 0x06df,ffff: Mailbox message data
35 * 0x0740,f000 - 0x0740,ffff: MCU firmware section
[all …]
H A Dhi3660-hikey960.dts1 // SPDX-License-Identifier: GPL-2.0
9 /dts-v1/;
12 #include "hikey960-pinctrl.dtsi"
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/input/input.h>
15 #include <dt-bindings/interrupt-controller/irq.h>
16 #include <dt-bindings/usb/pd.h>
20 compatible = "hisilicon,hi3660-hikey960", "hisilicon,hi3660";
35 stdout-path = "serial6:115200n8";
44 reserved-memory {
[all …]
/freebsd/sys/contrib/device-tree/src/arm/aspeed/
H A Daspeed-bmc-opp-palmetto.dts1 // SPDX-License-Identifier: GPL-2.0+
2 /dts-v1/;
4 #include "aspeed-g4.dtsi"
5 #include <dt-bindings/gpio/aspeed-gpio.h>
9 compatible = "tyan,palmetto-bmc", "aspeed,ast2400";
12 stdout-path = &uart5;
20 reserved-memory {
21 #address-cells = <1>;
22 #size-cells = <1>;
26 no-map;
[all …]
H A Daspeed-bmc-lenovo-hr855xg2.dts1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright (C) 2019-present Lenovo
8 /dts-v1/;
10 #include "aspeed-g5.dtsi"
11 #include <dt-bindings/gpio/aspeed-gpio.h>
15 compatible = "lenovo,hr855xg2-bmc", "aspeed,ast2500";
29 stdout-path = &uart5;
38 reserved-memory {
39 #address-cells = <1>;
40 #size-cells = <1>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/exynos/
H A Dexynos7870-j6lte.dts1 // SPDX-License-Identifier: GPL-2.0
9 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
17 compatible = "samsung,j6lte", "samsung,exynos7870";
18 chassis-type = "handset";
30 #address-cells = <2>;
31 #size-cells = <1>;
34 stdout-path = &serial2;
[all …]
H A Dexynos7870-a2corelte.dts1 // SPDX-License-Identifier: GPL-2.0
9 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
17 compatible = "samsung,a2corelte", "samsung,exynos7870";
18 chassis-type = "handset";
30 #address-cells = <2>;
31 #size-cells = <1>;
34 stdout-path = &serial2;
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/exynos/google/
H A Dgs101-pixel-common.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Device Tree nodes common for all GS101-based Pixel
5 * Copyright 2021-2023 Google LLC
6 * Copyright 2023 Linaro Ltd - <peter.griffin@linaro.org>
9 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/usb/pd.h>
14 #include "gs101-pinctrl.h"
25 stdout-path = &serial_0;
[all …]

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