Lines Matching +full:pin +full:- +full:compatible
1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung S3C/S5P/Exynos SoC pin controller
10 - Krzysztof Kozlowski <krzk@kernel.org>
11 - Sylwester Nawrocki <s.nawrocki@samsung.com>
12 - Tomasz Figa <tomasz.figa@gmail.com>
15 This is a part of device tree bindings for Samsung S3C/S5P/Exynos SoC pin
18 All the pin controller nodes should be represented in the aliases node using
22 - External GPIO interrupts (see interrupts property in pin controller node);
24 - External wake-up interrupts - multiplexed (capable of waking up the system
25 see interrupts property in external wake-up interrupt controller node -
26 samsung,pinctrl-wakeup-interrupt.yaml);
28 - External wake-up interrupts - direct (capable of waking up the system, see
29 interrupts property in every bank of pin controller with external wake-up
30 interrupt controller - samsung,pinctrl-gpio-bank.yaml).
36 compatible:
38 - google,gs101-pinctrl
39 - samsung,s3c2412-pinctrl
40 - samsung,s3c2416-pinctrl
41 - samsung,s3c2440-pinctrl
42 - samsung,s3c2450-pinctrl
43 - samsung,s3c64xx-pinctrl
44 - samsung,s5pv210-pinctrl
45 - samsung,exynos3250-pinctrl
46 - samsung,exynos4210-pinctrl
47 - samsung,exynos4x12-pinctrl
48 - samsung,exynos5250-pinctrl
49 - samsung,exynos5260-pinctrl
50 - samsung,exynos5410-pinctrl
51 - samsung,exynos5420-pinctrl
52 - samsung,exynos5433-pinctrl
53 - samsung,exynos7-pinctrl
54 - samsung,exynos7885-pinctrl
55 - samsung,exynos850-pinctrl
56 - samsung,exynosautov9-pinctrl
57 - samsung,exynosautov920-pinctrl
58 - tesla,fsd-pinctrl
65 power-domains:
70 Second base address of the pin controller if the specific registers of
71 the pin controller are separated into the different base address.
72 Only certain banks of certain pin controller might need it.
79 clock-names:
81 - const: pclk
83 wakeup-interrupt-controller:
84 $ref: samsung,pinctrl-wakeup-interrupt.yaml
87 "^[a-z]+[0-9]*-gpio-bank$":
89 Pin banks of the controller are represented by child nodes of the
91 $ref: samsung,pinctrl-gpio-bank.yaml
93 "^[a-z0-9-]+-pins$":
95 - $ref: samsung,pinctrl-pins-cfg.yaml
97 - samsung,pins
98 - type: object
100 "^[a-z0-9-]+-pins$":
101 $ref: samsung,pinctrl-pins-cfg.yaml
105 "^(initial|sleep)-state$":
110 "^(pin-[a-z0-9-]+|[a-z0-9-]+-pin)$":
111 $ref: samsung,pinctrl-pins-cfg.yaml
115 description: See samsung,pinctrl-pins-cfg.yaml
116 $ref: /schemas/types.yaml#/definitions/string-array
120 - samsung,pins
125 - compatible
126 - reg
129 - $ref: pinctrl.yaml#
130 - if:
132 compatible:
134 const: google,gs101-pinctrl
137 - clocks
138 - clock-names
142 clock-names: false
144 - if:
146 compatible:
148 const: samsung,exynos5433-pinctrl
163 - |
165 compatible = "samsung,s3c64xx-pinctrl";
167 interrupt-parent = <&vic1>;
170 wakeup-interrupt-controller {
171 compatible = "samsung,s3c64xx-wakeup-eint";
172 interrupts-extended = <&vic0 0>,
178 /* Pin bank with external GPIO or muxed external wake-up interrupts */
179 gpa-gpio-bank {
180 gpio-controller;
181 #gpio-cells = <2>;
182 interrupt-controller;
183 #interrupt-cells = <2>;
188 uart0-data-pins {
189 samsung,pins = "gpa-0", "gpa-1";
190 samsung,pin-function = <2>;
191 samsung,pin-pud = <0>;
197 - |
198 #include <dt-bindings/interrupt-controller/arm-gic.h>
201 compatible = "samsung,exynos4210-pinctrl";
205 pinctrl-names = "default";
206 pinctrl-0 = <&sleep0>;
208 /* Pin bank with external GPIO or muxed external wake-up interrupts */
209 gpa0-gpio-bank {
210 gpio-controller;
211 #gpio-cells = <2>;
212 interrupt-controller;
213 #interrupt-cells = <2>;
218 uart0-data-pins {
219 samsung,pins = "gpa0-0", "gpa0-1";
220 samsung,pin-function = <2>;
221 samsung,pin-pud = <0>;
222 samsung,pin-drv = <0>;
227 sleep0: sleep-state {
228 gpa0-0-pin {
229 samsung,pins = "gpa0-0";
230 samsung,pin-con-pdn = <2>;
231 samsung,pin-pud-pdn = <0>;
234 gpa0-1-pin {
235 samsung,pins = "gpa0-1";
236 samsung,pin-con-pdn = <0>;
237 samsung,pin-pud-pdn = <0>;
244 - |
245 #include <dt-bindings/interrupt-controller/arm-gic.h>
248 compatible = "samsung,exynos4210-pinctrl";
252 wakeup-interrupt-controller {
253 compatible = "samsung,exynos4210-wakeup-eint";
254 interrupt-parent = <&gic>;
258 /* Pin bank with external GPIO or muxed external wake-up interrupts */
259 gpj0-gpio-bank {
260 gpio-controller;
261 #gpio-cells = <2>;
262 interrupt-controller;
263 #interrupt-cells = <2>;
266 /* Pin bank without external interrupts */
267 gpy0-gpio-bank {
268 gpio-controller;
269 #gpio-cells = <2>;
272 /* Pin bank with external direct wake-up interrupts */
273 gpx0-gpio-bank {
274 gpio-controller;
275 #gpio-cells = <2>;
277 interrupt-controller;
278 interrupt-parent = <&gic>;
287 #interrupt-cells = <2>;
292 sd0-clk-pins {
293 samsung,pins = "gpk0-0";
294 samsung,pin-function = <2>;
295 samsung,pin-pud = <0>;
296 samsung,pin-drv = <3>;
299 sd4-bus-width8-pins {
300 part-1-pins {
301 samsung,pins = "gpk0-3", "gpk0-4",
302 "gpk0-5", "gpk0-6";
303 samsung,pin-function = <3>;
304 samsung,pin-pud = <3>;
305 samsung,pin-drv = <3>;
308 part-2-pins {
309 samsung,pins = "gpk1-3", "gpk1-4",
310 "gpk1-5", "gpk1-6";
311 samsung,pin-function = <4>;
312 samsung,pin-pud = <3>;
313 samsung,pin-drv = <3>;
319 otg-gp-pins {
320 samsung,pins = "gpx3-3";
321 samsung,pin-function = <1>;
322 samsung,pin-pud = <0>;
323 samsung,pin-drv = <0>;
324 samsung,pin-val = <0>;
328 - |
329 #include <dt-bindings/interrupt-controller/arm-gic.h>
332 compatible = "samsung,exynos5433-pinctrl";
335 pinctrl-names = "default";
336 pinctrl-0 = <&initial_alive>;
338 wakeup-interrupt-controller {
339 compatible = "samsung,exynos5433-wakeup-eint",
340 "samsung,exynos7-wakeup-eint";
344 /* Pin bank with external direct wake-up interrupts */
345 gpa0-gpio-bank {
346 gpio-controller;
347 #gpio-cells = <2>;
349 interrupt-controller;
350 interrupt-parent = <&gic>;
359 #interrupt-cells = <2>;
364 te-irq-pins {
365 samsung,pins = "gpf1-3";
366 samsung,pin-function = <0xf>;
371 initial_alive: initial-state {
372 gpa0-0-pin {
373 samsung,pins = "gpa0-0";
374 samsung,pin-function = <0>;
375 samsung,pin-pud = <1>;
376 samsung,pin-drv = <0>;
383 - |
384 #include <dt-bindings/interrupt-controller/arm-gic.h>
387 compatible = "samsung,exynos5433-pinctrl";
390 power-domains = <&pd_aud>;
392 /* Pin bank with external GPIO or muxed external wake-up interrupts */
393 gpz0-gpio-bank {
394 gpio-controller;
395 #gpio-cells = <2>;
396 interrupt-controller;
397 #interrupt-cells = <2>;
402 i2s0-bus-pins {
403 samsung,pins = "gpz0-0", "gpz0-1", "gpz0-2", "gpz0-3",
404 "gpz0-4", "gpz0-5", "gpz0-6";
405 samsung,pin-function = <2>;
406 samsung,pin-pud = <0>;
407 samsung,pin-drv = <0>;