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Searched +full:pic32mzda +full:- +full:clk (Results 1 – 12 of 12) sorted by relevance

/linux/drivers/clk/microchip/
H A Dclk-pic32mzda.c1 // SPDX-License-Identifier: GPL-2.0-only
6 #include <dt-bindings/clock/microchip,pic32-clock.h>
7 #include <linux/clk.h>
8 #include <linux/clk-provider.h>
17 #include "clk-core.h"
81 .slew_div = 2, /* step of div_4 -> div_2 -> no_div */
126 /* PIC32MZDA clock data */
128 struct clk *clks[MAXCLKS];
142 if (readl(cd->core.iobase) & BIT(2)) in pic32_fscm_nmi()
143 pr_alert("pic32-clk: FSCM detected clk failure.\n"); in pic32_fscm_nmi()
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H A DMakefile1 # SPDX-License-Identifier: GPL-2.0-only
2 obj-$(CONFIG_COMMON_CLK_PIC32) += clk-core.o
3 obj-$(CONFIG_PIC32MZDA) += clk-pic32mzda.o
4 obj-$(CONFIG_MCHP_CLK_MPFS) += clk-mpfs.o
5 obj-$(CONFIG_MCHP_CLK_MPFS) += clk-mpfs-ccc.o
/linux/arch/mips/boot/dts/pic32/
H A Dpic32mzda.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
5 #include <dt-bindings/clock/microchip,pic32-clock.h>
6 #include <dt-bindings/interrupt-controller/irq.h>
9 #address-cells = <1>;
10 #size-cells = <1>;
11 interrupt-parent = <&evic>;
33 #address-cells = <1>;
34 #size-cells = <0>;
43 compatible = "microchip,pic32mzda-infra";
49 #clock-cells = <0>;
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/linux/Documentation/devicetree/bindings/watchdog/
H A Dmicrochip,pic32-wdt.txt7 - compatible: must be "microchip,pic32mzda-wdt".
8 - reg: physical base address of the controller and length of memory mapped
10 - clocks: phandle of source clk. Should be <&rootclk LPRCCLK>.
15 compatible = "microchip,pic32mzda-wdt";
H A Dmicrochip,pic32-dmt.txt4 malfunction. It is a free-running instruction fetch timer, which is clocked
8 - compatible: must be "microchip,pic32mzda-dmt".
9 - reg: physical base address of the controller and length of memory mapped
11 - clocks: phandle of source clk. Should be <&rootclk PB7CLK>.
16 compatible = "microchip,pic32mzda-dmt";
/linux/drivers/char/hw_random/
H A Dpic32-rng.c1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <linux/clk.h>
45 writel(TRNGEN | TRNGMOD, priv->base + RNGCON); in pic32_rng_init()
58 t = readl(priv->base + RNGRCNT) & RCNT_MASK; in pic32_rng_read()
61 *data = ((u64)readl(priv->base + RNGSEED2) << 32) + in pic32_rng_read()
62 readl(priv->base + RNGSEED1); in pic32_rng_read()
65 } while (wait && --timeout); in pic32_rng_read()
67 return -EIO; in pic32_rng_read()
74 writel(0, priv->base + RNGCON); in pic32_rng_cleanup()
80 struct clk *clk; in pic32_rng_probe() local
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/linux/drivers/watchdog/
H A Dpic32-dmt.c1 // SPDX-License-Identifier: GPL-2.0-or-later
8 #include <linux/clk.h>
19 #include <asm/mach-pic32/pic32.h>
44 struct clk *clk; member
49 writel(DMT_ON, PIC32_SET(dmt->regs + DMTCON_REG)); in dmt_enable()
54 writel(DMT_ON, PIC32_CLR(dmt->regs + DMTCON_REG)); in dmt_disable()
66 val = readl(dmt->regs + DMTSTAT_REG); in dmt_bad_status()
69 return -EAGAIN; in dmt_bad_status()
79 /* set pre-clear key */ in dmt_keepalive()
80 writel(DMT_STEP1_KEY << 8, dmt->regs + DMTPRECLR_REG); in dmt_keepalive()
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H A Dpic32-wdt.c1 // SPDX-License-Identifier: GPL-2.0-or-later
8 #include <linux/clk.h>
19 #include <asm/mach-pic32/pic32.h>
41 struct clk *clk; member
46 return !!(readl(wdt->regs + WDTCON_REG) & WDTCON_WIN_EN); in pic32_wdt_is_win_enabled()
51 u32 v = readl(wdt->regs + WDTCON_REG); in pic32_wdt_get_post_scaler()
58 u32 v = readl(wdt->regs + WDTCON_REG); in pic32_wdt_get_clk_id()
65 u32 v = readl(wdt->rst_base); in pic32_wdt_bootstatus()
67 writel(RESETCON_WDT_TIMEOUT, PIC32_CLR(wdt->rst_base)); in pic32_wdt_bootstatus()
77 rate = clk_get_rate(wdt->clk); in pic32_wdt_get_timeout_secs()
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/linux/drivers/mmc/host/
H A Dsdhci-pic32.c7 * Inspired by sdhci-pltfm.c
14 #include <linux/clk.h>
27 #include "sdhci-pltfm.h"
28 #include <linux/platform_data/sdhci-pic32.h>
47 struct clk *sys_clk;
48 struct clk *base_clk;
55 return clk_get_rate(sdhci_pdata->base_clk); in pic32_sdhci_get_max_clock()
65 if (host->version >= SDHCI_SPEC_300) in pic32_sdhci_set_bus_width()
68 if (host->version >= SDHCI_SPEC_300) in pic32_sdhci_set_bus_width()
109 u32 bus = readl(host->ioaddr + SDH_SHARED_BUS_CTRL); in pic32_sdhci_shared_bus()
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/linux/drivers/rtc/
H A Drtc-pic32.c1 // SPDX-License-Identifier: GPL-2.0+
15 #include <linux/clk.h>
19 #include <asm/mach-pic32/pic32.h>
59 struct clk *clk; member
70 spin_lock_irqsave(&pdata->alarm_lock, flags); in pic32_rtc_alarm_clk_enable()
72 if (!pdata->alarm_clk_enabled) { in pic32_rtc_alarm_clk_enable()
73 clk_enable(pdata->clk); in pic32_rtc_alarm_clk_enable()
74 pdata->alarm_clk_enabled = true; in pic32_rtc_alarm_clk_enable()
77 if (pdata->alarm_clk_enabled) { in pic32_rtc_alarm_clk_enable()
78 clk_disable(pdata->clk); in pic32_rtc_alarm_clk_enable()
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/linux/drivers/tty/serial/
H A Dpic32_uart.c1 // SPDX-License-Identifier: GPL-2.0+
8 * Sorin-Andrei Pistirica <andrei.pistirica@microchip.com>
20 #include <linux/clk.h>
26 #include <asm/mach-pic32/pic32.h>
29 #define PIC32_DEV_NAME "pic32-uart"
43 /* struct pic32_sport - pic32 serial port descriptor
69 struct clk *clk; member
82 __raw_writel(val, sport->port.membase + reg); in pic32_uart_writel()
87 return __raw_readl(sport->port.membase + reg); in pic32_uart_readl()
166 if (!sport->cts_gpiod) in pic32_uart_get_mctrl()
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/linux/drivers/pinctrl/
H A Dpinctrl-pic32.c1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <linux/clk.h>
15 #include <linux/pinctrl/pinconf-generic.h>
23 #include <asm/mach-pic32/pic32.h>
25 #include "pinctrl-utils.h"
26 #include "pinctrl-pic32.h"
65 struct clk *clk; member
80 struct clk *clk; member
1702 return &pctl->gpio_banks[pin / PINS_PER_BANK]; in pctl_to_bank()
1709 return pctl->ngroups; in pic32_pinctrl_get_groups_count()
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