| /freebsd/sys/contrib/device-tree/Bindings/interrupt-controller/ |
| H A D | open-pic.txt | 1 * Open PIC Binding 4 representation of an Open PIC compliant interrupt controller. This binding is 5 based on the binding defined for Open PIC in [1] and is a superset of that 13 - compatible: Specifies the compatibility list for the PIC. The type 14 shall be <string> and the value shall include "open-pic". 16 - reg: Specifies the base physical address(s) and size(s) of this 17 PIC's addressable register space. The type shall be <prop-encoded-array>. 19 - interrupt-controller: The presence of this property identifies the node 20 as an Open PIC. No property value shall be defined. 22 - #interrupt-cells: Specifies the number of cells needed to encode an [all …]
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| H A D | ti,c64x+megamod-pic.txt | 2 ------------------- 7 C64X+ core. Priority 0 and 1 are used for reset and NMI respectively. 8 Priority 2 and 3 are reserved. Priority 4-15 are used for interrupt 12 -------------------- 13 - compatible: Should be "ti,c64x+core-pic"; 14 - #interrupt-cells: <1> 17 ------------------------------ 18 Single cell specifying the core interrupt priority level (4-15) where 22 ------- 23 core_pic: interrupt-controller@0 { [all …]
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| /freebsd/sys/x86/isa/ |
| H A D | atpic.c | 1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 29 * PIC driver for the 8259A Master and Slave PICs in PC/AT machines. 69 #define IMEN_MASK(ai) (IRQ_MASK((ai)->at_irq)) 93 #define IRQ(ap, ai) ((ap)->at_irqbase + (ai)->at_irq) 124 struct pic at_pic; 134 int at_irq; /* Relative to PIC base. */ 140 static void atpic_register_sources(struct pic *pic); 148 static void atpic_resume(struct pic *pic, bool suspend_cancelled); [all …]
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| /freebsd/sys/powerpc/powerpc/ |
| H A D | openpic.c | 1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 19 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 63 return (bus_space_read_4(sc->sc_bt, sc->sc_bh, reg)); in openpic_read() 69 bus_space_write_4(sc->sc_bt, sc->sc_bh, reg, val); in openpic_write() 80 sc->sc_dev = dev; in openpic_common_attach() 82 sc->sc_rid = 0; in openpic_common_attach() 83 sc->sc_memr = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->sc_rid, in openpic_common_attach() 86 if (sc->sc_memr == NULL) { in openpic_common_attach() 91 sc->sc_bt = rman_get_bustag(sc->sc_memr); in openpic_common_attach() [all …]
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| /freebsd/sys/contrib/device-tree/src/powerpc/fsl/ |
| H A D | p1020rdb-pc_camp_core0.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * P1020 RDB-PC Core0 Device Tree Source in CAMP mode. 8 * eth1, eth2, sdhc, crypto, global-util, message, pci0, pci1, msi. 10 * Please note to add "-b 0" for core0's dts compiling. 15 /include/ "p1020rdb-pc_32b.dts" 18 model = "fsl,P1020RDB-PC"; 19 compatible = "fsl,P1020RDB-PC"; 52 mpic: pic@40000 { 53 protected-sources = < 54 42 29 30 34 /* serial1, enet0-queue-group0 */ [all …]
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| H A D | p1020rdb-pc_camp_core1.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * P1020 RDB-PC Core1 Device Tree Source in CAMP mode. 9 * Please note to add "-b 1" for core1's dts compiling. 14 /include/ "p1020rdb-pc_32b.dts" 17 model = "fsl,P1020RDB-PC"; 18 compatible = "fsl,P1020RDB-PC"; 40 ecm-law@0 { 48 memory-controller@2000 { 68 gpio: gpio-controller@f000 { 100 mpic: pic@40000 { [all …]
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| /freebsd/sys/contrib/device-tree/Bindings/powerpc/fsl/ |
| H A D | mpic.txt | 7 and QorIQ processors and is compatible with the Open PIC. The 8 notable difference from Open PIC binding is the addition of 2 14 - compatible 22 - reg 24 Value type: <prop-encoded-array> 29 - interrupt-controller 35 - #interrupt-cells 39 specifiers do not contain the interrupt-type or type-specific 42 - #address-cells 47 - pic-no-reset [all …]
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| /freebsd/contrib/llvm-project/clang/tools/driver/ |
| H A D | cc1as_main.cpp | 1 //===-- cc1as_main.cpp - Clang Assembler ---------------------------------===// 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 //===----------------------------------------------------------------------===// 9 // This is the entry point to the clang -cc1as functionality, which implements 12 //===----------------------------------------------------------------------===// 80 /// The list of target specific features to enable or disable -- this should 81 /// be a list of strings starting with '+' or '-'. 123 FT_Null, ///< No output, for timing purposes. 164 // Whether to emit compact-unwind for non-canonical entries. 175 /// The ABI targeted by the backend. Specified using -target-abi. Empty [all …]
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| /freebsd/contrib/llvm-project/llvm/lib/DWARFLinkerParallel/ |
| H A D | DWARFEmitterImpl.cpp | |
| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86Subtarget.cpp | 1 //===-- X86Subtarget.cpp - X86 Subtarget Information ----------------------===// 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 //===----------------------------------------------------------------------===// 11 //===----------------------------------------------------------------------===// 51 // Temporary option to control early if-conversion for x86 while adding machine 54 X86EarlyIfConv("x86-early-ifcvt", cl::Hidden, 55 cl::desc("Enable early if-conversion on X86")); 59 /// we should reference it in a non-pcrel context. 65 /// how we should reference it in a non-pcrel context. 68 return classifyGlobalReference(GV, *GV->getParent()); in classifyGlobalReference() [all …]
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| H A D | X86TargetMachine.cpp | 1 //===-- X86TargetMachine.cpp - Define TargetMachine for the X86 -----------===// 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 //===----------------------------------------------------------------------===// 11 //===----------------------------------------------------------------------===// 59 static cl::opt<bool> EnableMachineCombinerPass("x86-machine-combiner", 64 EnableTileRAPass("x86-tile-ra", 133 Ret += "-p:32:32"; in computeDataLayout() 136 Ret += "-p270:32:32-p271:32:32-p272:64:64"; in computeDataLayout() 139 // 128 bit integers are not specified in the 32-bit ABIs but are used in computeDataLayout() 142 Ret += "-i64:64-i128:128"; in computeDataLayout() [all …]
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| /freebsd/sys/arm/ti/ |
| H A D | aintc.c | 1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 83 { -1, 0 } 87 bus_space_read_4((_sc)->aintc_bst, (_sc)->aintc_bsh, (reg)) 89 bus_space_write_4((_sc)->aintc_bst, (_sc)->aintc_bsh, (reg), (val)) 93 {"ti,am33xx-intc", 1}, 94 {"ti,omap2-intc", 1}, 128 device_printf(sc->sc_dev, in ti_aintc_intr() 134 /* Only level-sensitive interrupts detection is supported. */ in ti_aintc_intr() [all …]
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| /freebsd/contrib/llvm-project/llvm/include/llvm/Passes/ |
| H A D | MachinePassRegistry.def | 1 //===- MachinePassRegistry.def - Registry of passes -------------*- C++ -*-===// 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 //===----------------------------------------------------------------------===// 9 // This file is used as the registry of passes that are for target-independent 12 //===----------------------------------------------------------------------===// 14 // NOTE: NO INCLUDE GUARD DESIRED! 19 MODULE_ANALYSIS("collector-metadata", CollectorMetadataAnalysis()) 20 MODULE_ANALYSIS("pass-instrumentation", PassInstrumentationAnalysis(PIC)) 26 MODULE_PASS("global-merge", GlobalMergePass(TM, GlobalMergeOptions())) 27 MODULE_PASS("jmc-instrumenter", JMCInstrumenterPass()) [all …]
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| H A D | CodeGenPassBuilder.h | 1 //===- Construction of codegen pass pipelines ------------------*- C++ -*--===// 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 //===----------------------------------------------------------------------===// 12 //===----------------------------------------------------------------------===// 117 /// all of the built-in passes, and those may reference these members during 123 PassInstrumentationCallbacks *PIC) in CodeGenPassBuilder() argument 124 : TM(TM), Opt(Opts), PIC(PIC) { in CodeGenPassBuilder() 128 // Target should override TM.Options.EnableIPRA in their target-specific in CodeGenPassBuilder() 145 return PIC; in getPassInstrumentationCallbacks() 166 // TODO: add a Function -> MachineFunction adaptor and merge [all …]
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| /freebsd/contrib/llvm-project/llvm/lib/DWARFLinker/Parallel/ |
| H A D | DWARFEmitterImpl.cpp | 1 //===- DWARFEmitterImpl.cpp -----------------------------------------------===// 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 //===----------------------------------------------------------------------===// 37 MRI.reset(TheTarget->createMCRegInfo(TripleName)); in init() 40 "no register info for target %s", in init() 46 MAI.reset(TheTarget->createMCAsmInfo(*MRI, TripleName, MCOptions)); in init() 49 "no asm info for target %s", TripleName.c_str()); in init() 51 MSTI.reset(TheTarget->createMCSubtargetInfo(TripleName, "", "")); in init() 54 "no subtarget info for target %s", in init() 57 MC.reset(new MCContext(TheTriple, MAI.get(), MRI.get(), MSTI.get(), nullptr, in init() [all …]
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| /freebsd/sys/powerpc/powernv/ |
| H A D | opal_pci.c | 1 /*- 2 * Copyright (c) 2015-2016 Nathan Whitehorn 3 * Copyright (c) 2017-2018 Semihalf 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 92 * MSI PIC interface. 146 /* PIC interface for MSIs */ 163 int base_msi_irq; /* Base IRQ assigned by FreeBSD to this PIC */ 186 if (!OF_hasprop(ofw_bus_get_node(dev), "ibm,opal-phbid")) in opalpci_probe() 189 device_set_desc(dev, "OPAL Host-PCI bridge"); in opalpci_probe() 198 bus_write_8(sc->r_reg, 0x210, PHB3_TCE_KILL_INVAL_ALL); in pci_phb3_tce_invalidate_entire() [all …]
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| /freebsd/sys/contrib/device-tree/Bindings/net/ |
| H A D | ethernet-phy.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/net/ethernet-phy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Andrew Lunn <andrew@lunn.ch> 11 - Florian Fainelli <f.fainelli@gmail.com> 12 - Heiner Kallweit <hkallweit1@gmail.com> 14 # The dt-schema tools will generate a select statement first by using 21 pattern: "^ethernet-phy(@[a-f0-9]+)?$" 24 - $nodename [all …]
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| /freebsd/contrib/llvm-project/llvm/include/llvm/IR/ |
| H A D | PassTimingInfo.h | 1 //===- PassTimingInfo.h - pass execution timing -------- [all...] |
| /freebsd/lib/libc/gen/ |
| H A D | errlst.c | 1 /*- 2 * SPDX-License-Identifier: BSD-3-Clause 22 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 39 "No error: 0", /* 0 - ENOERROR */ 40 "Operation not permitted", /* 1 - EPERM */ 41 "No such file or directory", /* 2 - ENOENT */ 42 "No such process", /* 3 - ESRCH */ 43 "Interrupted system call", /* 4 - EINTR */ 44 "Input/output error", /* 5 - EIO */ 45 "Device not configured", /* 6 - ENXIO */ [all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ |
| H A D | TargetMachine.cpp | 1 //===-- TargetMachine.cpp - General Target Information ---------------------==// 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 //===----------------------------------------------------------------------===// 11 //===----------------------------------------------------------------------===// 29 //--------------------------------------------------------------------------- 47 // Remaining logic below is ELF-specific. For other object file formats where in isLargeGlobalValue() 53 auto *GO = GVal->getAliaseeObject(); in isLargeGlobalValue() 69 if (GO->hasSection()) { in isLargeGlobalValue() 70 StringRef Name = GO->getSection(); in isLargeGlobalValue() 76 if (GV->isThreadLocal()) in isLargeGlobalValue() [all …]
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| /freebsd/contrib/llvm-project/llvm/tools/llvm-mc/ |
| H A D | llvm-mc.cpp | 1 //===-- llvm-mc.cpp - Machine Code Hacking Driver ---------------*- C++ -*-===// 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 //===----------------------------------------------------------------------===// 12 //===----------------------------------------------------------------------===// 50 cl::init("-"), cl::cat(MCCategory)); 58 cl::init("-"), cl::cat(MCCategory)); 60 static cl::opt<std::string> SplitDwarfFile("split-dwarf-file", 65 static cl::opt<bool> ShowEncoding("show-encoding", 70 "compress-debug-sections", cl::ValueOptional, 73 cl::values(clEnumValN(DebugCompressionType::None, "none", "No compression"), [all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZTargetMachine.cpp | 1 //===-- SystemZTargetMachine.cpp - Define TargetMachine for SystemZ -------===// 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 //===----------------------------------------------------------------------===// 34 "systemz-machine-combiner", 38 // NOLINTNEXTLINE(readability-identifier-naming) 65 Ret += "-i1:8:16-i8:8:16"; in computeDataLayout() 67 // 64-bit integers are naturally aligned. in computeDataLayout() 68 Ret += "-i64:64"; in computeDataLayout() 70 // 128-bit floats are aligned only to 64 bits. in computeDataLayout() 71 Ret += "-f128:64"; in computeDataLayout() [all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/ |
| H A D | MipsTargetStreamer.cpp | 1 //===-- MipsTargetStreamer.cpp - Mips Target Streamer Methods -------------===// 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 //===----------------------------------------------------------------------===// 11 //===----------------------------------------------------------------------===// 35 "mips-round-section-sizes", cl::init(false), 40 return STI->hasFeature(Mips::FeatureMicroMips); in isMicroMips() 44 return STI->hasFeature(Mips::FeatureMips32r6); in isMips32r6() 277 emitRRI(Mips::DSLL32, DstReg, SrcReg, ShiftAmount - 32, IDLoc, STI); in emitDSLL() 335 // to account for the sign-extension of the low part. in emitStoreWithImmOffset() 371 // to account for the sign-extension of the low part. in emitLoadWithImmOffset() [all …]
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| /freebsd/sys/dev/sound/pci/ |
| H A D | envy24.h | 1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 29 /* -------------------------------------------------------------------- */ 40 #define PCIR_MT 0x1c /* Professional Multi-Track I/O Base Address */ 48 #define PCIM_LAC_MPU401 0x0008 /* MPU-401 I/O enable */ 57 #define PCIM_LCC_SNPPIC 0x0020 /* snoop PIC I/O R/W cycle */ 60 #define PCIM_LCC_MPUBASE 0x0006 /* MPU-401 base 300h-330h */ 68 #define PCIM_SCFG_MPU 0x20 /* 1(0)/2(1) MPU-401 UART(s) */ 71 #define PCIM_SCFG_ADC 0x0c /* 1-4 stereo ADC connected */ [all …]
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| /freebsd/sys/contrib/device-tree/src/arm/marvell/ |
| H A D | armada-388-clearfog.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 8 #include "armada-388.dtsi" 9 #include "armada-38x-solidrun-microsom.dtsi" 13 /* So that mvebu u-boot can update the MAC addresses */ 20 stdout-path = "serial0:115200n8"; 23 reg_3p3v: regulator-3p3v { 24 compatible = "regulator-fixed"; 25 regulator-name = "3P3V"; 26 regulator-min-microvolt = <3300000>; 27 regulator-max-microvolt = <3300000>; [all …]
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