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/linux/Documentation/devicetree/bindings/net/
H A Dintel,ixp4xx-hss.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/net/intel,ixp4xx-hss.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Linus Walleij <linus.walleij@linaro.org>
20 const: intel,ixp4xx-hss
26 intel,npe-handle:
27 $ref: /schemas/types.yaml#/definitions/phandle-array
30 - description: phandle to the NPE this HSS instance is using
31 - description: the NPE instance number
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/linux/Documentation/devicetree/bindings/sound/
H A Dnvidia,tegra-audio-common.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/nvidia,tegra-audio-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jon Hunter <jonathanh@nvidia.com>
11 - Thierry Reding <thierry.reding@gmail.com>
16 - description: PLL A clock
17 - description: PLL A OUT0 clock
18 - description: The Tegra cdev1/extern1 clock, which feeds the card's mclk
20 clock-names:
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H A Dsamsung,tm2.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
11 - Sylwester Nawrocki <s.nawrocki@samsung.com>
14 - $ref: sound-card-common.yaml#
18 const: samsung,tm2-audio
20 audio-amplifier:
21 description: Phandle to the MAX98504 amplifier.
22 $ref: /schemas/types.yaml#/definitions/phandle
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H A Dfsl-asoc-card.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/fsl-asoc-card.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
28 - Shengjiu Wang <shengjiu.wang@nxp.com>
33 - items:
34 - enum:
35 - fsl,imx-sgtl5000
36 - fsl,imx25-pdk-sgtl5000
37 - fsl,imx53-cpuvo-sgtl5000
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H A Drohm,bd28623.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
15 - Katsuhiro Suzuki <katsuhiro@katsuster.net>
18 - $ref: dai-common.yaml#
24 "#sound-dai-cells":
27 VCCA-supply:
29 regulator phandle for the VCCA (for analog) power supply
31 VCCP1-supply:
33 regulator phandle for the VCCP1 (for ch1) power supply
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H A Dfsl,imx-audio-es8328.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/fsl,imx-audio-es8328.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shawn Guo <shawnguo@kernel.org>
11 - Sascha Hauer <s.hauer@pengutronix.de>
14 - $ref: sound-card-common.yaml#
18 const: fsl,imx-audio-es8328
22 description: The user-visible name of this sound complex
24 ssi-controller:
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H A Dmt8186-mt6366-rt1019-rt5682s.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/mt8186-mt6366-rt1019-rt5682s.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jiaxin Yu <jiaxin.yu@mediatek.com>
16 - $ref: sound-card-common.yaml#
21 - mediatek,mt8186-mt6366-rt1019-rt5682s-sound
22 - mediatek,mt8186-mt6366-rt5682s-max98360-sound
23 - mediatek,mt8186-mt6366-rt5650-sound
25 audio-routing:
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H A Drockchip,rk3288-hdmi-analog.txt4 - compatible: "rockchip,rk3288-hdmi-analog"
5 - rockchip,model: The user-visible name of this sound complex
6 - rockchip,i2s-controller: The phandle of the Rockchip I2S controller that's
8 - rockchip,audio-codec: The phandle of the analog audio codec.
9 - rockchip,routing: A list of the connections between audio components.
16 - rockchip,hp-en-gpios = The phandle of the GPIO that power up/down the
18 - rockchip,hp-det-gpios = The phandle of the GPIO that detects the headphone
20 - pinctrl-names, pinctrl-0: Please refer to pinctrl-bindings.txt
25 compatible = "rockchip,rk3288-hdmi-analog";
27 rockchip,i2s-controller = <&i2s>;
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H A Dcirrus,cs42l51.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Olivier Moysan <olivier.moysan@foss.st.com>
13 - $ref: dai-common.yaml#
22 "#sound-dai-cells":
28 clock-names:
30 - const: MCLK
32 reset-gpios:
35 VL-supply:
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/linux/Documentation/devicetree/bindings/display/tegra/
H A Dnvidia,tegra20-hdmi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-hdmi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
15 pattern: "^hdmi@[0-9a-f]+$"
19 - enum:
20 - nvidia,tegra20-hdmi
21 - nvidia,tegra30-hdmi
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H A Dnvidia,tegra124-sor.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra124-sor.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
19 pattern: "^sor@[0-9a-f]+$"
23 - enum:
24 - nvidia,tegra124-sor
25 - nvidia,tegra210-sor
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H A Dnvidia,tegra20-dsi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-dsi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
16 - enum:
17 - nvidia,tegra20-dsi
18 - nvidia,tegra30-dsi
19 - nvidia,tegra114-dsi
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/linux/Documentation/devicetree/bindings/fsi/
H A Dfsi-master-ast-cf.txt1 Device-tree bindings for ColdFire offloaded gpio-based FSI master driver
2 ------------------------------------------------------------------------
5 - compatible =
6 "aspeed,ast2400-cf-fsi-master" for an AST2400 based system
8 "aspeed,ast2500-cf-fsi-master" for an AST2500 based system
10 - clock-gpios = <gpio-descriptor>; : GPIO for FSI clock
11 - data-gpios = <gpio-descriptor>; : GPIO for FSI data signal
12 - enable-gpios = <gpio-descriptor>; : GPIO for enable signal
13 - trans-gpios = <gpio-descriptor>; : GPIO for voltage translator enable
14 - mux-gpios = <gpio-descriptor>; : GPIO for pin multiplexing with other
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/linux/Documentation/devicetree/bindings/display/samsung/
H A Dsamsung,exynos-hdmi.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/display/samsung/samsung,exynos-hdmi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Inki Dae <inki.dae@samsung.com>
11 - Seung-Woo Kim <sw0312.kim@samsung.com>
12 - Kyungmin Park <kyungmin.park@samsung.com>
13 - Krzysztof Kozlowski <krzk@kernel.org>
18 - samsung,exynos4210-hdmi
19 - samsung,exynos4212-hdmi
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/linux/Documentation/devicetree/bindings/power/reset/
H A Dltc2952-poweroff.txt9 - compatible: Must contain: "lltc,ltc2952"
10 - watchdog-gpios: phandle + gpio-specifier for the GPIO connected to the
12 - kill-gpios: phandle + gpio-specifier for the GPIO connected to the
16 - trigger-gpios: phandle + gpio-specifier for the GPIO connected to the
20 - trigger-delay-ms The number of milliseconds to wait after trigger line
29 trigger-gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
30 trigger-delay-ms = <2000>;
31 watchdog-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
32 kill-gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
/linux/Documentation/devicetree/bindings/display/
H A Dtruly,nt35597.txt7 - compatible: should be "truly,nt35597-2K-display"
8 - vdda-supply: phandle of the regulator that provides the supply voltage
10 - vdispp-supply: phandle of the regulator that provides the supply voltage
12 - vdispn-supply: phandle of the regulator that provides the supply voltage
14 - reset-gpios: phandle of gpio for reset line
15 This should be 8mA, gpio can be configured using mux, pinctrl, pinctrl-names
17 - mode-gpios: phandle of the gpio for choosing the mode of the display
20 - ports: This device has two video ports driven by two DSIs. Their connections
23 - port@0: DSI input port driven by master DSI
24 - port@1: DSI input port driven by secondary DSI
[all …]
/linux/Documentation/devicetree/bindings/display/panel/
H A Dnovatek,nt36672a.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sumit Semwal <sumit.semwal@linaro.org>
19 - $ref: panel-common.yaml#
24 - enum:
25 - tianma,fhd-video
26 - const: novatek,nt36672a
35 reset-gpios:
37 description: phandle of gpio for reset line - This should be 8mA, gpio
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H A Djdi,lpm102a188a.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Diogo Ivo <diogo.ivo@tecnico.ulisboa.pt>
13 This panel requires a dual-channel DSI host to operate. It supports two modes:
14 - left-right: each channel drives the left or right half of the screen
15 - even-odd: each channel drives the even or odd lines of the screen
18 driven by the first link (DSI-LINK1) is considered the primary peripheral
19 and controls the device. The 'link2' property contains a phandle to the
20 peripheral driven by the second link (DSI-LINK2).
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/linux/Documentation/devicetree/bindings/usb/
H A Dmicrochip,usb5744.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Microchip USB5744 4-port Hub Controller
10 Microchip's USB5744 SmartHubTM IC is a 4 port, SuperSpeed (SS)/Hi-Speed (HS),
19 - Michal Simek <michal.simek@amd.com>
20 - Mubin Sayyed <mubin.sayyed@amd.com>
21 - Radhey Shyam Pandey <radhey.shyam.pandey@amd.com>
26 - usb424,2744
27 - usb424,5744
[all …]
H A Dvialab,vl817.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Anand Moon <linux.amoon@gmail.com>
13 - $ref: usb-device.yaml#
18 - usb2109,2817
19 - usb2109,817
23 reset-gpios:
26 GPIO controlling the RESET# pin.
28 vdd-supply:
[all …]
/linux/Documentation/devicetree/bindings/gpio/
H A Dgpio-dsp-keystone.txt1 Keystone 2 DSP GPIO controller bindings
4 the DSP GPIO controller IP. It provides 28 IRQ signals per each DSP core.
7 For example TCI6638K2K SoC has 8 DSP GPIO controllers:
8 - 8 for C66x CorePacx CPUs 0-7
10 Keystone 2 DSP GPIO controller has specific features:
11 - each GPIO can be configured only as output pin;
12 - setting GPIO value to 1 causes IRQ generation on target DSP core;
13 - reading pin value returns 0 - if IRQ was handled or 1 - IRQ is still
17 - compatible: should be "ti,keystone-dsp-gpio"
18 - ti,syscon-dev: phandle/offset pair. The phandle to syscon used to
[all …]
H A Dnxp,lpc1850-gpio.txt1 NXP LPC18xx/43xx GPIO controller Device Tree Bindings
2 -----------------------------------------------------
5 - compatible : Should be "nxp,lpc1850-gpio"
6 - reg : List of addresses and lengths of the GPIO controller
8 - reg-names : Should be "gpio", "gpio-pin-ic", "gpio-group0-ic" and
9 "gpio-gpoup1-ic"
10 - clocks : Phandle and clock specifier pair for GPIO controller
11 - resets : Phandle and reset specifier pair for GPIO controller
12 - gpio-controller : Marks the device node as a GPIO controller
13 - #gpio-cells : Should be two:
[all …]
/linux/Documentation/devicetree/bindings/media/cec/
H A Dcec-gpio.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/media/cec/cec-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: HDMI CEC GPIO
10 - Hans Verkuil <hverkuil-cisco@xs4all.nl>
13 The HDMI CEC GPIO module supports CEC implementations where the CEC line is
14 hooked up to a pull-up GPIO line and - optionally - the HPD line is hooked up
15 to another GPIO line.
19 circuitry when connecting them to a GPIO line.
[all …]
/linux/Documentation/devicetree/bindings/extcon/
H A Dextcon-max3355.txt2 -------------------------------------
5 integrated USB OTG dual-role transceiver to function as a USB OTG dual-role
9 - compatible: should be "maxim,max3355";
10 - maxim,shdn-gpios: should contain a phandle and GPIO specifier for the GPIO pin
12 - id-gpios: should contain a phandle and GPIO specifier for the GPIO pin
17 usb-otg {
19 maxim,shdn-gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;
20 id-gpios = <&gpio5 31 GPIO_ACTIVE_HIGH>;
/linux/Documentation/devicetree/bindings/pci/
H A Dnvidia,tegra194-pcie-ep.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/nvidia,tegra194-pcie-ep.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
12 - Vidya Sagar <vidyas@nvidia.com>
16 inherits all the common properties defined in snps,dw-pcie-ep.yaml. Some
23 Note: On Tegra194's P2972-0000 platform, only C5 controller can be enabled to
29 - nvidia,tegra194-pcie-ep
[all …]

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