1c61f819aSJoachim EastwoodNXP LPC18xx/43xx GPIO controller Device Tree Bindings 2c61f819aSJoachim Eastwood----------------------------------------------------- 3c61f819aSJoachim Eastwood 4c61f819aSJoachim EastwoodRequired properties: 5c61f819aSJoachim Eastwood- compatible : Should be "nxp,lpc1850-gpio" 6*e96fd5ceSVladimir Zapolskiy- reg : List of addresses and lengths of the GPIO controller 7*e96fd5ceSVladimir Zapolskiy register sets 8*e96fd5ceSVladimir Zapolskiy- reg-names : Should be "gpio", "gpio-pin-ic", "gpio-group0-ic" and 9*e96fd5ceSVladimir Zapolskiy "gpio-gpoup1-ic" 10*e96fd5ceSVladimir Zapolskiy- clocks : Phandle and clock specifier pair for GPIO controller 11*e96fd5ceSVladimir Zapolskiy- resets : Phandle and reset specifier pair for GPIO controller 12*e96fd5ceSVladimir Zapolskiy- gpio-controller : Marks the device node as a GPIO controller 13*e96fd5ceSVladimir Zapolskiy- #gpio-cells : Should be two: 14*e96fd5ceSVladimir Zapolskiy - The first cell is the GPIO line number 15*e96fd5ceSVladimir Zapolskiy - The second cell is used to specify polarity 16*e96fd5ceSVladimir Zapolskiy- interrupt-controller : Marks the device node as an interrupt controller 17*e96fd5ceSVladimir Zapolskiy- #interrupt-cells : Should be two: 18*e96fd5ceSVladimir Zapolskiy - The first cell is an interrupt number within 19*e96fd5ceSVladimir Zapolskiy 0..9 range, for GPIO pin interrupts it is equal 20*e96fd5ceSVladimir Zapolskiy to 'nxp,gpio-pin-interrupt' property value of 21*e96fd5ceSVladimir Zapolskiy GPIO pin configuration, 8 is for GPIO GROUP0 22*e96fd5ceSVladimir Zapolskiy interrupt, 9 is for GPIO GROUP1 interrupt 23*e96fd5ceSVladimir Zapolskiy - The second cell is used to specify interrupt type 24c61f819aSJoachim Eastwood 25c61f819aSJoachim EastwoodOptional properties: 26c61f819aSJoachim Eastwood- gpio-ranges : Mapping between GPIO and pinctrl 27c61f819aSJoachim Eastwood 28c61f819aSJoachim EastwoodExample: 29c61f819aSJoachim Eastwood#define LPC_GPIO(port, pin) (port * 32 + pin) 30c61f819aSJoachim Eastwood#define LPC_PIN(port, pin) (0x##port * 32 + pin) 31c61f819aSJoachim Eastwood 32c61f819aSJoachim Eastwoodgpio: gpio@400f4000 { 33c61f819aSJoachim Eastwood compatible = "nxp,lpc1850-gpio"; 34*e96fd5ceSVladimir Zapolskiy reg = <0x400f4000 0x4000>, <0x40087000 0x1000>, 35*e96fd5ceSVladimir Zapolskiy <0x40088000 0x1000>, <0x40089000 0x1000>; 36*e96fd5ceSVladimir Zapolskiy reg-names = "gpio", "gpio-pin-ic", 37*e96fd5ceSVladimir Zapolskiy "gpio-group0-ic", "gpio-gpoup1-ic"; 38c61f819aSJoachim Eastwood clocks = <&ccu1 CLK_CPU_GPIO>; 39*e96fd5ceSVladimir Zapolskiy resets = <&rgu 28>; 40c61f819aSJoachim Eastwood gpio-controller; 41c61f819aSJoachim Eastwood #gpio-cells = <2>; 42*e96fd5ceSVladimir Zapolskiy interrupt-controller; 43*e96fd5ceSVladimir Zapolskiy #interrupt-cells = <2>; 44c61f819aSJoachim Eastwood gpio-ranges = <&pinctrl LPC_GPIO(0,0) LPC_PIN(0,0) 2>, 45c61f819aSJoachim Eastwood ... 46c61f819aSJoachim Eastwood <&pinctrl LPC_GPIO(7,19) LPC_PIN(f,5) 7>; 47c61f819aSJoachim Eastwood}; 48c61f819aSJoachim Eastwood 49c61f819aSJoachim Eastwoodgpio_joystick { 50*e96fd5ceSVladimir Zapolskiy compatible = "gpio-keys"; 51c61f819aSJoachim Eastwood ... 52c61f819aSJoachim Eastwood 53*e96fd5ceSVladimir Zapolskiy button0 { 54c61f819aSJoachim Eastwood ... 55*e96fd5ceSVladimir Zapolskiy interrupt-parent = <&gpio>; 56*e96fd5ceSVladimir Zapolskiy interrupts = <1 IRQ_TYPE_EDGE_BOTH>; 57c61f819aSJoachim Eastwood gpios = <&gpio LPC_GPIO(4,8) GPIO_ACTIVE_LOW>; 58c61f819aSJoachim Eastwood }; 59c61f819aSJoachim Eastwood}; 60