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/linux/Documentation/devicetree/bindings/hwmon/
H A Dti,tmp513.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Eric Tremblay <etremblay@distech-controls.com>
14 The TMP512 (dual-channel) and TMP513 (triple-channel) are system monitors
15 that include remote sensors, a local temperature sensor, and a high-side
17 remote temperatures, on-chip temperatures, and system voltage/power/current
28 - ti,tmp512
29 - ti,tmp513
34 shunt-resistor-micro-ohms:
[all …]
/linux/sound/soc/codecs/
H A Dmax9759.c1 // SPDX-License-Identifier: GPL-2.0
12 #include <sound/soc-dapm.h>
22 unsigned int gain; member
28 struct snd_soc_component *c = snd_soc_dapm_to_component(w->dapm); in pga_event()
32 gpiod_set_value_cansleep(priv->gpiod_shutdown, 0); in pga_event()
34 gpiod_set_value_cansleep(priv->gpiod_shutdown, 1); in pga_event()
48 ucontrol->value.integer.value[0] = priv->gain; in speaker_gain_control_get()
67 if (ucontrol->value.integer.value[0] < 0 || in speaker_gain_control_put()
68 ucontrol->value.integer.value[0] > 3) in speaker_gain_control_put()
69 return -EINVAL; in speaker_gain_control_put()
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H A Dmt6357.c1 // SPDX-License-Identifier: GPL-2.0
9 #include <linux/dma-mapping.h>
19 regmap_write(priv->regmap, MT6357_GPIO_MODE2_CLR, MT6357_GPIO_MODE2_CLEAR_ALL); in set_playback_gpio()
22 regmap_write(priv->regmap, MT6357_GPIO_MODE2_SET, in set_playback_gpio()
32 regmap_update_bits(priv->regmap, MT6357_GPIO_DIR0, in set_playback_gpio()
46 regmap_write(priv->regmap, MT6357_GPIO_MODE3_CLR, MT6357_GPIO_MODE3_CLEAR_ALL); in set_capture_gpio()
49 regmap_write(priv->regmap, MT6357_GPIO_MODE3_SET, in set_capture_gpio()
61 regmap_update_bits(priv->regmap, MT6357_GPIO_DIR0, in set_capture_gpio()
79 stage = up ? i : MT6357_HPLOUT_STG_CTRL_VAUDP15_MAX - i; in hp_main_output_ramp()
80 regmap_update_bits(priv->regmap, MT6357_AUDDEC_ANA_CON1, in hp_main_output_ramp()
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H A Dmt6351.c1 // SPDX-License-Identifier: GPL-2.0
3 // mt6351.c -- mt6351 ALSA SoC audio codec driver
8 #include <linux/dma-mapping.h>
202 regmap_update_bits(cmpnt->regmap, MT6351_ZCD_CON2, in set_hp_gain_zero()
204 regmap_update_bits(cmpnt->regmap, MT6351_ZCD_CON2, in set_hp_gain_zero()
225 dev_warn(cmpnt->dev, "%s(), error rate %d, return 3", in get_cap_reg_val()
256 dev_warn(cmpnt->dev, "%s(), error rate %d, return 8", in get_play_reg_val()
266 struct snd_soc_component *cmpnt = dai->component; in mt6351_codec_dai_hw_params()
270 dev_dbg(priv->dev, "%s(), substream->stream %d, rate %d\n", in mt6351_codec_dai_hw_params()
271 __func__, substream->stream, rate); in mt6351_codec_dai_hw_params()
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H A Dmt6358.c1 // SPDX-License-Identifier: GPL-2.0
3 // mt6358.c -- mt6358 ALSA SoC audio codec driver
107 priv->mtkaif_protocol = mtkaif_protocol; in mt6358_set_mtkaif_protocol()
115 regmap_update_bits(priv->regmap, MT6358_GPIO_MODE2_CLR, in playback_gpio_set()
117 regmap_update_bits(priv->regmap, MT6358_GPIO_MODE2_SET, in playback_gpio_set()
119 regmap_update_bits(priv->regmap, MT6358_GPIO_MODE2, in playback_gpio_set()
130 regmap_update_bits(priv->regmap, MT6358_GPIO_MODE2_CLR, in playback_gpio_reset()
132 regmap_update_bits(priv->regmap, MT6358_GPIO_MODE2, in playback_gpio_reset()
134 regmap_update_bits(priv->regmap, MT6358_GPIO_DIR0, in playback_gpio_reset()
141 regmap_update_bits(priv->regmap, MT6358_GPIO_MODE3_CLR, in capture_gpio_set()
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H A Dda7218.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * da7218.c - DA7218 ALSA SoC Codec Driver
22 #include <sound/soc-dapm.h>
37 static const DECLARE_TLV_DB_SCALE(da7218_mic_gain_tlv, -600, 600, 0);
38 static const DECLARE_TLV_DB_SCALE(da7218_mixin_gain_tlv, -450, 150, 0);
39 static const DECLARE_TLV_DB_SCALE(da7218_in_dig_gain_tlv, -8325, 75, 0);
40 static const DECLARE_TLV_DB_SCALE(da7218_ags_trigger_tlv, -9000, 600, 0);
42 static const DECLARE_TLV_DB_SCALE(da7218_alc_threshold_tlv, -9450, 150, 0);
47 static const DECLARE_TLV_DB_SCALE(da7218_dmix_gain_tlv, -4200, 150, 0);
50 static const DECLARE_TLV_DB_SCALE(da7218_dgs_trigger_tlv, -9450, 150, 0);
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H A Dcs42l52.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * cs42l52.c -- CS42L52 ALSA SoC audio driver
28 #include <sound/soc-dapm.h>
130 static DECLARE_TLV_DB_SCALE(hl_tlv, -10200, 50, 0);
132 static DECLARE_TLV_DB_SCALE(hpd_tlv, -9600, 50, 1);
134 static DECLARE_TLV_DB_SCALE(ipd_tlv, -9600, 100, 0);
138 static DECLARE_TLV_DB_SCALE(pga_tlv, -600, 50, 0);
140 static DECLARE_TLV_DB_SCALE(pass_tlv, -6000, 50, 0);
142 static DECLARE_TLV_DB_SCALE(mix_tlv, -5150, 50, 0);
144 static DECLARE_TLV_DB_SCALE(beep_tlv, -56, 200, 0);
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H A Dml26124.c1 // SPDX-License-Identifier: GPL-2.0-only
53 static const DECLARE_TLV_DB_SCALE(digital_tlv, -7150, 50, 0);
55 static const DECLARE_TLV_DB_SCALE(alclvl, -2250, 150, 0);
56 static const DECLARE_TLV_DB_SCALE(mingain, -1200, 600, 0);
57 static const DECLARE_TLV_DB_SCALE(maxgain, -675, 600, 0);
58 static const DECLARE_TLV_DB_SCALE(boost_vol, -1200, 75, 0);
60 static const char * const ml26124_companding[] = {"16bit PCM", "u-law",
61 "A-law"};
119 SOC_DAPM_SINGLE("PGA Switch", ML26124_SPK_AMP_OUT, 5, 1, 0),
145 SND_SOC_DAPM_PGA("PGA", ML26124_PW_IN_PW_MNG, 3, 0, NULL, 0),
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H A Dwm8940.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * wm8940.c -- WM8940 ALSA Soc Audio driver
14 * No means to obtain current gain if alc enabled.
143 { 0x2d, 0x0050 }, /* PGA Gain */
155 static const char *wm8940_companding[] = { "Off", "NC", "u-law", "A-law" };
173 static DECLARE_TLV_DB_SCALE(wm8940_spk_vol_tlv, -5700, 100, 1);
174 static DECLARE_TLV_DB_SCALE(wm8940_att_tlv, -1000, 1000, 0);
175 static DECLARE_TLV_DB_SCALE(wm8940_pga_vol_tlv, -1200, 75, 0);
176 static DECLARE_TLV_DB_SCALE(wm8940_alc_min_tlv, -1200, 600, 0);
178 static DECLARE_TLV_DB_SCALE(wm8940_alc_tar_tlv, -2250, 50, 0);
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H A Dda9055.c1 // SPDX-License-Identifier: GPL-2.0-or-later
58 /* Input - Gain, Select and Filter Registers */
71 /* Output - Gain, Select and Filter Registers */
285 /* Gain and Volume */
288 0x0, 0x10, TLV_DB_SCALE_ITEM(-5400, 0, 0),
289 /* -54dB to 15dB */
290 0x11, 0x3f, TLV_DB_SCALE_ITEM(-5400, 150, 0)
295 /* -78dB to 12dB */
296 0x08, 0x7f, TLV_DB_SCALE_ITEM(-7800, 75, 0)
305 static const DECLARE_TLV_DB_SCALE(mic_vol_tlv, -600, 600, 0);
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H A Dwm8983.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * wm8983.c -- WM8983 ALSA SoC Audio driver
29 { 0x01, 0x0000 }, /* R1 - Power management 1 */
30 { 0x02, 0x0000 }, /* R2 - Power management 2 */
31 { 0x03, 0x0000 }, /* R3 - Power management 3 */
32 { 0x04, 0x0050 }, /* R4 - Audio Interface */
33 { 0x05, 0x0000 }, /* R5 - Companding control */
34 { 0x06, 0x0140 }, /* R6 - Clock Gen control */
35 { 0x07, 0x0000 }, /* R7 - Additional control */
36 { 0x08, 0x0000 }, /* R8 - GPIO Control */
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H A Dssm2602.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
50 #define LINVOL_LIN_VOL 0x01F /* Left Channel PGA Volume control …
55 #define RINVOL_RIN_VOL 0x01F /* Right Channel PGA Volume control …
70 #define APANA_ENABLE_MIC_BOOST 0x001 /* Primary Microphone Amplifier gain booster contr…
77 #define APANA_ENABLE_MIC_BOOST2 0x100 /* Secondary Microphone Amplifier gain booster con…
81 #define APDIGI_DE_EMPHASIS 0x006 /* De-Emphasis Control …
107 #define SRATE_BOS_RATE 0x002 /* Base Over-Sampling rate …
H A Dtpa6130a2.c1 // SPDX-License-Identifier: GPL-2.0-only
17 #include <sound/tpa6130a2-plat.h>
45 ret = regulator_enable(data->supply); in tpa6130a2_power()
47 dev_err(data->dev, in tpa6130a2_power()
52 if (data->power_gpio >= 0) in tpa6130a2_power()
53 gpio_set_value(data->power_gpio, 1); in tpa6130a2_power()
56 regcache_cache_only(data->regmap, false); in tpa6130a2_power()
57 ret = regcache_sync(data->regmap); in tpa6130a2_power()
59 dev_err(data->dev, in tpa6130a2_power()
61 regcache_cache_only(data->regmap, true); in tpa6130a2_power()
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H A Dwm8510.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * wm8510.c -- WM8510 ALSA Soc Audio driver
113 static const char *wm8510_companding[] = { "Off", "NC", "u-law", "A-law" };
131 SOC_ENUM("Playback De-emphasis", wm8510_enum[2]),
150 SOC_SINGLE("ALC Capture Max Gain", WM8510_ALC1, 3, 7, 0),
151 SOC_SINGLE("ALC Capture Min Gain", WM8510_ALC1, 0, 7, 0),
164 SOC_SINGLE("Capture PGA ZC Switch", WM8510_INPPGA, 7, 1, 0),
165 SOC_SINGLE("Capture PGA Volume", WM8510_INPPGA, 0, 63, 0),
191 SOC_DAPM_SINGLE("Mic PGA Switch", WM8510_INPPGA, 6, 1, 1),
216 SND_SOC_DAPM_MIXER("Mic PGA", WM8510_POWER2, 2, 0,
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H A Dnau8822.c1 // SPDX-License-Identifier: GPL-2.0
3 // nau8822.c -- NAU8822 ALSA Soc Audio driver
8 // Co-author: John Hsu <kchsu0@nuvoton.com>
9 // Co-author: Seven Li <wtli@nuvoton.com>
185 struct soc_bytes_ext *params = (void *)kcontrol->private_value; in nau8822_eq_get()
190 val = (u16 *)ucontrol->value.bytes.data; in nau8822_eq_get()
192 for (i = 0; i < params->max / sizeof(u16); i++) { in nau8822_eq_get()
194 /* conversion of 16-bit integers between native CPU format in nau8822_eq_get()
205 * control. These configuration includes central frequency, equalizer gain,
206 * cut-off frequency, bandwidth control, and equalizer path.
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H A Dwm8974.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * wm8974.c -- WM8974 ALSA Soc Audio driver
5 * Copyright 2006-2009 Wolfson Microelectronics PLC.
55 static const char *wm8974_companding[] = {"Off", "NC", "u-law", "A-law" };
91 static const DECLARE_TLV_DB_SCALE(digital_tlv, -12750, 50, 1);
92 static const DECLARE_TLV_DB_SCALE(eq_tlv, -1200, 100, 0);
93 static const DECLARE_TLV_DB_SCALE(inpga_tlv, -1200, 75, 0);
94 static const DECLARE_TLV_DB_SCALE(spk_tlv, -5700, 100, 0);
103 SOC_ENUM("Playback De-emphasis", wm8974_enum[2]),
142 SOC_SINGLE("ALC Capture Max Gain", WM8974_ALC1, 3, 7, 0),
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/linux/Documentation/sound/soc/
H A Dpops-clicks.rst23 shutdown and follows some basic rules:-
26 Startup Order :- DAC --> Mixers --> Output PGA --> Digital Unmute
28 Shutdown Order :- Digital Mute --> Output PGA --> Mixers --> DAC
31 a PGA (programmable gain amplifier) before being output to the speakers.
43 Startup Order - Input PGA --> Mixers --> ADC
45 Shutdown Order - ADC --> Mixers --> Input PGA
51 when a volume control is changed near its maximum gain value. The zipper noise
52 is heard when the gain increase or decrease changes the mean audio signal
54 for each volume control. The ZC forces the gain change to occur when the signal
/linux/Documentation/devicetree/bindings/iio/adc/
H A Dti,ads131e08.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Texas Instruments ADS131E0x 4-, 6- and 8-Channel ADCs
10 - Jonathan Cameron <jic23@kernel.org>
14 24-bit, delta-sigma, analog-to-digital converters (ADCs) with a
15 built-in programmable gain amplifier (PGA), internal reference
24 - ti,ads131e04
25 - ti,ads131e06
26 - ti,ads131e08
[all …]
H A Dti,ads1015.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Daniel Baluta <daniel.baluta@nxp.com>
19 - ti,ads1015
20 - ti,ads1115
21 - ti,tla2021
22 - ti,tla2024
30 "#address-cells":
33 "#size-cells":
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/linux/drivers/media/usb/gspca/stv06xx/
H A Dstv06xx_hdcs.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Copyright (c) 2001 Jean-Fredric Clere, Nikolas Zimmermann, Georg Acher
4 * Mark Cave-Ayland, Carlo E Prelz, Dick Streefland
7 * Copyright (c) 2008 Chia-I Wu
10 * P/N 861050-0010: Sensor HDCS1000 ASIC STV0600
11 * P/N 861050-0020: Sensor Photobit PB100 ASIC STV0600-1 - QuickCam Express
12 * P/N 861055: Sensor ST VV6410 ASIC STV0610 - LEGO cam
13 * P/N 861075-0040: Sensor HDCS1000 ASIC
14 * P/N 961179-0700: Sensor ST VV6410 ASIC STV0602 - Dexxa WebCam USB
15 * P/N 861040-0000: Sensor ST VV6410 ASIC STV0610 - QuickCam Web
[all …]
/linux/include/media/i2c/
H A Dcs53l32a.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 cs53l32a.h - definition for cs53l32a inputs and outputs
13 placed in two modes, the first mode bypasses the PGA (gain),
14 the second goes through the PGA. Hence there are three
/linux/drivers/net/wireless/broadcom/b43/
H A Dphy_g.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 /* OFDM PHY registers are defined in the A-PHY header. */
9 #define B43_PHY_VERSION_CCK B43_PHY_CCK(0x00) /* Versioning register for B-PHY */
11 #define B43_PHY_PGACTL B43_PHY_CCK(0x15) /* PGA control */
24 /* Extended G-PHY Registers */
26 #define B43_PHY_GTABCTL B43_PHY_EXTG(0x03) /* G-PHY table control (see below) */
27 #define B43_PHY_GTABOFF 0x03FF /* G-PHY table offset (see below) */
28 #define B43_PHY_GTABNR 0xFC00 /* G-PHY table number (see below) */
30 #define B43_PHY_GTABDATA B43_PHY_EXTG(0x04) /* G-PHY table data */
49 /*** G-PHY table numbers */
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/linux/drivers/hwmon/
H A Dads7871.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * ads7871 - driver for TI ADS7871 A/D converter
20 #define REG_PGA_VALID 2 /*PGA Valid Register*/
22 #define REG_GAIN_MUX 4 /*Gain/Mux Register*/
44 #define MUX_G_BV 4 /*allows for reg = (gain << MUX_G_BV) | ...*/
59 #include <linux/hwmon-sysfs.h>
95 struct spi_device *spi = pdata->spi; in voltage_show()
100 channel = attr->index; in voltage_show()
103 * other than single ended with a gain of 1 in voltage_show()
106 /*This is also where the gain of the PGA would be set*/ in voltage_show()
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H A Dtmp513.c1 // SPDX-License-Identifier: GPL-2.0
15 * Copyright (C) 2019 Eric Tremblay <etremblay@distech-controls.com>
112 // Max possible value is -256 to +256 but datasheet indicated -40 to 125.
114 #define MIN_TEMP_LIMIT -40000
123 #define TMP51X_TEMP_CHANNEL_MASK(n) (GENMASK((n) - 1, 0) << 11)
185 // Set the shift based on the gain: 8 -> 1, 4 -> 2, 2 -> 3, 1 -> 4
188 return 5 - ffs(data->pga_gain); in tmp51x_get_pga_shift()
205 * on the pga gain setting. 1lsb = 10uV in tmp51x_get_value()
209 16 - tmp51x_get_pga_shift(data) : 15); in tmp51x_get_value()
210 *val = DIV_ROUND_CLOSEST(*val * 10 * MILLI, data->shunt_uohms); in tmp51x_get_value()
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/linux/drivers/media/dvb-frontends/drx39xyj/
H A Ddrxj.h3 Copyright (c), 2004-2005,2007-2010 Trident Microsystems, Inc.
38 /*-------------------------------------------------------------------------
40 -------------------------------------------------------------------------*/
45 /* Check DRX-J specific dap condition */
55 /*-------------------------------------------------------------------------
57 -------------------------------------------------------------------------*/
92 #define DRXJ_OOB_AGC_LOCK (DRX_LOCK_STATE_1) /* analog gain control lock */
93 #define DRXJ_OOB_SYNC_LOCK (DRX_LOCK_STATE_2) /* digital gain control lock */
151 * AGC status information from the DRXJ-IQM-AF.
179 u16 top; /* rf-agc take over point */
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