| /freebsd/sys/contrib/openzfs/man/man1/ |
| H A D | zarcstat.1 | 57 MFU list hits per second
65 MRU list hits per second
85 Demand hits per second
87 Demand I/O hits per second
89 Demand misses per second
91 Demand data hits per second
93 Demand data I/O hits per second
95 Demand data misses per second
97 Demand metadata hits per second
99 Demand metadata I/O hits per second
[all …]
|
| /freebsd/lib/libpmc/pmu-events/arch/x86/icelake/ |
| H A D | icl-metrics.json | 15 "BriefDescription": "Instructions Per Cycle (per Logical Processor)",
21 "BriefDescription": "Cycles Per Instruction (per Logical Processor)",
27 … "BriefDescription": "Per-Logical Processor actual clocks when the Logical Processor is active.",
33 …"BriefDescription": "Total issue-pipeline slots (per-Physical Core till ICL; per-Logical Processor…
52 "BriefDescription": "Instructions Per Cycle across hyper-threads (per physical core)",
58 "BriefDescription": "Floating Point Operations Per Cycle",
64 …"BriefDescription": "Actual per-core usage of the Floating Point execution units (regardless of th…
68 …"PublicDescription": "Actual per-core usage of the Floating Point execution units (regardless of t…
77 … "BriefDescription": "Number of Instructions per non-speculative Branch Misprediction (JEClear)",
89 "BriefDescription": "Instructions per Load (lower number means higher occurrence rate)",
[all …]
|
| /freebsd/lib/libpmc/pmu-events/arch/x86/broadwell/ |
| H A D | bdw-metrics.json | 10 …nd undersupplies its Backend. SMT version; use when SMT is enabled and measuring per logical CPU.",
14 …egorized under Frontend Bound. SMT version; use when SMT is enabled and measuring per logical CPU."
24 …ue to incorrect speculations. SMT version; use when SMT is enabled and measuring per logical CPU.",
28 …ring Nukes is another example. SMT version; use when SMT is enabled and measuring per logical CPU."
39 …ting new uops in the Backend. SMT version; use when SMT is enabled and measuring per logical CPU.",
43 …: Memory Bound and Core Bound. SMT version; use when SMT is enabled and measuring per logical CPU."
50 …ut was achieved. Maximizing Retiring typically increases the Instructions-per-cycle (see IPC metr…
53 … that eventually get retired. SMT version; use when SMT is enabled and measuring per logical CPU.",
57 …per-cycle (see IPC metric). Note that a high Retiring value does not necessary mean there is no ro…
60 "BriefDescription": "Instructions Per Cycle (per Logical Processor)",
[all …]
|
| /freebsd/lib/libpmc/pmu-events/arch/x86/broadwellde/ |
| H A D | bdwde-metrics.json | 10 …nd undersupplies its Backend. SMT version; use when SMT is enabled and measuring per logical CPU.",
14 …egorized under Frontend Bound. SMT version; use when SMT is enabled and measuring per logical CPU."
24 …ue to incorrect speculations. SMT version; use when SMT is enabled and measuring per logical CPU.",
28 …ring Nukes is another example. SMT version; use when SMT is enabled and measuring per logical CPU."
39 …ting new uops in the Backend. SMT version; use when SMT is enabled and measuring per logical CPU.",
43 …: Memory Bound and Core Bound. SMT version; use when SMT is enabled and measuring per logical CPU."
50 …ut was achieved. Maximizing Retiring typically increases the Instructions-per-cycle (see IPC metr…
53 … that eventually get retired. SMT version; use when SMT is enabled and measuring per logical CPU.",
57 …per-cycle (see IPC metric). Note that a high Retiring value does not necessary mean there is no ro…
60 "BriefDescription": "Instructions Per Cycle (per Logical Processor)",
[all …]
|
| /freebsd/lib/libpmc/pmu-events/arch/x86/broadwellx/ |
| H A D | bdx-metrics.json | 10 …nd undersupplies its Backend. SMT version; use when SMT is enabled and measuring per logical CPU.",
14 …egorized under Frontend Bound. SMT version; use when SMT is enabled and measuring per logical CPU."
24 …ue to incorrect speculations. SMT version; use when SMT is enabled and measuring per logical CPU.",
28 …ring Nukes is another example. SMT version; use when SMT is enabled and measuring per logical CPU."
39 …ting new uops in the Backend. SMT version; use when SMT is enabled and measuring per logical CPU.",
43 …: Memory Bound and Core Bound. SMT version; use when SMT is enabled and measuring per logical CPU."
50 …ut was achieved. Maximizing Retiring typically increases the Instructions-per-cycle (see IPC metr…
53 … that eventually get retired. SMT version; use when SMT is enabled and measuring per logical CPU.",
57 …per-cycle (see IPC metric). Note that a high Retiring value does not necessary mean there is no ro…
60 "BriefDescription": "Instructions Per Cycle (per Logical Processor)",
[all …]
|
| /freebsd/lib/libpmc/pmu-events/arch/x86/alderlake/ |
| H A D | adl-metrics.json | 10 "BriefDescription": "Instructions Per Cycle (per Logical Processor)",
17 "BriefDescription": "Cycles Per Instruction (per Logical Processor)",
24 … "BriefDescription": "Per-Logical Processor actual clocks when the Logical Processor is active.",
31 …"BriefDescription": "Total issue-pipeline slots (per-Physical Core till ICL; per-Logical Processor…
53 "BriefDescription": "Instructions Per Cycle across hyper-threads (per physical core)",
60 "BriefDescription": "Floating Point Operations Per Cycle",
67 …"BriefDescription": "Actual per-core usage of the Floating Point execution units (regardless of th…
71 …"PublicDescription": "Actual per-core usage of the Floating Point execution units (regardless of t…
82 … "BriefDescription": "Number of Instructions per non-speculative Branch Misprediction (JEClear)",
96 "BriefDescription": "Instructions per Load (lower number means higher occurrence rate)",
[all …]
|
| /freebsd/lib/libpmc/pmu-events/arch/x86/icelakex/ |
| H A D | icx-metrics.json | 15 "BriefDescription": "Instructions Per Cycle (per Logical Processor)",
21 "BriefDescription": "Uops Per Instruction",
27 "BriefDescription": "Instruction per taken branch",
33 "BriefDescription": "Cycles Per Instruction (per Logical Processor)",
39 … "BriefDescription": "Per-Logical Processor actual clocks when the Logical Processor is active.",
45 …"BriefDescription": "Total issue-pipeline slots (per-Physical Core till ICL; per-Logical Processor…
64 "BriefDescription": "Instructions Per Cycle across hyper-threads (per physical core)",
70 "BriefDescription": "Floating Point Operations Per Cycle",
76 …"BriefDescription": "Actual per-core usage of the Floating Point execution units (regardless of th…
80 …"PublicDescription": "Actual per-core usage of the Floating Point execution units (regardless of t…
[all …]
|
| /freebsd/lib/libpmc/pmu-events/arch/x86/ivybridge/ |
| H A D | ivb-metrics.json | 10 …nd undersupplies its Backend. SMT version; use when SMT is enabled and measuring per logical CPU.",
14 …egorized under Frontend Bound. SMT version; use when SMT is enabled and measuring per logical CPU."
24 …ue to incorrect speculations. SMT version; use when SMT is enabled and measuring per logical CPU.",
28 …ring Nukes is another example. SMT version; use when SMT is enabled and measuring per logical CPU."
39 …ting new uops in the Backend. SMT version; use when SMT is enabled and measuring per logical CPU.",
43 …: Memory Bound and Core Bound. SMT version; use when SMT is enabled and measuring per logical CPU."
50 …ut was achieved. Maximizing Retiring typically increases the Instructions-per-cycle (see IPC metr…
53 … that eventually get retired. SMT version; use when SMT is enabled and measuring per logical CPU.",
57 …per-cycle (see IPC metric). Note that a high Retiring value does not necessary mean there is no ro…
60 "BriefDescription": "Instructions Per Cycle (per Logical Processor)",
[all …]
|
| /freebsd/lib/libpmc/pmu-events/arch/x86/ivytown/ |
| H A D | ivt-metrics.json | 10 …nd undersupplies its Backend. SMT version; use when SMT is enabled and measuring per logical CPU.",
14 …egorized under Frontend Bound. SMT version; use when SMT is enabled and measuring per logical CPU."
24 …ue to incorrect speculations. SMT version; use when SMT is enabled and measuring per logical CPU.",
28 …ring Nukes is another example. SMT version; use when SMT is enabled and measuring per logical CPU."
39 …ting new uops in the Backend. SMT version; use when SMT is enabled and measuring per logical CPU.",
43 …: Memory Bound and Core Bound. SMT version; use when SMT is enabled and measuring per logical CPU."
50 …ut was achieved. Maximizing Retiring typically increases the Instructions-per-cycle (see IPC metr…
53 … that eventually get retired. SMT version; use when SMT is enabled and measuring per logical CPU.",
57 …per-cycle (see IPC metric). Note that a high Retiring value does not necessary mean there is no ro…
60 "BriefDescription": "Instructions Per Cycle (per Logical Processor)",
[all …]
|
| /freebsd/lib/libpmc/pmu-events/arch/x86/tigerlake/ |
| H A D | tgl-metrics.json | 3 "BriefDescription": "Instructions Per Cycle (per Logical Processor)",
9 "BriefDescription": "Instruction per taken branch",
15 "BriefDescription": "Cycles Per Instruction (per Logical Processor)",
21 … "BriefDescription": "Per-Logical Processor actual clocks when the Logical Processor is active.",
27 "BriefDescription": "Instructions Per Cycle (per physical core)",
33 "BriefDescription": "Floating Point Operations Per Cycle",
45 … "BriefDescription": "Number of Instructions per non-speculative Branch Misprediction (JEClear)",
57 "BriefDescription": "Instructions per Load (lower number means higher occurrence rate)",
63 "BriefDescription": "Instructions per Store (lower number means higher occurrence rate)",
69 "BriefDescription": "Instructions per Branch (lower number means higher occurrence rate)",
[all …]
|
| /freebsd/lib/libpmc/pmu-events/arch/x86/amdzen6/ |
| H A D | recommended.json | 11 "BriefDescription": "All data cache accesses per thousand instructions.",
18 "BriefDescription": "All L2 cache accesses per thousand instructions.",
25 …: "L2 cache accesses from L1 instruction cache misses (including prefetch) per thousand instructio…
32 …"BriefDescription": "L2 cache accesses from L1 data cache misses (including prefetch) per thousand…
39 …"BriefDescription": "L2 cache accesses from L2 cache hardware prefetcher per thousand instructions…
46 "BriefDescription": "All L2 cache misses per thousand instructions.",
53 … "BriefDescription": "L2 cache misses from L1 instruction cache misses per thousand instructions.",
60 "BriefDescription": "L2 cache misses from L1 data cache misses per thousand instructions.",
67 …"BriefDescription": "L2 cache misses from L2 cache hardware prefetcher per thousand instructions.",
74 "BriefDescription": "All L2 cache hits per thousand instructions.",
[all …]
|
| /freebsd/lib/libpmc/pmu-events/arch/x86/haswell/ |
| H A D | hsw-metrics.json | 10 …nd undersupplies its Backend. SMT version; use when SMT is enabled and measuring per logical CPU.",
14 …egorized under Frontend Bound. SMT version; use when SMT is enabled and measuring per logical CPU."
24 …ue to incorrect speculations. SMT version; use when SMT is enabled and measuring per logical CPU.",
28 …ring Nukes is another example. SMT version; use when SMT is enabled and measuring per logical CPU."
39 …ting new uops in the Backend. SMT version; use when SMT is enabled and measuring per logical CPU.",
43 …: Memory Bound and Core Bound. SMT version; use when SMT is enabled and measuring per logical CPU."
50 …ut was achieved. Maximizing Retiring typically increases the Instructions-per-cycle (see IPC metr…
53 … that eventually get retired. SMT version; use when SMT is enabled and measuring per logical CPU.",
57 …per-cycle (see IPC metric). Note that a high Retiring value does not necessary mean there is no ro…
60 "BriefDescription": "Instructions Per Cycle (per Logical Processor)",
[all …]
|
| /freebsd/lib/libpmc/pmu-events/arch/x86/haswellx/ |
| H A D | hsx-metrics.json | 10 …nd undersupplies its Backend. SMT version; use when SMT is enabled and measuring per logical CPU.",
14 …egorized under Frontend Bound. SMT version; use when SMT is enabled and measuring per logical CPU."
24 …ue to incorrect speculations. SMT version; use when SMT is enabled and measuring per logical CPU.",
28 …ring Nukes is another example. SMT version; use when SMT is enabled and measuring per logical CPU."
39 …ting new uops in the Backend. SMT version; use when SMT is enabled and measuring per logical CPU.",
43 …: Memory Bound and Core Bound. SMT version; use when SMT is enabled and measuring per logical CPU."
50 …ut was achieved. Maximizing Retiring typically increases the Instructions-per-cycle (see IPC metr…
53 … that eventually get retired. SMT version; use when SMT is enabled and measuring per logical CPU.",
57 …per-cycle (see IPC metric). Note that a high Retiring value does not necessary mean there is no ro…
60 "BriefDescription": "Instructions Per Cycle (per Logical Processor)",
[all …]
|
| /freebsd/sys/fs/msdosfs/ |
| H A D | bpb.h | 26 uint16_t bpbBytesPerSec; /* bytes per sector */
27 uint8_t bpbSecPerClust; /* sectors per cluster */
33 uint16_t bpbFATsecs; /* number of sectors per FAT */
34 uint16_t bpbSecPerTrack; /* sectors per track */
44 uint16_t bpbBytesPerSec; /* bytes per sector */
45 uint8_t bpbSecPerClust; /* sectors per cluster */
51 uint16_t bpbFATsecs; /* number of sectors per FAT */
52 uint16_t bpbSecPerTrack; /* sectors per track */
62 uint16_t bpbBytesPerSec; /* bytes per sector */
63 uint8_t bpbSecPerClust; /* sectors per cluster */
[all …]
|
| /freebsd/lib/libpmc/pmu-events/arch/x86/jaketown/ |
| H A D | jkt-metrics.json | 10 …nd undersupplies its Backend. SMT version; use when SMT is enabled and measuring per logical CPU.",
14 …egorized under Frontend Bound. SMT version; use when SMT is enabled and measuring per logical CPU."
24 …ue to incorrect speculations. SMT version; use when SMT is enabled and measuring per logical CPU.",
28 …ring Nukes is another example. SMT version; use when SMT is enabled and measuring per logical CPU."
39 …ting new uops in the Backend. SMT version; use when SMT is enabled and measuring per logical CPU.",
43 …: Memory Bound and Core Bound. SMT version; use when SMT is enabled and measuring per logical CPU."
50 …ut was achieved. Maximizing Retiring typically increases the Instructions-per-cycle (see IPC metr…
53 … that eventually get retired. SMT version; use when SMT is enabled and measuring per logical CPU.",
57 …per-cycle (see IPC metric). Note that a high Retiring value does not necessary mean there is no ro…
60 "BriefDescription": "Instructions Per Cycle (per Logical Processor)",
[all …]
|
| /freebsd/lib/libpmc/pmu-events/arch/x86/sandybridge/ |
| H A D | snb-metrics.json | 10 …nd undersupplies its Backend. SMT version; use when SMT is enabled and measuring per logical CPU.",
14 …egorized under Frontend Bound. SMT version; use when SMT is enabled and measuring per logical CPU."
24 …ue to incorrect speculations. SMT version; use when SMT is enabled and measuring per logical CPU.",
28 …ring Nukes is another example. SMT version; use when SMT is enabled and measuring per logical CPU."
39 …ting new uops in the Backend. SMT version; use when SMT is enabled and measuring per logical CPU.",
43 …: Memory Bound and Core Bound. SMT version; use when SMT is enabled and measuring per logical CPU."
50 …ut was achieved. Maximizing Retiring typically increases the Instructions-per-cycle (see IPC metr…
53 … that eventually get retired. SMT version; use when SMT is enabled and measuring per logical CPU.",
57 …per-cycle (see IPC metric). Note that a high Retiring value does not necessary mean there is no ro…
60 "BriefDescription": "Instructions Per Cycle (per Logical Processor)",
[all …]
|
| /freebsd/sys/contrib/openzfs/cmd/ |
| H A D | zarcstat.in | 56 "hits": [4, 1000, "ARC hits per second"],
57 "iohs": [4, 1000, "ARC I/O hits per second"],
58 "miss": [4, 1000, "ARC misses per second"],
59 "read": [4, 1000, "Total ARC accesses per second"],
63 "dhit": [4, 1000, "Demand hits per second"],
64 "dioh": [4, 1000, "Demand I/O hits per second"],
65 "dmis": [4, 1000, "Demand misses per second"],
69 "ddhit": [5, 1000, "Demand data hits per second"],
70 "ddioh": [5, 1000, "Demand data I/O hits per second"],
71 "ddmis": [5, 1000, "Demand data misses per second"],
[all …]
|
| /freebsd/contrib/ofed/libibverbs/man/ |
| H A D | ibv_query_device.3 | 30 uint32_t vendor_id; /* Vendor ID, per IEEE */
36 int max_sge; /* Maximum number of s/g per WR for SQ & RQ of QP f…
37 int max_sge_rd; /* Maximum number of s/g per WR for RDMA Read opera…
39 int max_cqe; /* Maximum number of CQE capacity per CQ */
42 …_atom; /* Maximum number of RDMA Read & Atomic operations that can be outstanding per QP */
43 …atom; /* Maximum number of RDMA Read & Atomic operations that can be outstanding per EEC */
45 int max_qp_init_rd_atom; /* Maximum depth per QP for initiation of RDMA Read…
46 int max_ee_init_rd_atom; /* Maximum depth per EEC for initiation of RDMA Rea…
54 int max_mcast_qp_attach; /* Maximum number of QPs per multicast group which …
58 int max_map_per_fmr; /* Maximum number of (re)maps per FMR before an unm…
[all …]
|
| /freebsd/share/man/man7/ |
| H A D | orders.7 | 55 "Megabit per second" "Prefix" "Bit per second" "Byte per second"
56 .It Sy Name Ta Sy Prefix Ta Sy Bit per second Ta Sy Byte per second
57 .It Bit per second Ta bit/s Ta 1 Ta 0.125
58 .It Byte per second Ta B/s Ta 8 Ta 1
59 .It Kilobit per second Ta kbit/s Ta 10^3 Ta 125
60 .It Kilobyte per second Ta kB/s Ta 8 * 10^3 Ta 1000
61 .It Megabit per second Ta Mbit/s Ta 10^6 Ta 125000
62 .It Megabyte per second Ta MB/s Ta 8 * 10^6 Ta 1000000
63 .It Gigabit per second Ta Gbit/s Ta 10^9 Ta 125000000
64 .It Gigabyte per second Ta GB/s Ta 8 * 10^9 Ta 1000000000
[all …]
|
| /freebsd/lib/libpmc/pmu-events/arch/x86/amdzen5/ |
| H A D | recommended.json | 11 "BriefDescription": "All data cache accesses per thousand instructions.",
18 "BriefDescription": "All L2 cache accesses per thousand instructions.",
25 …: "L2 cache accesses from L1 instruction cache misses (including prefetch) per thousand instructio…
32 …"BriefDescription": "L2 cache accesses from L1 data cache misses (including prefetch) per thousand…
39 …"BriefDescription": "L2 cache accesses from L2 cache hardware prefetcher per thousand instructions…
46 "BriefDescription": "All L2 cache misses per thousand instructions.",
53 … "BriefDescription": "L2 cache misses from L1 instruction cache misses per thousand instructions.",
60 "BriefDescription": "L2 cache misses from L1 data cache misses per thousand instructions.",
67 …"BriefDescription": "L2 cache misses from L2 cache hardware prefetcher per thousand instructions.",
74 "BriefDescription": "All L2 cache hits per thousand instructions.",
[all …]
|
| /freebsd/usr.sbin/iostat/ |
| H A D | iostat.8 | 158 Sectors per second, transfers per second, and milliseconds per seek are
163 milliseconds per seek are displayed.
332 kilobytes per transfer
334 transfers per second
336 megabytes per second
347 kilobytes per transfer
362 read operations per second
364 write operations per second
366 kilobytes read per second
368 kilobytes write per second
[all …]
|
| /freebsd/lib/libpmc/pmu-events/arch/x86/skylakex/ |
| H A D | skx-metrics.json | 10 …nd undersupplies its Backend. SMT version; use when SMT is enabled and measuring per logical CPU.",
14 …egorized under Frontend Bound. SMT version; use when SMT is enabled and measuring per logical CPU."
24 …ue to incorrect speculations. SMT version; use when SMT is enabled and measuring per logical CPU.",
28 …ring Nukes is another example. SMT version; use when SMT is enabled and measuring per logical CPU."
39 …ting new uops in the Backend. SMT version; use when SMT is enabled and measuring per logical CPU.",
43 …: Memory Bound and Core Bound. SMT version; use when SMT is enabled and measuring per logical CPU."
50 …ut was achieved. Maximizing Retiring typically increases the Instructions-per-cycle (see IPC metr…
53 … that eventually get retired. SMT version; use when SMT is enabled and measuring per logical CPU.",
57 …per-cycle (see IPC metric). Note that a high Retiring value does not necessary mean there is no ro…
144 "BriefDescription": "Instructions Per Cycle (per Logical Processor)",
[all …]
|
| /freebsd/lib/libmemstat/ |
| H A D | memstat_internal.h | 79 * For allocators making use of per-CPU caches, we also provide raw
80 * statistics from the central allocator and each per-CPU cache,
84 * cached in per-CPU caches.
87 * from zone, which should (combined with per-cpu) add up to the
94 * Per-CPU measurements fall into two categories: per-CPU allocation,
95 * and per-CPU cache state.
98 uint64_t mtp_memalloced;/* Per-CPU mt_memalloced. */
99 uint64_t mtp_memfreed; /* Per-CPU mt_memfreed. */
100 uint64_t mtp_numallocs; /* Per-CPU mt_numallocs. */
101 uint64_t mtp_numfrees; /* Per-CPU mt_numfrees. */
[all …]
|
| /freebsd/lib/libpmc/pmu-events/arch/x86/skylake/ |
| H A D | skl-metrics.json | 10 …nd undersupplies its Backend. SMT version; use when SMT is enabled and measuring per logical CPU.",
14 …egorized under Frontend Bound. SMT version; use when SMT is enabled and measuring per logical CPU."
24 …ue to incorrect speculations. SMT version; use when SMT is enabled and measuring per logical CPU.",
28 …ring Nukes is another example. SMT version; use when SMT is enabled and measuring per logical CPU."
39 …ting new uops in the Backend. SMT version; use when SMT is enabled and measuring per logical CPU.",
43 …: Memory Bound and Core Bound. SMT version; use when SMT is enabled and measuring per logical CPU."
50 …ut was achieved. Maximizing Retiring typically increases the Instructions-per-cycle (see IPC metr…
53 … that eventually get retired. SMT version; use when SMT is enabled and measuring per logical CPU.",
57 …per-cycle (see IPC metric). Note that a high Retiring value does not necessary mean there is no ro…
144 "BriefDescription": "Instructions Per Cycle (per Logical Processor)",
[all …]
|
| /freebsd/share/man/man9/ |
| H A D | dpcpu.9 | 31 .Nd Kernel Dynamic Per-CPU Memory Allocator
34 .Ss Per-CPU Variable Definition and Declaration
49 Dynamically allocated per-CPU variables are defined using
56 If no initialization is provided, then each per-CPU instance of the variable
77 produces a declaration of the per-CPU variable suitable for use in header
82 (which returns a pointer to the per-CPU instance),
84 (which retrieves the value of the per-CPU instance),
87 (which sets the value of the per-CPU instance).
104 This requires additional care when reasoning about and protecting per-CPU
138 * Protect with a per-CPU mutex, tolerating migration, but
[all …]
|