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/freebsd/sys/contrib/device-tree/Bindings/iio/afe/
H A Dtemperature-transducer.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/afe/temperature-transducer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Liam Beguin <liambeguin@gmail.com>
19 When an io-channel measures the output voltage of a temperature analog front
35 -----
37 +---+---+
39 +---+---+ -----
41 V proportional to T +----+----+
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H A Dtemperature-sense-rtd.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/afe/temperature-sense-rtd.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Liam Beguin <liambeguin@gmail.com>
17 When an io-channel measures the output voltage across an RTD such as a
25 T = 1 / (alpha * r0 * iexc) * (V - r0 * iexc)
30 -----
32 +---+----+
34 +---+----+
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/freebsd/sys/net80211/
H A D_ieee80211.h1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
5 * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting
53 * PHY mode; this is not really a mode as multi-mode devices
57 * channels were identified as IEEE channel numbers.
100 IEEE80211_PROT_RTSCTS = 2, /* RTS-CTS */
113 IEEE80211_AUTH_SHARED = 2, /* shared-key */
115 IEEE80211_AUTH_AUTO = 4, /* auto-select/accept */
141 uint8_t ic_ieee; /* IEEE channel number */
146 uint8_t ic_extieee; /* HT40 extension channel number */
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/freebsd/sys/contrib/device-tree/Bindings/dma/xilinx/
H A Dxilinx_dma.txt2 It can be configured to have one channel or two channels. If configured
7 target devices. It can be configured to have one channel or two channels.
11 Xilinx AXI CDMA engine, it does transfers between memory-mapped source
12 address and a memory-mapped destination address.
19 - compatible: Should be one of-
20 "xlnx,axi-vdma-1.00.a"
21 "xlnx,axi-dma-1.0
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/freebsd/sys/contrib/dev/iwlwifi/fw/api/
H A Dscan.h1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
3 * Copyright (C) 2012-2014, 2018-2024 Intel Corporation
4 * Copyright (C) 2013-2015 Intel Mobile Communications GmbH
5 * Copyright (C) 2016-2017 Intel Deutschland GmbH
13 * enum iwl_scan_subcmd_ids - sca
391 u8 channel; global() member
859 struct iwl_scan_umac_chan_param channel; global() member
870 struct iwl_scan_umac_chan_param channel; global() member
884 struct iwl_scan_umac_chan_param channel; global() member
899 struct iwl_scan_umac_chan_param channel; global() member
914 struct iwl_scan_umac_chan_param channel; global() member
1162 u8 channel; global() member
1206 u8 channel; global() member
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H A Dtdls.h1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
3 * Copyright (C) 2012-2014, 2018 Intel Corporation
4 * Copyright (C) 2013-2015 Intel Mobile Communications GmbH
5 * Copyright (C) 2016-2017 Intel Deutschland GmbH
11 #include "fw/api/phy-ctxt.h"
23 * struct iwl_tdls_channel_switch_timing - Switch timing in TDLS channel-switch
24 * @frame_timestamp: GP2 timestamp of channel-switch request/response packet
27 * to the TDLS off-channel communication. For instance if the DTIM is
30 * @switch_time: switch time the peer sent in its channel switch timing IE
31 * @switch_timeout: switch timeout the peer sent in its channel switch timing IE
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H A Dlocation.h1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
3 * Copyright (C) 2015-2017 Intel Deutschland GmbH
4 * Copyright (C) 2018-2022 Intel Corporation
11 * enum iwl_location_subcmd_ids - location group command IDs
86 * struct iwl_tof_config_cmd - ToF configuration
88 * @one_sided_disabled: indicates if one-side
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H A Dstats.h1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
3 * Copyright (C) 2012-2014, 2018, 2020 - 2021, 2023 Intel Corporation
4 * Copyright (C) 2013-2015 Intel Mobile Communications GmbH
5 * Copyright (C) 2016-2017 Intel Deutschland GmbH
10 #include "mac-cf
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H A Dnvm-reg.h1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
3 * Copyright (C) 2012-2014, 2018-2024 Intel Corporation
4 * Copyright (C) 2013-2015 Intel Mobile Communications GmbH
5 * Copyright (C) 2016-2017 Intel Deutschland GmbH
11 * enum iwl_regulatory_and_nvm_subcmd_ids - regulator
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/freebsd/sys/contrib/xen/
H A Devent_channel.h24 * Copyright (c) 2003-2004, K A Fraser.
43 * guests must check the value of the bit after re-enabling event
58 * @cmd == EVTCHNOP_* (event-channel operation).
59 * @args == struct evtchn_* Operation-specific extra arguments (NULL if none).
102 * EVTCHNOP_bind_interdomain: Construct an interdomain event channel between
108 * In case the peer domain has already tried to set our event channel
110 * the local event channel pending.
113 * handler) is as follows: (Re-enable the event channel for subsequent
131 * EVTCHNOP_bind_virq: Bind a local event channel to VIRQ <irq> on specified
134 * 1. Virtual IRQs are classified as per-vcpu or global. See the VIRQ list
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/freebsd/sys/contrib/device-tree/Bindings/net/
H A Damd-xgbe.txt1 * AMD 10GbE driver (amd-xgbe)
4 - compatible: Should be "amd,xgbe-seattle-v1a"
5 - reg: Address and length of the register sets for the device
6 - MAC registers
7 - PCS registers
8 - SerDes Rx/Tx registers
9 - SerDes integration registers (1/2)
10 - SerDes integration registers (2/2)
11 - interrupts: Should contain the amd-xgbe interrupt(s). The first interrupt
13 amd,per-channel-interrupt property is specified, then one additional
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/freebsd/sys/contrib/device-tree/Bindings/dma/
H A Dsnps-dma.txt4 - compatible: "snps,dma-spear1340"
5 - reg: Address range of the DMAC registers
6 - interrupt: Should contain the DMAC interrupt number
7 - dma-channels: Number of channels supported by hardware
8 - dma-requests: Number of DMA request lines supported, up to 16
9 - dma-masters: Number of AHB masters supported by the controller
10 - #dma-cells: must be <3>
11 - chan_allocation_order: order of allocation of channel, 0 (default): ascending,
13 - chan_priority: priority of channels. 0 (default): increase from chan 0->n, 1:
14 increase from chan n->0
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H A Dmmp-dma.txt7 - compatible: Should be "marvell,pdma-1.0"
8 - reg: Should contain DMA registers location and length.
9 - interrupts: Either contain all of the per-channel DMA interrupts
13 - dma-channels: Number of DMA channels supported by the controller (defaults
15 - #dma-channels: deprecated
16 - dma-requests: Number of DMA requestor lines supported by the controller
18 - #dma-requests: deprecated
20 "marvell,pdma-1.0"
26 * Each channel has specific irq
27 * ICU parse out irq channel from ICU register,
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H A Dsnps,dma-spear1340.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/dma/snps,dma-spear1340.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Viresh Kumar <vireshk@kernel.org>
11 - Andy Shevchenko <andriy.shevchenko@linux.intel.com>
14 - $ref: dma-controller.yaml#
19 - const: snps,dma-spear1340
20 - items:
21 - enum:
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H A Dti-edma.txt3 The eDMA3 consists of two components: Channel controller (CC) and Transfer
5 responsible for the DMA channel handling, while the TCs are responsible to
8 ------------------------------------------------------------------------------
9 eDMA3 Channel Controller
12 --------------------
13 - compatible: Should be:
14 - "ti,edma3-tpcc" for the channel controller(s) on OMAP,
16 - "ti,k2g-edma3-tpcc", "ti,edma3-tpcc" for the
17 channel controller(s) on 66AK2G.
18 - #dma-cells: Should be set to <2>. The first number is the DMA request
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/freebsd/share/man/man4/
H A Dpcm.42 .\" Copyright (c) 2009-2011 Joel Dahl <joel@FreeBSD.org>
39 .Bd -ragged -offset indent
60 driver are: multichannel audio, per-application
74 .Bl -bullet -compact
118 .Xr snd_uaudio 4 (auto-loaded on device plug)
145 .Bl -tag -widt
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H A Dioat.434 .Bd -ragged -offset indent
40 .Bd -literal -offset indent
145 There is a number of DMA channels per CPU package.
148 Operations on a single channel proceed sequentially.
150 Blockfill operations can be used to write a 64-bit pattern to memory.
160 For example, a user might submit multiple operations to the same channel and
163 The hardware can delay and coalesce interrupts on a given channel for a
165 This may be desired to reduce the processing and interrupt overhead per
167 Software can control this on a per-channel basis with the
177 All operations are safe to use in a non-blocking context with the
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/freebsd/sys/contrib/device-tree/Bindings/net/wireless/
H A Dmediatek,mt76.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Felix Fietkau <nbd@nbd.name>
12 - Lorenzo Bianconi <lorenzo@kernel.org>
13 - Ryder Lee <ryder.lee@mediatek.com>
25 - mediatek,mt76
26 - mediatek,mt7628-wmac
27 - mediatek,mt7622-wmac
[all …]
/freebsd/sys/contrib/device-tree/Bindings/soc/microchip/
H A Datmel,at91rm9200-tcb.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/microchip/atmel,at91rm9200-tcb.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alexandre Belloni <alexandre.belloni@bootlin.com>
19 - enum:
20 - atmel,at91rm9200-tcb
21 - atmel,at91sam9x5-tcb
22 - atmel,sama5d2-tcb
23 - const: simple-mfd
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/freebsd/share/misc/
H A Dscsi_modes35 # 'i' is a byte-sized integral types, followed by a field width of
38 # 'b' is a bit-sized integral type
39 # 't' is a bitfield type- followed by a bit field width
42 # 'z' values are null-padded strings
81 {Extended Self-Test Completion Time} i2
95 0x02 "Disconnect-Reconnect" {
111 0x16 "Extended Device-Type Specific";
154 0x18 "Protocol-Specific Logical Unit";
156 0x19 "Protocol-Specific Port";
172 {Background Pre-Scan Time Limit} i2
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/freebsd/sys/contrib/device-tree/Bindings/sound/
H A Dimg,i2s-in.txt5 - compatible : Compatible list, must contain "img,i2s-in"
7 - #sound-dai-cells : Must be equal to 0
9 - reg : Offset and length of the register set for the device
11 - clocks : Contains an entry for each entry in clock-names
13 - clock-names : Must include the following entry:
16 - dmas: Contains an entry for each entry in dma-names.
18 - dma-names: Must include the following entry:
19 "rx" Single DMA channel used by all active I2S channels
21 - img,i2s-channels : Number of I2S channels instantiated in the I2S in block
25 - interrupts : Contains the I2S in interrupts. Depending on
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H A Dimg,i2s-out.txt5 - compatible : Compatible list, must contain "img,i2s-out"
7 - #sound-dai-cells : Must be equal to 0
9 - reg : Offset and length of the register set for the device
11 - clocks : Contains an entry for each entry in clock-names
13 - clock-names : Must include the following entries:
17 - dmas: Contains an entry for each entry in dma-names.
19 - dma-names: Must include the following entry:
20 "tx" Single DMA channel used by all active I2S channels
22 - img,i2s-channels : Number of I2S channels instantiated in the I2S out block
24 - resets: Contains a phandle to the I2S out reset signal
[all …]
/freebsd/share/man/man9/
H A Dieee80211.972 layer for protocol services but devices that off-load functionality
92 State that is not virtualized includes the current channel and
138 (specified in MHz) to an IEEE 802.11 channel number.
151 function converts the channel specified in
153 to an IEEE channel number for the driver
164 utility function converts the IEEE channel number
181 functions are device-independent handlers for
194 function returns the PHY mode required for use with the channel
206 sub-type, for the device
215 sub-type.
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/freebsd/sys/contrib/device-tree/Bindings/mfd/
H A Datmel-tcb.txt2 - compatible: Should be "atmel,<chip>-tcb", "simple-mfd", "syscon".
4 - reg: Should contain registers location and length
5 - #address-cells: has to be 1
6 - #size-cells: has to be 0
7 - interrupts: Should contain all interrupts for the TC block
9 block has one interrupt per channel.
10 - clock-names: tuple listing input clock names.
13 - clocks: phandles to input clocks.
17 - compatible: Should be "atmel,tcb-timer"
18 - reg: Should contain the TCB channels to be used. If the
[all …]
/freebsd/sys/contrib/device-tree/Bindings/iio/adc/
H A Dti,ads1015.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: TI ADS1015/ADS1115 4 channel I2C analog to digital converter
10 - Daniel Baluta <daniel.baluta@nxp.com>
19 - ti,ads1015
20 - ti,ads1115
21 - ti,tla2021
22 - ti,tla2024
30 "#address-cells":
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