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/linux/Documentation/devicetree/bindings/memory-controllers/
H A Drockchip,rk3399-dmc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/rockchip,rk3399-dmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Brian Norris <briannorris@chromium.org>
15 - rockchip,rk3399-dmc
17 devfreq-events:
26 clock-names:
28 - const: dmc_clk
30 operating-points-v2: true
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/linux/drivers/devfreq/
H A Drk3399_dmc.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Author: Lin Huang <hl@rock-chips.com>
7 #include <linux/arm-smccc.h>
12 #include <linux/devfreq-event.h>
29 #define NS_TO_CYCLE(NS, MHz) (((NS) * (MHz)) / NSEC_PER_USEC) argument
75 unsigned long old_clk_rate = dmcfreq->rate; in rk3399_dmcfreq_target()
93 if (dmcfreq->rate == target_rate) in rk3399_dmcfreq_target()
96 mutex_lock(&dmcfreq->lock); in rk3399_dmcfreq_target()
99 * Ensure power-domain transitions don't interfere with ARM Trusted in rk3399_dmcfreq_target()
100 * Firmware power-domain idling. in rk3399_dmcfreq_target()
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/linux/arch/arm64/boot/dts/rockchip/
H A Drk3399-gru-chromebook.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Google Gru-Chromebook shared properties
8 #include "rk3399-gru.dtsi"
11 pp900_ap: regulator-pp900-ap {
12 compatible = "regulator-fixed";
13 regulator-name = "pp900_ap";
16 regulator-always-on;
17 regulator-boot-on;
18 regulator-min-microvolt = <900000>;
19 regulator-max-microvolt = <900000>;
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H A Drk3399-gru.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 * Copyright 2016-2017 Google, Inc
8 #include <dt-bindings/input/input.h>
9 #include "rk3399-op1.dtsi"
18 stdout-path = "serial2:115200n8";
27 * - Rails that only connect to the EC (or devices that the EC talks to)
29 * - Rails _are_ included if the rails go to the AP even if the AP
38 * - The EC controls the enable and the EC always enables a rail as
40 * - The rails are actually connected to each other by a jumper and
45 ppvar_sys: regulator-ppvar-sys {
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/linux/block/
H A Dbfq-iosched.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
12 #include "blk-cgroup-rwstat.h"
29 * Soft real-time applications are extremely more latency sensitive
30 * than interactive ones. Over-raise the weight of the former to
38 * per-actuator data. The current value is hopefully a good upper
46 * struct bfq_service_tree - per ioprio_class service tree.
48 * Each service tree represents a B-WF2Q+ scheduler on its own. Each
56 /* tree for idle entities (i.e., not backlogged, with V < F_i)*/
57 struct rb_root idle; member
59 /* idle entity with minimum F_i */
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/linux/kernel/sched/
H A Dfair.c1 // SPDX-License-Identifier: GPL-2.0
44 #include <linux/memory-tiers.h>
62 * The initial- and re-scaling of tunables is configurable
66 * SCHED_TUNABLESCALING_NONE - unscaled, always *1
67 * SCHED_TUNABLESCALING_LOG - scaled logarithmically, *1+ilog(ncpus)
68 * SCHED_TUNABLESCALING_LINEAR - scaled linear, *ncpus
75 * Minimal preemption granularity for CPU-bound tasks:
96 return -cpu; in arch_asym_cpu_priority()
116 * Amount of runtime to allocate from global (tg) to local (per-cfs_rq) pool
167 lw->weight += inc; in update_load_add()
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/linux/drivers/dma/
H A Dpl330.c1 // SPDX-License-Identifier: GPL-2.0-or-later
19 #include <linux/dma-mapping.h>
46 CCTRL6, /* Cacheable write-through, allocate on writes only */
47 CCTRL7, /* Cacheable write-back, allocate on writes only */
245 * at 1byte/burst for P<->M and M<->M respectively.
247 * should be enough for P<->M and M<->M respectively.
382 /* Index of the last submitted request or -1 if the DMA is stopped */
423 /* DMA-Engine Channel */
449 /* For D-to-M and M-to-D channels */
453 /* DMA-mapped view of the FIFO; may differ if an IOMMU is present */
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/linux/arch/arm64/boot/dts/freescale/
H A Dimx8mn.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx8mn-clock.h>
7 #include <dt-bindings/power/imx8mn-power.h>
8 #include <dt-bindings/reset/imx8mq-reset.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/thermal/thermal.h>
14 #include "imx8mn-pinfunc.h"
17 interrupt-parent = <&gic>;
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/linux/drivers/net/ethernet/sfc/
H A Dmcdi_pcol.h1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Copyright 2009-2018 Solarflare Communications Inc.
5 * Copyright 2019-2020 Xilinx Inc.
13 /* Power-on reset state */
35 /* The 'doorbell' addresses are hard-wired to alert the MC when written */
38 /* The rest of these are firmware-defined */
46 /* Values to be written to the per-port status dword in shared
71 * | | \--- Response
72 * | \------- Error
73 * \------------------------------ Resync (always set)
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/linux/drivers/net/ethernet/smsc/
H A Dsmc91x.c1 // SPDX-License-Identifier: GPL-2.0-or-later
4 * This is a driver for SMSC's 91C9x/91C1xx single-chip Ethernet devices.
37 * 29/09/03 Russell King - add driver model support
38 * - ethtool support
39 * - convert to use generic MII interface
40 * - add link up/down notification
41 * - don't try to handle full negotiation in
43 * - clean up (and fix stack overrun) in PHY
113 * Use power-down feature of the chip
198 spin_lock_irqsave(&lp->lock, smc_enable_flags); \
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/linux/tools/power/pm-graph/
H A Dsleepgraph.py2 # SPDX-License-Identifier: GPL-2.0-only
21 # https://www.intel.com/content/www/us/en/developer/topic-technology/open/pm-graph/overview.html
23 # git@github.com:intel/pm-graph
51 # ----------------- LIBRARIES --------------------
74 print('[%09.3f] %s' % (time.time()-mystarttime, msg))
82 # ----------------- CLASSES --------------------
86 # A global, single-instance container used to
108 cgtest = -1
183 tmstart = 'SUSPEND START %Y%m%d-%H:%M:%S.%f'
184 tmend = 'RESUME COMPLETE %Y%m%d-%H:%M:%S.%f'
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/linux/drivers/net/wireless/ath/ath5k/
H A Dphy.c2 * Copyright (c) 2004-2007 Reyk Floeter <reyk@openbsd.org>
3 * Copyright (c) 2006-2009 Nick Kossifidis <mickflemm@gmail.com>
4 * Copyright (c) 2007-2008 Jiri Slaby <jirislaby@gmail.com>
5 * Copyright (c) 2008-2009 Felix Fietkau <nbd@openwrt.org>
42 * Here we handle the low-level functions related to baseband
48 * - Channel setting/switching
50 * - Automatic Gain Control (AGC) calibration
52 * - Noise Floor calibration
54 * - I/Q imbalance calibration (QAM correction)
56 * - Calibration due to thermal changes (gain_F)
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/linux/drivers/net/ethernet/cadence/
H A Dmacb_main.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2004-2006 Atmel Corporation
10 #include <linux/clk-provider.h>
23 #include <linux/dma-mapping.h>
37 #include <linux/firmware/xlnx-zynqmp.h>
61 #define MACB_TX_WAKEUP_THRESH(bp) (3 * (bp)->tx_ring_size / 4)
72 …MAX_TX_LEN ((unsigned int)((1 << MACB_TX_FRMLEN_SIZE) - 1) & ~((unsigned int)(MACB_TX_LEN_ALIGN -…
88 * 1 frame time (10 Mbits/s, full-duplex, ignoring collisions)
127 switch (bp->hw_dma_cap) { in macb_dma_desc_get_size()
152 switch (bp->hw_dma_cap) { in macb_adj_dma_desc_idx()
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/linux/drivers/net/wireless/ath/ath11k/
H A Dmac.c1 // SPDX-License-Identifier: BSD-3-Clause-Clear
3 * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
4 * Copyright (c) 2021-2025 Qualcomm Innovation Center, Inc. All rights reserved.
164 /* new addition in IEEE Std 802.11ax-2021 */
244 #define ath11k_a_rates_size (ARRAY_SIZE(ath11k_legacy_rates) - 4)
405 return -EINVAL; in ath11k_mac_hw_ratecode_to_legacy_rate()
426 for (i = 0; i < sband->n_bitrates; i++) in ath11k_mac_bitrate_to_idx()
427 if (sband->bitrates[i].bitrate == bitrate) in ath11k_mac_bitrate_to_idx()
438 for (nss = IEEE80211_HT_MCS_MASK_LEN - 1; nss >= 0; nss--) in ath11k_mac_max_ht_nss()
450 for (nss = NL80211_VHT_NSS_MAX - 1; nss >= 0; nss--) in ath11k_mac_max_vht_nss()
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/linux/drivers/net/ethernet/broadcom/
H A Dtg3.c7 * Copyright (C) 2005-2016 Broadcom Corporation.
8 * Copyright (C) 2016-2017 Broadcom Limited.
14 * Copyright (C) 2000-2016 Broadcom Corporation.
15 * Copyright (C) 2016-2017 Broadcom Ltd.
52 #include <linux/dma-mapping.h>
56 #include <linux/hwmon-sysfs.h>
94 _tg3_flag(TG3_FLAG_##flag, (tp)->tg3_flags)
96 _tg3_flag_set(TG3_FLAG_##flag, (tp)->tg3_flags)
98 _tg3_flag_clear(TG3_FLAG_##flag, (tp)->tg3_flags)
124 * and dev->tx_timeout() should be called to fix the problem
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/linux/drivers/soc/tegra/
H A Dpmc.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * Copyright (c) 2018-2024, NVIDIA CORPORATION. All rights reserved.
12 #define pr_fmt(fmt) "tegra-pmc: " fmt
14 #include <linux/arm-smccc.h>
16 #include <linux/clk-provider.h>
18 #include <linux/clk/clk-conf.h>
37 #include <linux/pinctrl/pinconf-generic.h>
57 #include <dt-bindings/interrupt-controller/arm-gic.h>
58 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
59 #include <dt-bindings/gpio/tegra186-gpio.h>
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/linux/drivers/net/ethernet/broadcom/bnx2x/
H A Dbnx2x_link.c1 /* Copyright 2008-2013 Broadcom Corporation
8 * at http://www.gnu.org/licenses/gpl-2.0.html (the "GPL").
43 #define I2C_WA_PWR_ITER (I2C_WA_RETRY_CNT - 1)
205 (_phy)->def_md_devad, \
211 (_phy)->def_md_devad, \
239 * bnx2x_check_lfa - This function checks if link reinitialization is required,
251 struct bnx2x *bp = params->bp; in bnx2x_check_lfa()
254 REG_RD(bp, params->lfa_base + in bnx2x_check_lfa()
257 /* NOTE: must be first condition checked - in bnx2x_check_lfa()
262 REG_WR(bp, params->lfa_base + in bnx2x_check_lfa()
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/linux/drivers/net/wireless/ath/ath12k/
H A Dmac.c1 // SPDX-License-Identifier: BSD-3-Clause-Clear
3 * Copyright (c) 2018-2021 The Linux Foundation. All rights reserved.
103 /* Operating Classes 131-135 */
245 #define ath12k_a_rates_size (ARRAY_SIZE(ath12k_legacy_rates) - 4)
274 return "11na-ht20"; in ath12k_mac_phymode_str()
276 return "11ng-ht20"; in ath12k_mac_phymode_str()
278 return "11na-ht40"; in ath12k_mac_phymode_str()
280 return "11ng-ht40"; in ath12k_mac_phymode_str()
282 return "11ac-vht20"; in ath12k_mac_phymode_str()
284 return "11ac-vht40"; in ath12k_mac_phymode_str()
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