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/linux/Documentation/devicetree/bindings/pinctrl/
H A Dmarvell,armada-38x-pinctrl.txt30 mpp12 12 gpio, ge0(rxd0), pcie0(rstout), spi0(cs1), dev(ad14), pcie3(clkreq)
31 mpp13 13 gpio, ge0(rxd1), pcie0(clkreq), pcie1(clkreq) [1], spi0(cs2), dev(ad15), pci…
33 mpp15 15 gpio, ge0(rxd3), ge(mdc slave), pcie0(rstout), spi0(mosi)
34 mpp16 16 gpio, ge0(rxctl), ge(mdio slave), dram(deccerr), spi0(miso), pcie0(clkreq), …
61 mpp43 43 gpio, pcie0(clkreq), dram(vttctrl), dram(deccerr), spi1(cs2), dev(clkout), n…
63 mpp45 45 gpio, ref(clk_out0), pcie0(rstout), ua1(rxd)
64 mpp46 46 gpio, ref(clk_out1), pcie0(rstout), ua1(txd)
66 mpp48 48 gpio, sata0(prsnt), dram(vttctrl), tdm(pclk), audio(mclk), sd0(d4), pcie0(cl…
68 mpp50 50 gpio, pcie0(rstout), tdm(drx), audio(extclk), sd0(cmd)
70 mpp52 52 gpio, pcie0(rstout), tdm(int), audio(sdi), sd0(d6), ptp(clk)
[all …]
H A Dmarvell,armada-39x-pinctrl.txt30 mpp12 12 gpio, pcie0(rstout), dev(ad14), led(stb)
33 mpp15 15 gpio, pcie0(rstout), spi0(mosi), i2c1(sck)
34 mpp16 16 gpio, dram(deccerr), spi0(miso), pcie0(clkreq), i2c1(sda)
62 mpp43 43 gpio, pcie0(clkreq), dram(vttctrl), dram(deccerr), spi1(cs2), dev(clkout), nand(rb1)
65 mpp45 45 gpio, ref(clk), pcie0(rstout), ua1(rxd)
66 mpp46 46 gpio, ref(clk), pcie0(rstout), ua1(txd), led(stb)
69 mpp48 48 gpio, sata0(prsnt) [1], dram(vttctrl), tdm(pclk) [2], audio(mclk) [2], sd0(d4), pcie0(clkr…
72 mpp50 50 gpio, pcie0(rstout), tdm(drx) [2], audio(extclk) [2], sd0(cmd), ua2(rxd)
74 mpp52 52 gpio, pcie0(rstout), tdm(int) [2], audio(sdi) [2], sd0(d6), i2c3(sck)
76 mpp54 54 gpio, sata0(prsnt) [1], sata1(prsnt) [1], pcie0(rstout), sd0(d3), ua3(txd)
[all …]
H A Dmarvell,armada-375-pinctrl.txt29 mpp13 13 gpio, dev(ready), pcie0(rstout), pcie1(rstout)
42 mpp26 26 gpio, pcie0(clkreq), ge1(rxd2), sd(d2), uart1(rts)
52 mpp36 36 gpio, pcie0(clkreq)
53 mpp37 37 gpio, pcie0(clkreq), tdm(int), ge(mdc)
61 mpp45 45 gpio, spi0(cs2), pcie0(rstout)
70 mpp54 54 gpio, pcie0(rstout), ge0(rxctl), ge1(rxctl)
/linux/arch/arm64/boot/dts/ti/
H A DMakefile67 dtb-$(CONFIG_ARCH_K3) += k3-am642-evm-pcie0-ep.dtbo
128 dtb-$(CONFIG_ARCH_K3) += k3-j721e-evm-pcie0-ep.dtbo
164 dtb-$(CONFIG_ARCH_K3) += k3-am69-sk-pcie0-ep.dtbo
166 dtb-$(CONFIG_ARCH_K3) += k3-j784s4-evm-pcie0-pcie1-ep.dtbo
225 k3-am642-evm-pcie0-ep-dtbs := \
226 k3-am642-evm.dtb k3-am642-evm-pcie0-ep.dtbo
255 k3-am69-sk-pcie0-ep-dtbs := k3-am69-sk.dtb \
256 k3-am69-sk-pcie0-ep.dtbo
261 k3-j721e-evm-pcie0-ep-dtbs := k3-j721e-common-proc-board.dtb \
262 k3-j721e-evm-pcie0-ep.dtbo
[all …]
/linux/drivers/pinctrl/mvebu/
H A Dpinctrl-armada-38x.c79 MPP_VAR_FUNCTION(2, "pcie0", "rstout", V_88F6810_PLUS),
86 MPP_VAR_FUNCTION(2, "pcie0", "clkreq", V_88F6810_PLUS),
103 MPP_VAR_FUNCTION(3, "pcie0", "rstout", V_88F6810_PLUS),
111 MPP_VAR_FUNCTION(5, "pcie0", "clkreq", V_88F6810_PLUS),
263 MPP_VAR_FUNCTION(1, "pcie0", "clkreq", V_88F6810_PLUS),
278 MPP_VAR_FUNCTION(2, "pcie0", "rstout", V_88F6810_PLUS),
283 MPP_VAR_FUNCTION(2, "pcie0", "rstout", V_88F6810_PLUS),
298 MPP_VAR_FUNCTION(6, "pcie0", "clkreq", V_88F6810_PLUS)),
309 MPP_VAR_FUNCTION(1, "pcie0", "rstout", V_88F6810_PLUS),
321 MPP_VAR_FUNCTION(1, "pcie0", "rstout", V_88F6810_PLUS),
[all …]
H A Dpinctrl-armada-39x.c77 MPP_VAR_FUNCTION(2, "pcie0", "rstout", V_88F6920_PLUS),
92 MPP_VAR_FUNCTION(3, "pcie0", "rstout", V_88F6920_PLUS),
99 MPP_VAR_FUNCTION(5, "pcie0", "clkreq", V_88F6920_PLUS),
243 MPP_VAR_FUNCTION(1, "pcie0", "clkreq", V_88F6920_PLUS),
259 MPP_VAR_FUNCTION(2, "pcie0", "rstout", V_88F6920_PLUS),
264 MPP_VAR_FUNCTION(2, "pcie0", "rstout", V_88F6920_PLUS),
281 MPP_VAR_FUNCTION(6, "pcie0", "clkreq", V_88F6920_PLUS),
293 MPP_VAR_FUNCTION(1, "pcie0", "rstout", V_88F6920_PLUS),
306 MPP_VAR_FUNCTION(1, "pcie0", "rstout", V_88F6920_PLUS),
323 MPP_VAR_FUNCTION(3, "pcie0", "rstout", V_88F6920_PLUS),
[all …]
H A Dpinctrl-armada-375.c106 MPP_FUNCTION(0x2, "pcie0", "rstout"),
160 MPP_FUNCTION(0x1, "pcie0", "clkreq"),
186 MPP_FUNCTION(0x6, "pcie0", "rstout")),
222 MPP_FUNCTION(0x1, "pcie0", "clkreq"),
226 MPP_FUNCTION(0x1, "pcie0", "clkreq"),
261 MPP_FUNCTION(0x4, "pcie0", "rstout"),
318 MPP_FUNCTION(0x1, "pcie0", "rstout"),
376 MPP_FUNCTION(0x5, "pcie0", "rstout"),
/linux/arch/arm64/boot/dts/airoha/
H A Den7581-evb.dts71 pcie0_rst_pins: pcie0-rst-pins {
86 &pcie0 {
/linux/arch/arm/boot/dts/marvell/
H A Ddove-sbc-a510.dts54 * 0.6 PCIe0 nRST (active low reset)
152 * PCIe0 can be configured by Jumper E1 to be either connected to
155 &pcie0 {
H A Dkirkwood-db-88f6281.dts24 &pcie0 {
H A Dkirkwood-db-88f6282.dts24 &pcie0 {
/linux/arch/arm/boot/dts/broadcom/
H A Dbcm2711-rpi.dtsi16 pcie0 = &pcie0;
H A Dbcm958625-meraki-mx64w.dts26 &pcie0 {
H A Dbcm958625-meraki-mx65w.dts26 &pcie0 {
/linux/arch/arm64/boot/dts/marvell/
H A Darmada-8040-mcbin.dtsi188 phy-names = "cp0-pcie0-x4-lane0-phy", "cp0-pcie0-x4-lane1-phy",
189 "cp0-pcie0-x4-lane2-phy", "cp0-pcie0-x4-lane3-phy";
/linux/arch/arm64/boot/dts/qcom/
H A Dipq5332-rdp441.dts35 &pcie0 {
71 pcie0_default: pcie0-default-state {
/linux/Documentation/devicetree/bindings/pci/
H A Dmicrochip,pcie-host.yaml70 pcie0: pcie@2030000000 {
87 msi-parent = <&pcie0>;
H A Dapple,pcie.yaml129 pcie0: pcie@690000000 {
146 msi-parent = <&pcie0>;
/linux/arch/arm64/boot/dts/freescale/
H A DMakefile110 imx8dxl-evk-pcie-ep-dtbs += imx8dxl-evk.dtb imx-pcie0-ep.dtbo
123 imx8mm-evk-pcie-ep-dtbs += imx8mm-evk.dtb imx-pcie0-ep.dtbo
124 imx8mm-evkb-pcie-ep-dtbs += imx8mm-evkb.dtb imx-pcie0-ep.dtbo
296 imx8mp-evk-pcie-ep-dtbs += imx8mp-evk.dtb imx-pcie0-ep.dtbo
360 imx8qxp-mek-pcie-ep-dtbs += imx8qxp-mek.dtb imx-pcie0-ep.dtbo
408 imx95-15x15-evk-pcie0-ep-dtbs = imx95-15x15-evk.dtb imx-pcie0-ep.dtbo
409 dtb-$(CONFIG_ARCH_MXC) += imx95-15x15-evk-pcie0-ep.dtb
410 imx95-19x19-evk-pcie0-ep-dtbs += imx95-19x19-evk.dtb imx-pcie0-ep.dtbo
412 dtb-$(CONFIG_ARCH_MXC) += imx95-19x19-evk-pcie0-ep.dtb imx95-19x19-evk-pcie1-ep.dtb
H A Dimx-pcie0-ep.dtso9 &pcie0 {
H A Dimx8mm-iot-gateway.dts100 pcie0_refclk: clock-pcie0-refclk {
137 &pcie0 {
H A Dimx8mm-venice-gw71xx.dtsi37 pcie0_refclk: pcie0-refclk {
113 &pcie0 {
/linux/arch/sh/drivers/pci/
H A Dpcie-sh7786.c44 .name = "PCIe0 MEM 0",
49 .name = "PCIe0 MEM 1",
54 .name = "PCIe0 MEM 2",
59 .name = "PCIe0 IO",
585 * Depending on the MMSELR register value, the PCIe0 MEM 1 in sh7786_pcie_init()
/linux/arch/arm64/boot/dts/rockchip/
H A Drk3399-khadas-edge-v.dts27 &pcie0 {
H A Drk3399-khadas-edge-captain.dts27 &pcie0 {

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