| /freebsd/sys/dev/puc/ |
| H A D | puc_cfg.h | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
35 #define PUC_PORT_1P 1 /* 1 parallel port */
37 #define PUC_PORT_1S1P 3 /* 1 serial + 1 parallel ports */
38 #define PUC_PORT_1S2P 4 /* 1 serial + 2 parallel ports */
39 #define PUC_PORT_2P 5 /* 2 parallel ports */
40 #define PUC_PORT_2S 6 /* 2 serial ports */
41 #define PUC_PORT_2S1P 7 /* 2 serial + 1 parallel ports */
42 #define PUC_PORT_3S 8 /* 3 serial ports */
43 #define PUC_PORT_4S 9 /* 4 serial ports */
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| /freebsd/sys/contrib/device-tree/Bindings/media/i2c/ |
| H A D | st,st-mipid02.txt | 1 STMicroelectronics MIPID02 CSI-2 to PARALLEL bridge
3 MIPID02 has two CSI-2 input ports, only one of those ports can be active at a
4 time. Active port input stream will be de-serialized and its content outputted
5 through PARALLEL output port.
6 CSI-2 first input port is a dual lane 800Mbps per lane whereas CSI-2 second
7 input port is a single lane 800Mbps. Both ports support clock and data lane
9 PARALLEL output port has a maximum width of 12 bits.
11 YUV420 8-bit, YUV422 8-bit and YUV420 10-bit.
14 - compatible: shall be "st,st-mipid02"
15 - clocks: reference to the xclk input clock.
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| H A D | toshiba,tc358746.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schema
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| H A D | st,st-mipid02.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/i2c/st,st-mipid0
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| H A D | adv7180.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lars-Peter Clausen <lars@metafoo.de>
14 digital interfaces like MIPI CSI-2 or parallel video.
19 - enum:
20 - adi,adv7180
21 - adi,adv7180cp
22 - adi,adv7180st
23 - adi,adv7182
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| /freebsd/sys/contrib/device-tree/Bindings/soc/fsl/cpm_qe/qe/ |
| H A D | par_io.txt | 1 * Parallel I/O Ports
3 This node configures Parallel I/O ports for CPUs with QE support.
5 device that using parallel I/O ports, a child node should be created.
10 - device_type : should be "par_io".
11 - reg : offset to the register set and its length.
12 - num-ports : number of Parallel I/O ports
17 #address-cells = <1>;
18 #size-cells = <0>;
20 num-ports = <7>;
27 via its own gpio-controller node:
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| /freebsd/sys/contrib/device-tree/Bindings/media/ |
| H A D | microchip,csi2dc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Eugen Hristev <eugen.hristev@microchip.com>
13 CSI2DC - Camera Serial Interface 2 Demux Controller
16 IDI interface or from a parallel bus interface.
19 clock domain towards a parallel interface that can be read by a sensor
23 a parallel interface.
30 32-bit IDI interface or a parallel interface.
32 CSI2DC supports one 'port' node as source port with parallel interface.
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| H A D | samsung-fimc.txt | 2 ----------------------------------------------
4 The S5P/Exynos SoC Camera subsystem comprises of multiple sub-devices
6 the S5P SoCs series known as CAMIF), MIPI CSIS, FIMC-LITE and FIMC-IS (ISP).
8 The sub-subdevices are defined as child nodes of the common 'camera' node which
10 any single sub-device, like common camera port pins or the CAMCLK clock outputs
14 --------------------
18 - compatible: must be "samsung,fimc", "simple-bus"
19 - clocks: list of clock specifiers, corresponding to entries in
20 the clock-names property;
21 - clock-names : must contain "sclk_cam0", "sclk_cam1", "pxl_async0",
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| H A D | allwinner,sun6i-a31-csi.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/media/allwinner,sun6i-a31-csi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
16 - allwinner,sun6i-a31-csi
17 - allwinner,sun8i-a83t-csi
18 - allwinner,sun8i-h3-csi
19 - allwinner,sun8i-v3s-csi
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| H A D | imx.txt | 5 ---------------------------
12 - compatible : "fsl,imx-capture-subsystem";
13 - ports : Should contain a list of phandles pointing to camera
14 sensor interface ports of IPU devices
18 capture-subsystem {
19 compatible = "fsl,imx-capture-subsystem";
20 ports = <&ipu1_csi0>, <&ipu1_csi1>;
25 --------------
27 This is the device node for the MIPI CSI-2 Receiver core in the i.MX
28 SoC. This is a Synopsys Designware MIPI CSI-2 host controller core
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| H A D | renesas,vin.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Renesas R-Car Video Input (VIN)
11 - Niklas Söderlund <niklas.soderlund@ragnatech.se>
14 The R-Car Video Input (VIN) device provides video input capabilities for the
15 Renesas R-Car family of devices.
17 Each VIN instance has a single parallel input that supports RGB and YUV video,
20 on Gen3 and RZ/G2 platforms to a CSI-2 receiver.
25 - items:
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| H A D | renesas,rzg2l-cru.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/media/renesas,rzg2l-cru.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
15 color space conversion, LUT, pixel format conversion, etc. An MIPI CSI-2 input and
16 parallel (including ITU-R BT.656) input are provided as the image sensor interface.
21 - enum:
22 - renesas,r9a07g043-cru # RZ/G2UL
23 - renesas,r9a07g044-cru # RZ/G2{L,LC}
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| /freebsd/sys/contrib/device-tree/Bindings/display/bridge/ |
| H A D | thine,thc63lvd1024.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jacopo Mondi <jacopo+renesas@jmondi.org>
11 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
15 streams to parallel data outputs. The chip supports single/dual input/output
27 ports:
28 $ref: /schemas/graph.yaml#/properties/ports
34 even-numbered pixels are received on port@0 and odd-numbered pixels on
39 mode pixels are output from both CMOS/TTL ports and both port@2 and
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| H A D | nxp,tda998x.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schema
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| H A D | lvds-codec.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/lvds-codec.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
16 LVDS is a physical layer specification defined in ANSI/TIA/EIA-644-A. Multiple
21 [JEIDA] "Digital Interface Standards for Monitor", JEIDA-59-1999, February
28 Those devices have been marketed under the FPD-Link and FlatLink brand names
34 - items:
35 - enum:
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| H A D | fsl,imx8mp-hdmi-tx.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/fsl,imx8mp-hdmi-tx.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lucas Stach <l.stach@pengutronix.de>
17 - $ref: /schemas/display/bridge/synopsys,dw-hdmi.yaml#
22 - fsl,imx8mp-hdmi-tx
24 reg-io-width:
30 clock-names:
32 - const: iahb
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| /freebsd/sys/contrib/device-tree/Bindings/pinctrl/ |
| H A D | abilis,tb10x-iomux.txt | 5 -------------------
7 - compatible: should be "abilis,tb10x-iomux";
8 - reg: should contain the physical address and size of the pin controller's
13 --------------------
15 Functions are defined (and referenced) by sub-nodes of the pin controller.
16 Every sub-node defines exactly one function (implying a set of pins).
19 controller sub-nodes.
22 - abilis,function: should be set to the name of the function's pin group.
25 - GPIO ports: gpioa, gpiob, gpioc, gpiod, gpioe, gpiof, gpiog,
27 - Serial TS input ports: mis0, mis1, mis2, mis3, mis4, mis5, mis6, mis7
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| /freebsd/sys/contrib/device-tree/Bindings/display/imx/ |
| H A D | fsl,imx8mp-hdmi-pvi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/imx/fsl,imx8mp-hdmi-pvi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale i.MX8MP HDMI Parallel Video Interface
10 - Lucas Stach <l.stach@pengutronix.de>
13 The HDMI parallel video interface is a timing and sync generator block in the
18 const: fsl,imx8mp-hdmi-pvi
26 power-domains:
29 ports:
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| H A D | fsl-imx-drm.txt | 8 - compatible: Should be "fsl,imx-display-subsystem"
9 - ports: Should contain a list of phandles pointing to display interface ports
14 display-subsystem {
15 compatible = "fsl,imx-display-subsystem";
16 ports = <&ipu_di0>;
24 - compatible: Should be "fsl,<chip>-ipu" where <chip> is one of
25 - imx51
26 - imx53
27 - imx6q
28 - imx6qp
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| /freebsd/share/man/man4/ |
| H A D | lpt.4 | 45 One purpose of this port was to allow parallel port sharing with other
46 parallel devices.
49 lpt is now arch-independent thanks to the ppbus interface.
54 The parallel port bus is allocated by lpt when the printer device is opened
58 The driver can be configured to be either interrupt-driven, or
60 Ports that are configured to be
61 interrupt-driven can be switched to polled mode by using the
77 .Bl -tag -width Pa -compact
79 first parallel port driver
89 There are lots of them, especially in cheap parallel port implementations.
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| /freebsd/sys/dev/ppc/ |
| H A D | ppcreg.h | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2001 Alcove - Nicolas Souchu
36 * Parallel Port Chipset type.
53 * Parallel Port Chipset Type. SMC versus GENERIC (others)
59 * Generic structure to hold parallel port chipset info.
101 int ppc_base; /* parallel port base address */
107 device_t ppbus; /* parallel port chipset corresponding ppbus */
120 #define PPC_LOCK(data) mtx_lock(&(data)->ppc_lock)
121 #define PPC_UNLOCK(data) mtx_unlock(&(data)->ppc_lock)
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| /freebsd/sys/contrib/device-tree/Bindings/display/tegra/ |
| H A D | nvidia,tegra20-vip.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-vip.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra VIP (parallel video capture) controller
10 - Luca Ceresoli <luca.ceresoli@bootlin.com>
15 - nvidia,tegra20-vip
17 ports:
18 $ref: /schemas/graph.yaml#/properties/ports
32 - port@0
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| /freebsd/sys/contrib/device-tree/Bindings/ata/ |
| H A D | pata-common.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/ata/pata-commo
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| /freebsd/sys/contrib/device-tree/src/arm/gemini/ |
| H A D | gemini-wbd222.dts | 1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree file for Wiliboard WBD-222
6 /dts-v1/;
9 #include <dt-bindings/input/input.h>
12 model = "Wiliboard WBD-222";
13 compatible = "wiligear,wiliboard-wbd222", "cortina,gemini";
14 #address-cells = <1>;
15 #size-cells = <1>;
24 stdout-path = &uart0;
28 compatible = "gpio-keys";
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| /freebsd/sys/contrib/device-tree/Bindings/net/dsa/ |
| H A D | renesas,rzn1-a5psw.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/dsa/renesas,rzn1-a5ps
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