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/linux/Documentation/devicetree/bindings/memory-controllers/
H A Darm,pl172.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/arm,pl172.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Frank Li <Frank.Li@nxp.com>
18 - arm,pl172
19 - arm,pl175
20 - arm,pl176
22 - compatible
27 - enum:
[all …]
H A Dti,gpmc-child.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/ti,gpmc-child.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Tony Lindgren <tony@atomide.com>
11 - Roger Quadros <rogerq@kernel.org>
24 gpmc,sync-clk-ps:
25 description: Minimum clock period for synchronous mode
28 # Chip-select signal timings corresponding to GPMC_CONFIG2:
29 gpmc,cs-on-ns:
[all …]
H A Dst,stm32-fmc2-ebi-props.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/st,stm32-fmc2-ebi-props.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Christophe Kerello <christophe.kerello@foss.st.com>
11 - Marek Vasut <marex@denx.de>
14 st,fmc2-ebi-cs-transaction-type:
17 0: Asynchronous mode 1 SRAM/FRAM.
18 1: Asynchronous mode 1 PSRAM.
19 2: Asynchronous mode A SRAM/FRAM.
[all …]
/linux/drivers/net/dsa/qca/
H A Dqca8k-8xxx.c1 // SPDX-License-Identifier: GPL-2.0
4 * Copyright (C) 2011-2012 Gabor Juhos <juhosg@openwrt.org>
28 qca8k_split_addr(u32 regaddr, u16 *r1, u16 *r2, u16 *page) in qca8k_split_addr() argument
37 *page = regaddr & 0x3ff; in qca8k_split_addr()
47 ret = bus->write(bus, phy_id, regnum, lo); in qca8k_mii_write_lo()
49 dev_err_ratelimited(&bus->dev, in qca8k_mii_write_lo()
62 ret = bus->write(bus, phy_id, regnum, hi); in qca8k_mii_write_hi()
64 dev_err_ratelimited(&bus->dev, in qca8k_mii_write_hi()
75 ret = bus->read(bus, phy_id, regnum); in qca8k_mii_read_lo()
83 dev_err_ratelimited(&bus->dev, in qca8k_mii_read_lo()
[all …]
/linux/include/linux/platform_data/
H A Dgpmc-omap.h1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 2014 Texas Instruments, Inc. - https://www.ti.com
31 /* Minimum clock period for synchronous mode (in picoseconds) */
34 /* Chip-select signal timings corresponding to GPMC_CS_CONFIG2 */
36 u32 cs_rd_off; /* Read deassertion time */
41 u32 adv_rd_off; /* Read deassertion time */
44 u32 adv_aad_mux_rd_off; /* ADV read deassertion time for AAD */
58 u32 page_burst_access; /* Multiple access word delay */
59 u32 access; /* Start-cycle to first data valid delay */
60 u32 rd_cycle; /* Total read cycle time */
[all …]
/linux/include/linux/
H A Drmi.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (c) 2011-2016 Synaptics Incorporated
21 * struct rmi_2d_axis_alignment - target axis alignment
22 * @swap_axes: set to TRUE if desired to swap x- and y-axis
23 * @flip_x: set to TRUE if desired to flip direction on x-axis
24 * @flip_y: set to TRUE if desired to flip direction on y-axis
25 * @clip_x_low - reported X coordinates below this setting will be clipped to
27 * @clip_x_high - reported X coordinates above this setting will be clipped to
29 * @clip_y_low - reported Y coordinates below this setting will be clipped to
31 * @clip_y_high - reported Y coordinates above this setting will be clipped to
[all …]
H A Dfsl_ifc.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
21 * - IFC version 1.0 implements 4 banks.
22 * - IFC version 1.1 onward implements 8 banks.
35 * CSPR - Chip Select Property Register
69 (__ilog2(n) - IFC_AMASK_SHIFT))
90 /* Page Size 512b, 2k, 4k */
110 #define CSOR_NAND_PB(n) ((__ilog2(n) - 5) << CSOR_NAND_PB_SHIFT)
111 /* Time for Read Enable High to Output High Impedance */
123 * Chip Select Option Register - NOR Flash Mode
125 /* Enable Address shift Mode */
[all …]
/linux/drivers/net/ethernet/8390/
H A D8390.h1 /* SPDX-License-Identifier: GPL-1.0+ */
6 * under the same license. Auto-loading of 8390.o only in v2.2 - Paul G.
21 /* The 8390 specific per-packet-header format. */
34 /* Without I/O delay - non ISA or later chips */
52 /* With I/O delay form */
70 /* You have one of these per-board */
85 unsigned word16:1; /* We have the 16-bit (vs 8-bit)
88 unsigned bigendian:1; /* 16-bit big endian mode. Do NOT
95 unsigned char current_page; /* Read pointer in buffer */
98 short tx1, tx2; /* Packet lengths for ping-pong tx. */
[all …]
/linux/drivers/mtd/nand/raw/
H A Dnand_legacy.c1 // SPDX-License-Identifier: GPL-2.0
4 * 2002-2006 Thomas Gleixner (tglx@linutronix.de)
10 * rework for 2K page size chips
16 #include <linux/delay.h>
23 * nand_read_byte - [DEFAULT] read one byte from the chip
26 * Default read function for 8bit buswidth
30 return readb(chip->legacy.IO_ADDR_R); in nand_read_byte()
34 * nand_read_byte16 - [DEFAULT] read one byte endianness aware from the chip
37 * Default read function for 16bit buswidth with endianness conversion.
42 return (uint8_t) cpu_to_le16(readw(chip->legacy.IO_ADDR_R)); in nand_read_byte16()
[all …]
H A Dmarvell_nand.c1 // SPDX-License-Identifier: GPL-2.0
6 * Author: Miquel RAYNAL <miquel.raynal@free-electrons.com>
17 * The ECC layouts are depicted in details in Marvell AN-379, but here
25 * there are at most 2 bitflips. Here is the page layout used by the
28 * +-------------------------------------------------------------+
30 * +-------------------------------------------------------------+
35 * not align with the page (data + OOB) size. ECC bytes are always
36 * 30B per ECC chunk. Here is the page layout used by the controller
39 * +-----------------------------------------
41 * +-----------------------------------------
[all …]
H A Dcadence-nand-controller.c1 // SPDX-License-Identifier: GPL-2.0+
12 #include <linux/dma-mapping.h>
26 * - PIO - can work in master or slave DMA
27 * - CDMA - needs Master DMA for accessing command descriptors.
28 * - Generic mode - can use only slave DMA.
30 * Generic mode can be used to execute any command
31 * on NAND flash memory. Driver uses CDMA mode for
32 * block erasing, page reading, page programing.
33 * Generic mode is used for executing rest of commands.
105 /* Offset value from the beginning of the page. */
[all …]
/linux/Documentation/accounting/
H A Ddelay-accounting.rst2 Delay accounting
9 The per-task delay accounting functionality measures
18 g) write-protect copy
29 delay statistics aggregated for all tasks (or threads) belonging to a
34 aggregate delay statistics into arbitrary groups. To enable this, delay
40 ---------
42 Delay accounting uses the taskstats interface which is described
44 generic data structure to userspace corresponding to per-pid and per-tgid
45 statistics. The delay accounting functionality populates specific fields of
50 for a description of the fields pertaining to delay accounting.
[all …]
/linux/drivers/input/rmi4/
H A Drmi_spi.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2011-2016 Synaptics Incorporated
41 int page; member
55 struct spi_device *spi = rmi_spi->spi; in rmi_spi_manage_pools()
56 int buf_size = rmi_spi->xfer_buf_size in rmi_spi_manage_pools()
57 ? rmi_spi->xfer_buf_size : RMI_SPI_DEFAULT_XFER_BUF_SIZE; in rmi_spi_manage_pools()
68 tmp = rmi_spi->rx_buf; in rmi_spi_manage_pools()
69 buf = devm_kcalloc(&spi->dev, buf_size, 2, in rmi_spi_manage_pools()
72 return -ENOMEM; in rmi_spi_manage_pools()
74 rmi_spi->rx_buf = buf; in rmi_spi_manage_pools()
[all …]
/linux/drivers/staging/gpib/eastwood/
H A Dfluke_gpib.h1 /* SPDX-License-Identifier: GPL-2.0 */
11 #include <linux/delay.h>
40 /* IMR0 -- Interrupt Mode Register 0 */
45 /* ISR0 -- Interrupt Status Register 0 */
53 SOURCE_HANDSHAKE_SDYS_BITS = 0x2, /* source delay state */
66 static inline int cb7210_page_in_bits(unsigned int page) in cb7210_page_in_bits() argument
68 return 0x50 | (page & 0xf); in cb7210_page_in_bits()
71 // don't use without locking nec_priv->register_page_lock
77 retval = readl(nec_priv->mmiobase + register_num * nec_priv->offset); in fluke_read_byte_nolock()
81 // don't use without locking nec_priv->register_page_lock
[all …]
/linux/drivers/hwmon/pmbus/
H A Dzl6100.c1 // SPDX-License-Identifier: GPL-2.0-or-later
17 #include <linux/delay.h>
53 static ushort delay = ZL6100_WAIT_TIME; variable
54 module_param(delay, ushort, 0644);
55 MODULE_PARM_DESC(delay, "Delay between chip accesses in uS");
57 /* Convert linear sensor value to milli-units */
69 /* scale result to milli-units */ in zl6100_l2d()
75 val >>= -exponent; in zl6100_l2d()
94 val = -val; in zl6100_d2l()
103 while (val < MIN_MANTISSA && exponent > -15) { in zl6100_d2l()
[all …]
/linux/arch/powerpc/platforms/pseries/
H A Dcmm.c1 // SPDX-License-Identifier: GPL-2.0-or-later
10 #include <linux/delay.h>
39 #define KB2PAGES(_p) ((_p)>>(PAGE_SHIFT-10))
40 #define PAGES2KB(_p) ((_p)<<(PAGE_SHIFT-10))
44 static unsigned int delay = CMM_DEFAULT_DELAY; variable
59 module_param_named(delay, delay, uint, 0644);
60 MODULE_PARM_DESC(delay, "Delay (in seconds) between polls to query hypervisor paging requests. "
63 MODULE_PARM_DESC(hotplug_delay, "Delay (in seconds) after memory hotplug remove "
76 MODULE_PARM_DESC(simulate, "Enable simulation mode (no communication with hw).");
90 static long plpar_page_set_loaned(struct page *page) in plpar_page_set_loaned() argument
[all …]
/linux/drivers/memory/
H A Dpl172.c1 // SPDX-License-Identifier: GPL-2.0
9 * TI AEMIF driver, Copyright (C) 2010 - 2013 Texas Instruments Inc.
65 cycles = DIV_ROUND_UP(val * pl172->rate, NSEC_PER_MSEC) - start; in pl172_timing_prop()
69 dev_err(&adev->dev, "%s timing too tight\n", name); in pl172_timing_prop()
70 return -EINVAL; in pl172_timing_prop()
73 writel(cycles, pl172->base + reg_offset); in pl172_timing_prop()
76 dev_dbg(&adev->dev, "%s: %u cycle(s)\n", name, start + in pl172_timing_prop()
77 readl(pl172->base + reg_offset)); in pl172_timing_prop()
90 if (!of_property_read_u32(np, "mpmc,memory-width", &cfg)) { in pl172_setup_static()
98 dev_err(&adev->dev, "invalid memory width cs%u\n", cs); in pl172_setup_static()
[all …]
/linux/drivers/media/i2c/
H A Dtda1997x_regs.h1 /* SPDX-License-Identifier: GPL-2.0 */
6 /* Page 0x00 - General Control */
140 /* Service Mode */
165 #define RT_MAN_CTRL_RT_B BIT(1) /* enable TMDS pull-up on Input B */
166 #define RT_MAN_CTRL_RT_A BIT(0) /* enable TMDS pull-up on Input A */
212 #define PCLK_DELAY_SHIFT 4 /* Pixel delay (-8..+7) */
227 /* Page 0x01 - HDMI info and packets */
244 #define HDMI_FLAGS_AUD_FIFO_OF BIT(1) /* FIFO read/write pointers crossed */
245 #define HDMI_FLAGS_AUD_FIFO_LOW BIT(0) /* FIFO read ptr within 2 of write */
247 /* Page 0x12 - HDMI Extra control and debug */
[all …]
/linux/drivers/mtd/devices/
H A Ddocg3.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Handles the M-Systems DiskOnChip G3 chip
16 #include <linux/delay.h>
32 * As no specification is available from M-Systems/Sandisk, this drivers lacks
34 * - IPL write
40 * - a 1 byte Hamming code stored in the OOB for each page
41 * - a 7 bytes BCH code stored in the OOB for each page
43 * - BCH is in GF(2^14)
44 * - BCH is over data of 520 bytes (512 page + 7 page_info bytes
46 * - BCH can correct up to 4 bits (t = 4)
[all …]
/linux/drivers/edac/
H A Dr82600_edac.c14 * www.radisys.com/files/support_downloads/007-01277-0002.82600DataBook.pdf
38 * registered and unbuffered DIMMs as well as mixing of ECC and non-ECC DIMMs
49 /* Radisys 82600 register addresses - device 0 function 0 - PCI bridge */
54 * 6 Flash Page Mode Enable
70 * 7:5 Special SDRAM Mode Select
75 * write cycles (i.e. ECC test mode)
83 * 1 RAS# to CAS# Delay 0=3 1=2
91 * 0=Scrub on corrected read
92 * 1=Don't scrub on corrected read
108 * read 1=MBE at EAP (see above)
[all …]
/linux/drivers/net/ethernet/realtek/
H A Datp.h1 /* SPDX-License-Identifier: GPL-2.0 */
12 ushort rx_status; /* Unknown bit assignments :-<. */
29 #define WrAddr 0x40 /* Set address of EPLC read, write register. */
43 MODSEL = 14, /* Mode select register. */
72 #define CMR2_EEPROM 12 /* Set to page 1, for reading the EEPROM. */
74 #define CMR2h_OFF 0 /* No accept mode. */
77 #define CMR2h_PROMISC 3 /* Promiscuous mode. */
90 /* Read register OFFSET.
99 inbyte(port + PAR_STATUS); /* Settling time delay */ in read_nibble()
106 /* Functions for bulk data read. The interrupt line is always disabled. */
[all …]
/linux/Documentation/admin-guide/
H A Dkernel-parameters.txt16 force -- enable ACPI if default was off
17 on -- enable ACPI but allow fallback to DT [arm64,riscv64]
18 off -- disable ACPI if default was on
19 noirq -- do not use ACPI for IRQ routing
20 strict -- Be less tolerant of platforms that are not
22 rsdt -- prefer RSDT over (default) XSDT
23 copy_dsdt -- copy DSDT to memory
24 nocmcff -- Disable firmware first mode for corrected
28 nospcr -- disable console in ACPI SPCR table as
45 If set to vendor, prefer vendor-specific driver
[all …]
/linux/include/linux/mtd/
H A Donfi.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright © 2000-2010 David Woodhouse <dwmw2@infradead.org>
32 /* ONFI timing mode, used in both asynchronous and synchronous mode */
49 /* Vendor-specific feature address (Micron) */
149 /* Extended Parameter Page Definition (since ONFI 2.1) */
157 * The actual size of the Extended Parameter Page is in
165 * struct onfi_params - ONFI specific parameters that will be reused
167 * @tPROG: Page program time
169 * @tR: Page read time
171 * @fast_tCAD: Command/Address/Data slow or fast delay (NV-DDR only)
[all …]
/linux/drivers/input/mouse/
H A Delan_i2c_smbus.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Elan I2C/SMBus Touchpad driver - SMBus interface
10 * copyright (c) 2011-2012 Cypress Semiconductor, Inc.
11 * copyright (c) 2011-2012 Google, Inc.
16 #include <linux/delay.h>
64 dev_err(&client->dev, "hello packet length fail: %d\n", len); in elan_smbus_initialize()
65 error = len < 0 ? len : -EIO; in elan_smbus_initialize()
71 dev_err(&client->dev, "hello packet fail [%*ph]\n", in elan_smbus_initialize()
73 return -ENXIO; in elan_smbus_initialize()
79 dev_err(&client->dev, "failed to enable touchpad: %d\n", error); in elan_smbus_initialize()
[all …]
/linux/drivers/net/phy/
H A Dmicrochip.c1 // SPDX-License-Identifier: GPL-2.0+
11 #include <linux/delay.h>
13 #include <dt-bindings/net/microchip-lan78xx.h>
35 static int lan88xx_write_page(struct phy_device *phydev, int page) in lan88xx_write_page() argument
37 return __phy_write(phydev, LAN88XX_EXT_PAGE_ACCESS, page); in lan88xx_write_page()
42 struct lan88xx_priv *priv = phydev->priv; in lan88xx_suspend()
45 if (!priv->wolopts) in lan88xx_suspend()
57 /* Save current page */ in lan88xx_TR_reg_set()
60 phydev_warn(phydev, "Failed to get current page\n"); in lan88xx_TR_reg_set()
64 /* Switch to TR page */ in lan88xx_TR_reg_set()
[all …]

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