Home
last modified time | relevance | path

Searched full:p4080 (Results 1 – 25 of 27) sorted by relevance

12

/linux/arch/powerpc/boot/dts/fsl/
H A Dp4080si-post.dtsi2 * P4080/P4040 Silicon/SoC Device Tree Source (post include)
51 compatible = "fsl,p4080-elbc", "fsl,elbc", "simple-bus";
59 compatible = "fsl,p4080-pcie", "fsl,qoriq-pcie-v2.1";
88 compatible = "fsl,p4080-pcie", "fsl,qoriq-pcie-v2.1";
117 compatible = "fsl,p4080-pcie", "fsl,qoriq-pcie-v2.1";
174 compatible = "fsl,p4080-dcsr-epu", "fsl,dcsr-epu";
193 compatible = "fsl,p4080-dcsr-dpaa", "fsl,dcsr-dpaa";
197 compatible = "fsl,p4080-dcsr-ocn", "fsl,dcsr-ocn";
211 compatible = "fsl,p4080-dcsr-nal", "fsl,dcsr-nal";
215 compatible = "fsl,p4080-dcsr-rcpm", "fsl,dcsr-rcpm";
[all …]
H A Dp4080si-pre.dtsi2 * P4080/P4040 Silicon/SoC Device Tree Source (pre include)
40 compatible = "fsl,P4080";
H A Dp3041si-post.dtsi289 compatible = "fsl,p3041-l3-cache-controller", "fsl,p4080-l3-cache-controller", "cache";
H A Dp2041si-post.dtsi262 compatible = "fsl,p2041-l3-cache-controller", "fsl,p4080-l3-cache-controller", "cache";
H A Dp5020si-post.dtsi292 compatible = "fsl,p5020-l3-cache-controller", "fsl,p4080-l3-cache-controller", "cache";
H A Dp5040si-post.dtsi247 compatible = "fsl,p5040-l3-cache-controller", "fsl,p4080-l3-cache-controller", "cache";
/linux/Documentation/devicetree/bindings/crypto/
H A Dfsl,sec-v4.0.yaml26 such as the P4080. The number of simultaneous dequeues the QI can make is
28 SEC version. E.g., the SEC 4.0 in the P4080 has 5 DECOs and can thus
34 in the memory partition devoted to a particular core. The P4080 has 4 JRs, so
/linux/Documentation/devicetree/bindings/powerpc/fsl/
H A Ddcsr.txt224 compatible = "fsl,p4080-dcsr-dpaa", "fsl,dcsr-dpaa";
252 compatible = "fsl,p4080-dcsr-ocn", "fsl,dcsr-ocn";
312 compatible = "fsl,p4080-dcsr-nal", "fsl,dcsr-nal";
342 compatible = "fsl,p4080-dcsr-rcpm", "fsl,dcsr-rcpm";
H A Dccf.txt15 Example chips: P5040, P5020, P4080, P3041, P2041
H A Dsrio.txt63 For HW (ie, the P4080) that only supports a LIODN for both
H A Dmpic.txt228 compatible = "fsl,p4080-memory-controller";
H A Ddma.txt71 mpc8540, mpc8641 p4080, bsc9131 etc.
/linux/Documentation/devicetree/bindings/clock/
H A Dfsl,qoriq-clock.yaml25 1.0 p4080, p5020, p5040
40 - fsl,p4080-clockgen
/linux/Documentation/devicetree/bindings/net/
H A Dfsl,fman.yaml40 - P2041, P3041, P4080 P5020, P5040:
45 (Second FM available only in P4080 and P5040)
/linux/Documentation/devicetree/bindings/mmc/
H A Dfsl,esdhc.yaml23 - fsl,p4080-esdhc
/linux/Documentation/devicetree/bindings/soc/fsl/
H A Dfsl,rcpm.yaml23 - fsl,p4080-rcpm
/linux/arch/powerpc/platforms/85xx/
H A Dcommon.c40 { .compatible = "fsl,p4080-pcie", },
H A Dcorenet_generic.c77 .compatible = "fsl,p4080-pcie",
H A DKconfig282 P2041 RDB, P3041 DS, P4080 DS, kmcoge4, and OCA4080
/linux/drivers/iommu/
H A Dfsl_pamu.c56 * "fsl,p4080-l3-cache-controller" corresponds to other,
62 { .compatible = "fsl,p4080-l3-cache-controller", },
734 {(SVR_P4080 << 8) | 0x20, 0xFFF80000}, /* P4080 2.0 */
/linux/drivers/clk/
H A Dclk-qoriq.c728 .compat = "fsl,p4080-clockgen",
1460 (SVR_P4080 << 8) | 0x20, /* P4080 2.0 */
1603 CLK_OF_DECLARE(qoriq_clockgen_p4080, "fsl,p4080-clockgen", clockgen_init);
/linux/Documentation/networking/device_drivers/ethernet/freescale/
H A Ddpaa.rst101 - P4080
/linux/drivers/soc/fsl/qbman/
H A Dqman_ccsr.c753 dev_err(dev, "Rev1.0 on P4080 rev1 is not supported!\n"); in fsl_qman_probe()
/linux/arch/powerpc/sysdev/
H A Dfsl_pci.c1116 { .compatible = "fsl,p4080-pcie", },
/linux/drivers/mmc/host/
H A Dsdhci-of-esdhc.c1481 of_device_is_compatible(np, "fsl,p4080-esdhc") || in sdhci_esdhc_probe()

12