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/freebsd/sys/contrib/device-tree/src/arm64/nvidia/
H A Dtegra234-p3740-0002+p3701-0008.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/linux-event-codes.h>
5 #include <dt-bindings/input/gpio-keys.h>
6 #include "tegra234-p370
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H A Dtegra234-p3768-0000+p3767-0000.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/linux-event-codes.h>
5 #include <dt-bindings/input/gpio-keys.h>
7 #include "tegra234-p376
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H A Dtegra234-p3768-0000.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 compatible = "nvidia,p3768-0000";
11 stdout-path = "serial0:115200n8";
23 vcc-supply = <&vdd_1v8_sys>;
24 address-width = <8>;
27 read-only;
32 current-speed = <115200>;
37 assigned-clock
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H A Dtegra194-p2972-0000.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/linux-event-codes.h>
5 #include <dt-bindings/input/gpio-keys.h>
7 #include "tegra194-p2888.dtsi"
11 compatible = "nvidia,p2972-0000", "nvidia,tegra194";
24 #address-cells = <1>;
25 #size-cells = <0>;
31 remote-endpoint = <&xbar_i2s1_ep>;
35 i2s1_port: port@1 {
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H A Dtegra234-p3737-0000+p3701-0000.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/linux-event-codes.h>
5 #include <dt-bindings/input/gpio-keys.h>
7 #include "tegra234-p370
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H A Dtegra194-p3509-0000.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include <dt-bindings/gpio/tegra194-gpio.h>
4 #include <dt-bindings/input/linux-event-codes.h>
5 #include <dt-bindings/input/gpio-keys.h>
19 #address-cells = <1>;
20 #size-cells = <0>;
26 remote-endpoint = <&xbar_i2s3_ep>;
30 i2s3_port: port@1 {
31 reg = <1>;
34 dai-format = "i2s";
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H A Dtegra194.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra194-clock.h>
3 #include <dt-bindings/gpio/tegra194-gpio.h>
4 #include <dt-bindings/interrupt-controller/arm-gi
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H A Dtegra234.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include <dt-bindings/clock/tegra234-clock.h>
4 #include <dt-bindings/gpio/tegra234-gpio.h>
5 #include <dt-bindings/interrupt-controller/arm-gi
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/freebsd/sys/contrib/device-tree/Bindings/pci/
H A Dnvidia,tegra194-pcie-ep.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/nvidia,tegra194-pcie-ep.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
12 - Vidya Sagar <vidyas@nvidia.com>
16 inherits all the common properties defined in snps,dw-pcie-ep.yaml. Some
23 Note: On Tegra194's P2972-0000 platform, only C5 controller can be enabled to
29 - nvidia,tegra194-pcie-ep
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H A Dnvidia,tegra194-pcie.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/nvidia,tegra194-pcie.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
12 - Vidya Sagar <vidyas@nvidia.com>
16 inherits all the common properties defined in snps,dw-pcie.yaml. Some of
20 See nvidia,tegra194-pcie-ep.yaml for details on the Endpoint mode device
26 - nvidia,tegra194-pcie
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H A Dnvidia,tegra194-pcie.txt4 and thus inherits all the common properties defined in snps,dw-pcie.yaml and
5 snps,dw-pcie-ep.yaml.
10 - power-domains: A phandle to the node that controls power to the respective
20 "include/dt-bindings/power/tegra194-powergate.h" file.
21 - reg: A list of physical base address and length pairs for each set of
22 controller registers. Must contain an entry for each entry in the reg-names
24 - reg-names: Must include the following entries:
26 "config": As per the definition in snps,dw-pcie.yaml
32 - interrupts: A list of interrupt outputs of the controller. Must contain an
33 entry for each entry in the interrupt-names property.
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H A Dsnps,dw-pcie-common.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/snps,dw-pci
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/freebsd/sys/contrib/device-tree/Bindings/phy/
H A Dphy-tegra194-p2u.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/phy-tegra194-p2u.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra194 & Tegra234 P2U
10 - Thierry Reding <treding@nvidia.com>
14 Speed) each interfacing with 12 and 8 P2U instances respectively.
16 each interfacing with 8, 8 and 8 P2U instances respectively.
17 A P2U instance is a glue logic between Synopsys DesignWare Core PCIe IP's PIPE
18 interface and PHY of HSIO/NVHS/GBE bricks. Each P2U instance represents one
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/freebsd/share/doc/papers/timecounter/
H A Dtmac.usenix10 .nr * 0 1
20 .ev 1
50 . nr Ia \w\\$1\ \ u
58 \&\\$1\ \ \c
68 .nr Ic -0.2i
72 'sp |10.4i-\\n(FUu
74 'sp |10.4i-\\n(FUu \" how many traps could there be?
76 'sp |10.4i-\\n(FUu
95 . ev 1
98 ' nr QS 11i+0.5v-1u+\\nyu
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/freebsd/lib/msun/ld80/
H A Db_expl.c1 /*-
2 * SPDX-License-Identifier: BSD-3-Clause
10 * 1. Redistributions of source code must retain the above copyright
42 p0u = LD80C(0xaaaaaaaaaaaaaaab, -3, 1.66666666666666666671e-01L),
43 p1u = LD80C(0xb60b60b60b60b59a, -9, -2.77777777777777775377e-03L),
44 p2u = LD80C(0x8ab355e008a3cfce, -14, 6.61375661375629297465e-05L), variable
45 p3u = LD80C(0xddebbc994b0c1376, -20, -1.65343915327882529784e-06L),
46 p4u = LD80C(0xb354784cb4ef4c41, -25, 4.17535101591534118469e-08L),
47 p5u = LD80C(0x913e8a718382ce75, -30, -1.05679137034774806475e-09L),
48 p6u = LD80C(0xe8f0042aa134502e, -36, 2.64819349895429516863e-11L);
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H A Db_tgammal.c1 /*-
2 * SPDX-License-Identifier: BSD-3-Clause
10 * 1. Redistributions of source code must retain the above copyright
72 static const volatile double tiny = 1e-300;
77 * equal-ripples:
79 * log(G(x)) ~= (x-0.5)*(log(x)-1) + 0.5(log(2*pi)-1) + 1/x*P(1/(x*x))
81 * Keep extra precision in multiplying (x-.5)(log(x)-1), to avoid
82 * premature round-off.
84 * Accurate to max(ulp(1/128) absolute, 2^-66 relative) error.
88 * The following is a decomposition of 0.5 * (log(2*pi) - 1) into the
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