Home
last modified time | relevance | path

Searched full:osc_24m (Results 1 – 6 of 6) sorted by relevance

/linux/drivers/clk/imx/
H A Dclk-imx8mm.c28 static const char *pll_ref_sels[] = { "osc_24m", "dummy", "dummy", "dummy", };
39 static const char *imx8mm_a53_sels[] = {"osc_24m", "arm_pll_out", "sys_pll2_500m", "sys_pll2_1000m",
44 static const char *imx8mm_m4_sels[] = {"osc_24m", "sys_pll2_200m", "sys_pll2_250m", "sys_pll1_266m",
47 static const char *imx8mm_vpu_sels[] = {"osc_24m", "arm_pll_out", "sys_pll2_500m", "sys_pll2_1000m",
50 static const char *imx8mm_gpu3d_sels[] = {"osc_24m", "gpu_pll_out", "sys_pll1_800m", "sys_pll3_out",
53 static const char *imx8mm_gpu2d_sels[] = {"osc_24m", "gpu_pll_out", "sys_pll1_800m", "sys_pll3_out",
56 static const char *imx8mm_main_axi_sels[] = {"osc_24m", "sys_pll2_333m", "sys_pll1_800m", "sys_pll2…
59 static const char *imx8mm_enet_axi_sels[] = {"osc_24m", "sys_pll1_266m", "sys_pll1_800m", "sys_pll2…
62 static const char *imx8mm_nand_usdhc_sels[] = {"osc_24m", "sys_pll1_266m", "sys_pll1_800m", "sys_pl…
65 static const char *imx8mm_vpu_bus_sels[] = {"osc_24m", "sys_pll1_800m", "vpu_pll_out", "audio_pll2_…
[all …]
H A Dclk-imx8mn.c27 static const char * const pll_ref_sels[] = { "osc_24m", "dummy", "dummy", "dummy", };
37 static const char * const imx8mn_a53_sels[] = {"osc_24m", "arm_pll_out", "sys_pll2_500m",
43 static const char * const imx8mn_m7_sels[] = {"osc_24m", "sys_pll2_200m", "sys_pll2_250m", "m7_alt_…
46 static const char * const imx8mn_gpu_core_sels[] = {"osc_24m", "gpu_pll_out", "sys_pll1_800m",
50 static const char * const imx8mn_gpu_shader_sels[] = {"osc_24m", "gpu_pll_out", "sys_pll1_800m",
54 static const char * const imx8mn_main_axi_sels[] = {"osc_24m", "sys_pll2_333m", "sys_pll1_800m",
58 static const char * const imx8mn_enet_axi_sels[] = {"osc_24m", "sys_pll1_266m", "sys_pll1_800m",
62 static const char * const imx8mn_nand_usdhc_sels[] = {"osc_24m", "sys_pll1_266m", "sys_pll1_800m",
66 static const char * const imx8mn_disp_axi_sels[] = {"osc_24m", "sys_pll2_1000m", "sys_pll1_800m",
70 static const char * const imx8mn_disp_apb_sels[] = {"osc_24m", "sys_pll2_125m", "sys_pll1_800m",
[all …]
H A Dclk-imx8mp-audiomix.c87 { .fw_name = "osc_24m", .name = "osc_24m" },
192 CLK_GATE_PARENT("audpll", AUDPLL_ROOT, "osc_24m"),
/linux/drivers/rtc/
H A Drtc-amlogic-a4.c19 #define OSC_24M 24000000 macro
285 if (clk_get_rate(rtc->rtc_clk) == OSC_24M) { in aml_rtc_init()
355 if (clk_get_rate(rtc->rtc_clk) != OSC_32K && clk_get_rate(rtc->rtc_clk) != OSC_24M) in aml_rtc_probe()
/linux/Documentation/devicetree/bindings/clock/
H A Dimx93-clock.yaml38 - const: osc_24m
/linux/drivers/pmdomain/imx/
H A Dimx8mp-blk-ctrl.c162 init.parent_names = (const char *[]){"osc_24m"}; in imx8mp_hsio_blk_ctrl_probe()