Searched +full:opp +full:- +full:266000000 (Results 1 – 8 of 8) sorted by relevance
/linux/Documentation/devicetree/bindings/gpu/ |
H A D | arm,mali-midgard.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 4 $id: http://devicetree.org/schemas/gpu/arm,mali-midgard.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Rob Herring <robh@kernel.org> 14 pattern: '^gpu@[a-f0-9]+$' 17 - items: 18 - enum: 19 - samsung,exynos5250-mali 20 - const: arm,mali-t604 [all …]
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/linux/arch/arm/boot/dts/samsung/ |
H A D | exynos5422-odroid-core.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Hardkernel Odroid XU3/XU3-Lite/XU4/HC1 boards core device tree source 6 * Copyright (c) 2013-2017 Samsung Electronics Co., Ltd. 10 #include <dt-bindings/clock/samsung,s2mps11.h> 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/gpio/gpio.h> 14 #include "exynos5422-cpus.dtsi" 27 stdout-path = "serial2:115200n8"; 31 compatible = "samsung,secure-firmware"; 35 fixed-rate-clocks { [all …]
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H A D | exynos5250.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 17 #include <dt-bindings/clock/exynos5250.h> 19 #include "exynos4-cpu-thermal.dtsi" 20 #include <dt-bindings/clock/exynos-audss-clk.h> 46 #address-cells = <1>; 47 #size-cells = <0>; 49 cpu-map { 62 compatible = "arm,cortex-a15"; 65 clock-names = "cpu"; 66 operating-points-v2 = <&cpu0_opp_table>; [all …]
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H A D | exynos5420.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 14 #include <dt-bindings/clock/exynos5420.h> 15 #include <dt-bindings/clock/exynos-audss-clk.h> 16 #include <dt-bindings/interrupt-controller/arm-gic.h> 37 bus_disp1: bus-disp1 { 38 compatible = "samsung,exynos-bus"; 40 clock-names = "bus"; 44 bus_disp1_fimd: bus-disp1-fimd { 45 compatible = "samsung,exynos-bus"; 47 clock-names = "bus"; [all …]
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/linux/arch/arm/boot/dts/nvidia/ |
H A D | tegra20-peripherals-opp.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 4 core_opp_table: opp-table-core { 5 compatible = "operating-points-v2"; 6 opp-shared; 8 core_opp_950: opp-950000 { 9 opp-microvolt = <950000 950000 1300000>; 10 opp-level = <950000>; 13 core_opp_1000: opp-1000000 { 14 opp-microvolt = <1000000 1000000 1300000>; 15 opp-level = <1000000>; [all …]
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/linux/arch/arm/mach-omap2/ |
H A D | opp2xxx.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 3 * opp2xxx.h - macros for old-style OMAP2xxx "OPP" definitions 5 * Copyright (C) 2005-2009 Texas Instruments, Inc. 6 * Copyright (C) 2004-2009 Nokia Corporation 8 * Richard Woodruff <r-woodruff2@ti.com> 25 * OPP API exists, the data in this file should be converted to use it. 34 * struct prcm_config - define clock rates on a per-OPP basis (24xx) 40 * This is deprecated. As soon as we have a decent OPP API, we should 45 unsigned long dpll_speed; /* dpll: out*xtal*M/(N-1)table_recalc */ 64 /*------------------------------------------------------------------------- [all …]
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/linux/arch/arm/boot/dts/microchip/ |
H A D | sama7g5.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * sama7g5.dtsi - Device Tree Include file for SAMA7G5 family SoC 12 #include <dt-bindings/iio/adc/at91-sama5d2_adc.h> 13 #include <dt-bindings/interrupt-controller/irq.h> 14 #include <dt-bindings/interrupt-controller/arm-gic.h> 15 #include <dt-bindings/clock/at91.h> 16 #include <dt-bindings/dma/at91.h> 17 #include <dt-bindings/gpio/gpio.h> 18 #include <dt-bindings/mfd/at91-usart.h> 19 #include <dt-bindings/nvmem/microchip,sama7g5-otpc.h> [all …]
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/linux/arch/arm64/boot/dts/freescale/ |
H A D | imx8mn.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/imx8mn-clock.h> 7 #include <dt-bindings/power/imx8mn-power.h> 8 #include <dt-bindings/reset/imx8mq-reset.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/input/input.h> 11 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 #include <dt-bindings/thermal/thermal.h> 14 #include "imx8mn-pinfunc.h" 17 interrupt-parent = <&gic>; [all …]
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