| /linux/drivers/w1/slaves/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
3 # 1-wire slaves configuration
6 menu "1-wire Slaves"
11 Say Y here if you want to connect 1-wire thermal sensors to your
12 wire.
17 Say Y here if you want to connect 1-wire
18 simple 64bit memory rom(ds2401/ds2411/ds1990*) to your wire.
23 Say Y or M here if you want to use a DS2405 1-wire
24 single-channel addressable switch.
25 This device can also work as a single-channel
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| /linux/include/linux/mfd/ |
| H A D | motorola-cpcap.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
6 * Copyright (C) 2007-2009 Motorola, Inc.
186 #define CPCAP_REG_OWDC 0x0eb0 /* One Wire Device Control */
212 #define CPCAP_REG_OW1C 0x1200 /* One Wire 1 Command */
213 #define CPCAP_REG_OW1D 0x1204 /* One Wire 1 Data */
214 #define CPCAP_REG_OW1I 0x1208 /* One Wire 1 Interrupt */
215 #define CPCAP_REG_OW1IE 0x120c /* One Wire 1 Interrupt Enable */
217 #define CPCAP_REG_OW1 0x1214 /* One Wire 1 Control */
219 #define CPCAP_REG_OW2C 0x1220 /* One Wire 2 Command */
220 #define CPCAP_REG_OW2D 0x1224 /* One Wire 2 Data */
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| /linux/drivers/w1/masters/ |
| H A D | w1-uart.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * w1-uart - UART 1-Wire bus driver
5 * Uses the UART interface (via Serial Device Bus) to create the 1-Wire
6 * timing patterns. Implements the following 1-Wire master interface:
8 * - reset_bus: requests baud-rate 9600
10 * - touch_bit: requests baud-rate 115200
27 /* Timeout to wait for completion of serdev-receive */
31 * struct w1_uart_config - configuration for 1-Wire operation
32 * @baudrate: baud-rate returned from serdev
33 * @delay_us: delay to complete a 1-Wire cycle (in us)
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| H A D | sgi_w1.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * sgi_w1.c - w1 master driver for one wire support in SGI ASICs
13 #include <linux/platform_data/sgi-w1.h>
41 * reset the device on the One Wire interface
49 writel(MCR_PACK(520, 65), dev->mcr); in sgi_w1_reset_bus()
50 ret = sgi_w1_wait(dev->mcr); in sgi_w1_reset_bus()
56 * this is the low level routine to read/write a bit on the One Wire
66 writel(MCR_PACK(6, 13), dev->mcr); in sgi_w1_touch_bit()
68 writel(MCR_PACK(80, 30), dev->mcr); in sgi_w1_touch_bit()
70 ret = sgi_w1_wait(dev->mcr); in sgi_w1_touch_bit()
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| H A D | mxc_w1.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright 2005-2008 Freescale Semiconductor, Inc. All Rights Reserved.
22 # define MXC_W1_CONTROL_WR(x) BIT(5 - (x))
37 * reset the device on the One Wire interface
45 writeb(MXC_W1_CONTROL_RPP, dev->regs + MXC_W1_CONTROL); in mxc_w1_ds2_reset_bus()
53 u8 ctrl = readb(dev->regs + MXC_W1_CONTROL); in mxc_w1_ds2_reset_bus()
55 /* PST bit is valid after the RPP bit is self-cleared */ in mxc_w1_ds2_reset_bus()
64 * this is the low level routine to read/write a bit on the One Wire
73 writeb(MXC_W1_CONTROL_WR(bit), dev->regs + MXC_W1_CONTROL); in mxc_w1_ds2_touch_bit()
81 u8 ctrl = readb(dev->regs + MXC_W1_CONTROL); in mxc_w1_ds2_touch_bit()
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| /linux/Documentation/peci/ |
| H A D | peci.rst | 1 .. SPDX-License-Identifier: GPL-2.0-only
13 controller is acting as a PECI originator and the processor - as
15 PECI can be used in both single processor and multiple-processor based
24 PECI Wire
25 ---------
27 PECI Wire interface uses a single wire for self-clocking and data
28 transfer. It does not require any additional control lines - the
29 physical layer is a self-clocked one-wire bus signal that begins each
32 value is logic '0' or logic '1'. PECI Wire also includes variable data
35 For PECI Wire, each processor package will utilize unique, fixed
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| /linux/Documentation/w1/masters/ |
| H A D | w1-uart.rst | 1 .. SPDX-License-Identifier: GPL-2.0-or-later
4 Kernel driver w1-uart
11 -----------
13 UART 1-Wire bus driver. The driver utilizes the UART interface via the
14 Serial Device Bus to create the 1-Wire timing patterns as described in
15 the document `"Using a UART to Implement a 1-Wire Bus Master"`_.
17 …g a UART to Implement a 1-Wire Bus Master": https://www.analog.com/en/technical-articles/using-a-u…
19 In short, the UART peripheral must support full-duplex and operate in
20 open-drain mode. The timing patterns are generated by a specific
21 combination of baud-rate and transmitted byte, which corresponds to a
[all …]
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| /linux/Documentation/devicetree/bindings/w1/ |
| H A D | w1-uart.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/w1/w1-uart.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: UART 1-Wire Bus
10 - Christoph Winklhofer <cj.winklhofer@gmail.com>
13 UART 1-wire bus. Utilizes the UART interface via the Serial Device Bus
14 to create the 1-Wire timing patterns.
16 The UART peripheral must support full-duplex and operate in open-drain
18 baud-rate and transmitted byte, which corresponds to a 1-Wire read bit,
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|
| H A D | omap-hdq.txt | 1 * OMAP HDQ One wire bus master controller
4 - compatible : should be "ti,omap3-1w" or "ti,am4372-hdq"
5 - reg : Address and length of the register set for the device
6 - interrupts : interrupt line.
7 - ti,hwmods : "hdq1w"
10 - ti,mode: should be "hdq": HDQ mode "1w": one-wire mode.
15 - From omap3.dtsi
17 compatible = "ti,omap3-1w";
|
| H A D | maxim,ds2482.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Maxim One wire bus master controller
10 - Stefan Wahren <stefan.wahren@chargebyte.com>
13 I2C to 1-wire bridges
15 https://www.analog.com/media/en/technical-documentation/data-sheets/ds2482-100.pdf
16 https://www.analog.com/media/en/technical-documentation/data-sheets/DS2482-800.pdf
17 https://www.analog.com/media/en/technical-documentation/data-sheets/DS2484.pdf
22 - maxim,ds2482
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| /linux/Documentation/iio/ |
| H A D | ad4000.rst | 1 .. SPDX-License-Identifier: GPL-2.0-only
30 ------------------
35 CS mode, 3-wire turbo mode
38 Datasheet "3-wire" mode is what most resembles standard SPI connection which,
41 "CS Mode, 3-Wire Turbo Mode" connection in datasheets.
42 NOTE: The datasheet definition of 3-wire mode for the AD4000 series is NOT the
43 same of standard spi-3wire mode.
47 Omit the ``adi,sdi-pin`` property in device tree to select this mode.
51 +-------------+
52 + ----------------------------------| SDO |
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| /linux/Documentation/devicetree/bindings/sound/ |
| H A D | awinic,aw8738.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Stephan Gerhold <stephan@gerhold.net>
14 (set using one-wire pulse control). The mode configures the speaker-guard
18 - $ref: dai-common.yaml#
24 mode-gpios:
26 GPIO used for one-wire pulse control. The pin is typically called SHDN
27 (active-low), but this is misleading since it is actually more than
32 description: Operation mode (number of pulses for one-wire pulse control)
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| H A D | mediatek,mt8365-afe.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/mediatek,mt8365-afe.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alexandre Mergnat <amergnat@baylibre.com>
14 const: mediatek,mt8365-afe-pcm
19 "#sound-dai-cells":
24 - description: 26M clock
25 - description: mux for audio clock
26 - description: audio i2s0 mck
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| H A D | mt6358.txt | 10 - compatible - "string" - One of:
11 "mediatek,mt6358-sound"
12 "mediatek,mt6366-sound"
13 - Avdd-supply : power source of AVDD
16 - mediatek,dmic-mode : Indicates how many data pins are used to transmit two
17 channels of PDM signal. 0 means two wires, 1 means one wire. Default
23 compatible = "mediatek,mt6358-sound";
24 Avdd-supply = <&mt6358_vaud28_reg>;
25 mediatek,dmic-mode = <0>;
|
| /linux/Documentation/w1/ |
| H A D | w1-generic.rst | 2 Introduction to the 1-wire (w1) subsystem
5 The 1-wire bus is a simple master-slave bus that communicates via a single
6 signal wire (plus ground, so two wires).
18 - DS9490 usb device
19 - W1-over-GPIO
20 - DS2482 (i2c to w1 bridge)
21 - Emulated devices, such as a RS232 converter, parallel port adapter, etc
25 ------------------------------
29 - sysfs entries for that w1 master are created
30 - the w1 bus is periodically searched for new slave devices
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| /linux/Documentation/driver-api/gpio/ |
| H A D | intro.rst | 17 A "General Purpose Input/Output" (GPIO) is a flexible software-controlled
25 System-on-Chip (SOC) processors heavily rely on GPIOs. In some cases, every
26 non-dedicated pin can be configured as a GPIO; and most chips have at least
31 Most PC southbridges have a few dozen GPIO-capable pins (with only the BIOS
36 - Output values are writable (high=1, low=0). Some chips also have
37 options about how that value is driven, so that for example only one
38 value might be driven, supporting "wire-OR" and similar schemes for the
41 - Input values are likewise readable (1, 0). Some chips support readback
42 of pins configured as "output", which is very useful in such "wire-OR"
44 input de-glitch/debounce logic, sometimes with software controls.
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| /linux/include/linux/ |
| H A D | w1.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
12 * struct w1_reg_num - broken out slave device id
49 * struct w1_slave - holds a single slave device on the bus
51 * @owner: Points to the one wire "wire" kernel module.
84 * struct w1_bus_master - operations available on a bus master
93 * @touch_bit: the lowest-level function for devices that really support the
94 * 1-wire protocol.
95 * touch_bit(0) = write-0 cycle
96 * touch_bit(1) = write-1 / read cycle
112 * @reset_bus: long write-0 with a read for the presence pulse detection
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| /linux/Documentation/devicetree/bindings/spi/ |
| H A D | icpdas-lp8841-spi-rtc.txt | 1 * ICP DAS LP-8841 SPI Controller for RTC
3 ICP DAS LP-8841 contains a DS-1302 RTC. RTC is connected to an IO
6 The device uses the standard MicroWire half-duplex transfer timing.
13 - #address-cells: should be 1
15 - #size-cells: should be 0
17 - compatible: should be "icpdas,lp8841-spi-rtc"
19 - reg: should provide IO memory address
23 - There can be only one slave device.
25 - The spi slave node should claim the following flags which are
28 - spi-3wire: The master itself has only 3 wire. It cannor work in
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|
| /linux/Documentation/hwmon/ |
| H A D | adt7411.rst | 17 -----------
22 The ADT7411 can use an I2C/SMBus compatible 2-wire interface or an
23 SPI-compatible 4-wire interface. It provides a 10-bit analog to digital
25 internal temperature sensor, but an external one can also be connected (one
26 loses 2 inputs then). There are high- and low-limit registers for all inputs.
30 sysfs-Interface
31 ---------------
35 in[1-8]_input analog 1-8 input
48 -----
|
| H A D | lm85.rst | 79 - Philip Pokorny <ppokorny@penguincomputing.com>,
80 - Frodo Looijaard <frodol@dds.nl>,
81 - Richard Barrington <rich_b_nz@clear.net.nz>,
82 - Margit Schubert-While <margitsw@t-online.de>,
83 - Justin Thiessen <jthiessen@penguincomputing.com>
86 -----------
92 The LM85 uses the 2-wire interface compatible with the SMBUS 2.0
94 temperatures and five (5) voltages. It has four (4) 16-bit counters for
104 The temperatures measured are one internal diode, and two remote diodes.
106 measure a thermal diode like the one in a Pentium 4 processor in a socket
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|
| /linux/Documentation/i2c/ |
| H A D | summary.rst | 6 a protocol developed by Philips. It is a two-wire protocol with variable
12 e.g. TWI (Two Wire Interface), IIC.
14 The latest official I2C specification is the `"I²C-bus specification and user
15 manual" (UM10204) <https://www.nxp.com/docs/en/user-guide/UM10204.pdf>`_
34 The I2C bus connects one or more controller chips and one or more target chips.
36 .. kernel-figure:: i2c_bus.svg
37 :alt: Simple I2C bus with one controller and 3 targets
59 video-related chips.
61 For the example configuration in the figure above, you will need one driver for
62 the I2C controller, and drivers for your I2C targets. Usually one driver for
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| /linux/Documentation/devicetree/bindings/leds/backlight/ |
| H A D | kinetic,ktd253.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Kinetic Technologies KTD253 and KTD259 one-wire backlight
10 - Linus Walleij <linus.walleij@linaro.org>
16 using pulses on the enable wire. This is sometimes referred to as
20 - $ref: common.yaml#
25 - enum:
26 - kinetic,ktd253
27 - kinetic,ktd259
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| /linux/drivers/net/ethernet/sfc/ |
| H A D | tc.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright 2020-2022 Xilinx Inc.
22 * struct efx_tc_mac_pedit_action - mac pedit action fields
46 * struct efx_tc_action_set - collection of tc action fields
58 * @encap_user: linked list of encap users (encap_md->users)
59 …* @user: owning action-set-list. Only populated if @encap_md is; used by efx_tc_update_encap() fal…
60 * @count_user: linked list of counter users (counter->users)
124 return mask->enc_src_ip || mask->enc_dst_ip || in efx_tc_match_is_encap()
125 !ipv6_addr_any(&mask->enc_src_ip6) || in efx_tc_match_is_encap()
126 !ipv6_addr_any(&mask->enc_dst_ip6) || mask->enc_ip_tos || in efx_tc_match_is_encap()
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| /linux/drivers/media/dvb-frontends/ |
| H A D | mxl5xx_defs.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
8 * Copyright (c) 2011-2013 MaxLinear, Inc. All rights reserved
29 /* Firmware-Host Command IDs */
31 /* --Device command IDs-- */
37 /* Host-used CMD, not used by firmware */
44 /* --Tuner command IDs-- */
48 /* --Demod command IDs-- */
63 /* --- ABORT channel tune */
66 /* --SWM/FSK command IDs-- */
71 /* --DiSeqC command IDs-- */
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| /linux/Documentation/devicetree/bindings/display/panel/ |
| H A D | panel-mipi-dbi-spi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/panel/panel-mipi-dbi-spi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Noralf Trønnes <noralf@tronnes.org>
23 - Power:
24 - Vdd: Power supply for display module
25 Called power-supply in this binding.
26 - Vddi: Logic level supply for interface signals
27 Called io-supply in this binding.
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|