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/linux/drivers/tty/serial/
H A D	sc16is7xx.c	1 // SPDX-License-Identifier: GPL-2.0+ 3 * SC16IS7xx tty serial driver - common code 53 #define SC16IS7XX_IODIR_REG (0x0a) /* I/O Direction - only on 75x/76x / 54 #define SC16IS7XX_IOSTATE_REG (0x0b) / I/O State - only on 75x/76x / 55 #define SC16IS7XX_IOINTENA_REG (0x0c) / I/O Interrupt Enable - only on 75x/76x / 56 #define SC16IS7XX_IOCONTROL_REG (0x0e) / I/O Control - only on 75x/76x / 75 #define SC16IS7XX_IER_RDI_BIT BIT(0) / Enable RX data interrupt / 76 #define SC16IS7XX_IER_THRI_BIT BIT(1) / Enable TX holding register interrupt / 77 #define SC16IS7XX_IER_RLSI_BIT BIT(2) / Enable RX line status interrupt / 78 #define SC16IS7XX_IER_MSI_BIT BIT(3) / Enable Modem status interrupt */ [all …]
/linux/drivers/mtd/spi-nor/
H A D	sfdp.h	`1 /* SPDX-License-Identifier: GPL-2.0 / 17 #define SFDP_DWORD(i) ((i) - 1) 34 #define BFPT_DWORD1_FAST_READ_1_1_2 BIT(16) 39 #define BFPT_DWORD1_DTR BIT(19) 40 #define BFPT_DWORD1_FAST_READ_1_2_2 BIT(20) 41 #define BFPT_DWORD1_FAST_READ_1_4_4 BIT(21) 42 #define BFPT_DWORD1_FAST_READ_1_1_4 BIT(22) 45 #define BFPT_DWORD5_FAST_READ_2_2_2 BIT(0) 46 #define BFPT_DWORD5_FAST_READ_4_4_4 BIT(4) 57 - 000b: Device does not have a QE bit. Device detects 1-1-4 and 1-4-4 [all …]`
/linux/arch/m68k/include/asm/
H A D	mac_psc.h	1 /* SPDX-License-Identifier: GPL-2.0 / 9 The first seven DMA channels appear to be "one-shot" and are actually 10 * sets of two channels; one member is active while the other is being 12 * The one-shot channels are grouped together and are: 23 * to be closely tied and share one set of registers. They also seem to run 25 * not understood as there seems to be only one input and one output buffer 30 * machine with easy-to-find patterns and looking for them in the DMA 34 * 1999-05-25 (jmt) 52 * One-shot DMA control registers 69 * You're supposed to use one channel while the other runs and [all …]
/linux/Documentation/bpf/
H A D	classic_vs_extended.rst	6 eBPF is designed to be JITed with one to one mapping, which can also open up 12 - Number of registers increase from 2 to 10: 15 new layout extends this to be 10 internal registers and a read-only frame 16 pointer. Since 64-bit CPUs are passing arguments to functions via registers 17 the number of args from eBPF program to in-kernel function is restricted 18 to 5 and one register is used to accept return value from an in-kernel 20 sparcv9/mips64 have 7 - 8 registers for arguments; x86_64 has 6 callee saved 23 Thus, all eBPF registers map one to one to HW registers on x86_64, aarch64, 25 64-bit architectures. 27 On 32-bit architectures JIT may map programs that use only 32-bit arithmetic [all …]
/linux/tools/perf/pmu-events/arch/x86/tigerlake/
H A D	floating-point.json	12 …-bit packed double precision floating-point instructions retired; some instructions will count twi… 16 …-bit packed double precision floating-point instructions retired; some instructions will count twi… 21 …-bit packed single precision floating-point instructions retired; some instructions will count twi… 25 …-bit packed single precision floating-point instructions retired; some instructions will count twi… 30 …-bit packed double precision floating-point instructions retired; some instructions will count twi… 34 …-bit packed double precision floating-point instructions retired; some instructions will count twi… 39 …-bit packed single precision floating-point instructions retired; some instructions will count twi… 43 …-bit packed single precision floating-point instructions retired; some instructions will count twi… 48 …"BriefDescription": "Number of SSE/AVX computational 128-bit packed single and 256-bit packed doub… 52 …-bit packed single precision and 256-bit packed double precision floating-point instructions reti… [all …]
/linux/tools/perf/pmu-events/arch/x86/rocketlake/
H A D	floating-point.json	12 …-bit packed double precision floating-point instructions retired; some instructions will count twi… 16 …-bit packed double precision floating-point instructions retired; some instructions will count twi… 21 …-bit packed single precision floating-point instructions retired; some instructions will count twi… 25 …-bit packed single precision floating-point instructions retired; some instructions will count twi… 30 …-bit packed double precision floating-point instructions retired; some instructions will count twi… 34 …-bit packed double precision floating-point instructions retired; some instructions will count twi… 39 …-bit packed single precision floating-point instructions retired; some instructions will count twi… 43 …-bit packed single precision floating-point instructions retired; some instructions will count twi… 48 …"BriefDescription": "Number of SSE/AVX computational 128-bit packed single and 256-bit packed doub… 52 …-bit packed single precision and 256-bit packed double precision floating-point instructions reti… [all …]
/linux/tools/perf/pmu-events/arch/x86/icelakex/
H A D	floating-point.json	12 …-bit packed double precision floating-point instructions retired; some instructions will count twi… 16 …-bit packed double precision floating-point instructions retired; some instructions will count twi… 21 …-bit packed single precision floating-point instructions retired; some instructions will count twi… 25 …-bit packed single precision floating-point instructions retired; some instructions will count twi… 30 …-bit packed double precision floating-point instructions retired; some instructions will count twi… 34 …-bit packed double precision floating-point instructions retired; some instructions will count twi… 39 …-bit packed single precision floating-point instructions retired; some instructions will count twi… 43 …-bit packed single precision floating-point instructions retired; some instructions will count twi… 48 …"BriefDescription": "Number of SSE/AVX computational 128-bit packed single and 256-bit packed doub… 52 …-bit packed single precision and 256-bit packed double precision floating-point instructions reti… [all …]
/linux/tools/perf/pmu-events/arch/x86/icelake/
H A D	floating-point.json	12 …-bit packed double precision floating-point instructions retired; some instructions will count twi… 16 …-bit packed double precision floating-point instructions retired; some instructions will count twi… 21 …-bit packed single precision floating-point instructions retired; some instructions will count twi… 25 …-bit packed single precision floating-point instructions retired; some instructions will count twi… 30 …-bit packed double precision floating-point instructions retired; some instructions will count twi… 34 …-bit packed double precision floating-point instructions retired; some instructions will count twi… 39 …-bit packed single precision floating-point instructions retired; some instructions will count twi… 43 …-bit packed single precision floating-point instructions retired; some instructions will count twi… 48 …"BriefDescription": "Number of SSE/AVX computational 128-bit packed single and 256-bit packed doub… 52 …-bit packed single precision and 256-bit packed double precision floating-point instructions reti… [all …]
/linux/include/asm-generic/bitops/
H A D	instrumented-non-atomic.h	1 /* SPDX-License-Identifier: GPL-2.0 / 4 This file provides wrappers with sanitizer instrumentation for non-atomic 5 * bit operations. 8 * the below bit operations with an arch_ prefix (e.g. arch_set_bit(), 17 * ___set_bit - Set a bit in memory 18 * @nr: the bit to set 21 * Unlike set_bit(), this function is non-atomic. If it is called on the same 22 * region of memory concurrently, the effect may be that only one operation 33 * ___clear_bit - Clears a bit in memory 34 * @nr: the bit to clear [all …]
H A D	generic-non-atomic.h	1 /* SPDX-License-Identifier: GPL-2.0-only / 14 Generic definitions for bit operations, should not be used in regular code 19 * generic___set_bit - Set a bit in memory 20 * @nr: the bit to set 23 * Unlike set_bit(), this function is non-atomic and may be reordered. 25 * may be that only one operation succeeds. 46 * generic___change_bit - Toggle a bit in memory 47 * @nr: the bit to change 50 * Unlike change_bit(), this function is non-atomic and may be reordered. 52 * may be that only one operation succeeds. [all …]
/linux/Documentation/devicetree/bindings/powerpc/4xx/
H A D	cpm.txt	`4 - compatible : compatible list, currently only "ibm,cpm" 5 - dcr-access-method : "native" 6 - dcr-reg : < DCR register range > 9 - er-offset : All 4xx SoCs with a CPM controller have 10 one of two different order for the CPM 15 er-offset = <1>. 16 - unused-units : specifier consist of one cell. For each 17 bit in the cell, the corresponding bit 20 - idle-doze : specifier consist of one cell. For each 21 bit in the cell, the corresponding bit [all …]`
/linux/tools/perf/pmu-events/arch/x86/cascadelakex/
H A D	floating-point.json	3 …"BriefDescription": "Counts once for most SIMD 128-bit packed computational double precision float… 7 …-bit packed computational double precision floating-point instructions retired; some instructions … 12 …"BriefDescription": "Counts once for most SIMD 128-bit packed computational single precision float… 16 …-bit packed computational single precision floating-point instructions retired; some instructions … 21 …"BriefDescription": "Counts once for most SIMD 256-bit packed double computational precision float… 25 …-bit packed double computational precision floating-point instructions retired; some instructions … 30 …"BriefDescription": "Counts once for most SIMD 256-bit packed single computational precision float… 34 …-bit packed single computational precision floating-point instructions retired; some instructions … 39 …"BriefDescription": "Number of SSE/AVX computational 128-bit packed single and 256-bit packed doub… 43 …-bit packed single precision and 256-bit packed double precision floating-point instructions reti… [all …]
/linux/tools/perf/pmu-events/arch/x86/skylakex/
H A D	floating-point.json	3 …"BriefDescription": "Counts once for most SIMD 128-bit packed computational double precision float… 7 …-bit packed computational double precision floating-point instructions retired; some instructions … 12 …"BriefDescription": "Counts once for most SIMD 128-bit packed computational single precision float… 16 …-bit packed computational single precision floating-point instructions retired; some instructions … 21 …"BriefDescription": "Counts once for most SIMD 256-bit packed double computational precision float… 25 …-bit packed double computational precision floating-point instructions retired; some instructions … 30 …"BriefDescription": "Counts once for most SIMD 256-bit packed single computational precision float… 34 …-bit packed single computational precision floating-point instructions retired; some instructions … 39 …"BriefDescription": "Number of SSE/AVX computational 128-bit packed single and 256-bit packed doub… 43 …-bit packed single precision and 256-bit packed double precision floating-point instructions reti… [all …]
/linux/drivers/net/wireless/quantenna/qtnfmac/
H A D	qlink.h	1 /* SPDX-License-Identifier: GPL-2.0+ / 2 / Copyright (c) 2015-2016 Quantenna Communications. All rights reserved. / 31 enum qlink_msg_type - QLINK message types 49 * struct qlink_msg_header - common QLINK protocol message header 53 * @type: Message type, one of &enum qlink_msg_type. 65 * enum qlink_hw_capab - device capabilities. 68 * @QLINK_HW_CAPAB_STA_INACT_TIMEOUT: device implements a logic to kick-out 91 * enum qlink_driver_capab - host driver capabilities. 108 * struct qlink_intf_info - information on virtual interface. 112 * @if_type: Mode of interface operation, one of &enum qlink_iface_type [all …]
/linux/Documentation/userspace-api/media/v4l/
H A D	metafmt-generic.rst	1 .. SPDX-License-Identifier: GPL-2.0 OR GFDL-1.1-no-invariants-or-later 9 Generic line-based metadata formats 15 These generic line-based metadata formats define the memory layout of the data 18 .. _v4l2-meta-fmt-generic-8: 21 ----------------------- 23 The V4L2_META_FMT_GENERIC_8 format is a plain 8-bit metadata format. This format 24 is used on CSI-2 for 8 bits per :term:`Data Unit`. 27 packed into one 16-bit Data Unit. Otherwise the 16 bits per pixel dataformat is 28 :ref:`V4L2_META_FMT_GENERIC_CSI2_16 <v4l2-meta-fmt-generic-csi2-16>`. 31 Each cell is one byte. "M" denotes a byte of metadata. [all …]
/linux/include/video/
H A D	display_timing.h	`1 /* SPDX-License-Identifier: GPL-2.0-only */ 15 DISPLAY_FLAGS_HSYNC_LOW = BIT(0), 16 DISPLAY_FLAGS_HSYNC_HIGH = BIT(1), 17 DISPLAY_FLAGS_VSYNC_LOW = BIT(2), 18 DISPLAY_FLAGS_VSYNC_HIGH = BIT(3), 21 DISPLAY_FLAGS_DE_LOW = BIT(4), 22 DISPLAY_FLAGS_DE_HIGH = BIT(5), 24 DISPLAY_FLAGS_PIXDATA_POSEDGE = BIT(6), 26 DISPLAY_FLAGS_PIXDATA_NEGEDGE = BIT(7), 27 DISPLAY_FLAGS_INTERLACED = BIT(8), [all …]`
/linux/drivers/net/wireless/intel/iwlegacy/
H A D	prph.h	8 * Copyright(c) 2005 - 2011 Intel Corporation. All rights reserved. 29 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 33 * Copyright(c) 2005 - 2011 Intel Corporation. All rights reserved. 96 #define APMG_SVR_VOLTAGE_CONFIG_BIT_MSK (0x000001E0) /* bit 8:5 / 106 processor is sleeping (e.g. for periodic power-saving shutdowns of radio). 119 * The uCode used for open-source drivers includes two programs: 121 * 1) Initialization -- performs hardware calibration and sets up some 128 * 2) Runtime/Protocol -- performs all normal runtime operations. This 170 * Data caching during power-downs: 173 * power-saving modes, or for RFKILL), uCode stores (via PCI busmaster DMA) [all …]
/linux/tools/perf/pmu-events/arch/x86/sapphirerapids/
H A D	floating-point.json	77 …-bit packed double precision floating-point instructions retired; some instructions will count twi… 81 …-bit packed double precision floating-point instructions retired; some instructions will count twi… 86 …-bit packed single precision floating-point instructions retired; some instructions will count twi… 90 …-bit packed single precision floating-point instructions retired; some instructions will count twi… 95 …-bit packed double precision floating-point instructions retired; some instructions will count twi… 99 …-bit packed double precision floating-point instructions retired; some instructions will count twi… 104 …-bit packed single precision floating-point instructions retired; some instructions will count twi… 108 …-bit packed single precision floating-point instructions retired; some instructions will count twi… 113 …"BriefDescription": "Number of SSE/AVX computational 128-bit packed single and 256-bit packed doub… 117 …-bit packed single precision and 256-bit packed double precision floating-point instructions reti… [all …]
/linux/tools/perf/pmu-events/arch/x86/emeraldrapids/
H A D	floating-point.json	77 …-bit packed double precision floating-point instructions retired; some instructions will count twi… 81 …-bit packed double precision floating-point instructions retired; some instructions will count twi… 86 …-bit packed single precision floating-point instructions retired; some instructions will count twi… 90 …-bit packed single precision floating-point instructions retired; some instructions will count twi… 95 …-bit packed double precision floating-point instructions retired; some instructions will count twi… 99 …-bit packed double precision floating-point instructions retired; some instructions will count twi… 104 …-bit packed single precision floating-point instructions retired; some instructions will count twi… 108 …-bit packed single precision floating-point instructions retired; some instructions will count twi… 113 …"BriefDescription": "Number of SSE/AVX computational 128-bit packed single and 256-bit packed doub… 117 …-bit packed single precision and 256-bit packed double precision floating-point instructions reti… [all …]
/linux/tools/perf/pmu-events/arch/x86/graniterapids/
H A D	floating-point.json	77 …-bit packed double precision floating-point instructions retired; some instructions will count twi… 81 …-bit packed double precision floating-point instructions retired; some instructions will count twi… 86 …-bit packed single precision floating-point instructions retired; some instructions will count twi… 90 …-bit packed single precision floating-point instructions retired; some instructions will count twi… 95 …-bit packed double precision floating-point instructions retired; some instructions will count twi… 99 …-bit packed double precision floating-point instructions retired; some instructions will count twi… 104 …-bit packed single precision floating-point instructions retired; some instructions will count twi… 108 …-bit packed single precision floating-point instructions retired; some instructions will count twi… 113 …"BriefDescription": "Number of SSE/AVX computational 128-bit packed single and 256-bit packed doub… 117 …-bit packed single precision and 256-bit packed double precision floating-point instructions reti… [all …]
/linux/arch/arm/boot/dts/ti/omap/
H A D	omap54xx-clocks.dtsi	`1 // SPDX-License-Identifier: GPL-2.0-only 9 #clock-cells = <0>; 10 compatible = "fixed-clock"; 11 clock-output-names = "pad_clks_src_ck"; 12 clock-frequency = <12000000>; 16 #clock-cells = <0>; 17 compatible = "ti,gate-clock"; 18 clock-output-names = "pad_clks_ck"; 20 ti,bit-shift = <8>; 25 #clock-cells = <0>; [all …]`
/linux/Documentation/locking/
H A D	robust-futex-ABI.rst	17 1) a one time call, per thread, to tell the kernel where its list of 43 consisting of three words. Each word is 32 bits on 32 bit arch's, or 64 44 bits on 64 bit arch's, and local byte order. Each thread should have 47 If a thread is running in 32 bit compatibility mode on a 64 native arch 48 kernel, then it can actually have two such structures - one using 32 bit 49 words for 32 bit compatibility mode, and one using 64 bit words for 64 50 bit native mode. The kernel, if it is a 64 bit kernel supporting 32 bit 56 pointer to a single linked list of 'lock entries', one per lock, 63 is always a 32 bit word, unlike the other words above. The 'lock 77 word, is one 'lock word'. [all …]
/linux/drivers/input/joystick/
H A D	xpad.c	1 // SPDX-License-Identifier: GPL-2.0-or-later 5 * Copyright (c) 2002 Marko Friedemann <mfr@bmx-chemnitz.de> 16 * - information from http://euc.jp/periphs/xbox-controller.ja.html 17 * - the iForce driver drivers/char/joystick/iforce.c 18 * - the skeleton-driver drivers/usb/usb-skeleton.c 19 * - Xbox 360 information http://www.free60.org/wiki/Gamepad 20 * - Xbox One information https://github.com/quantus/xbox-one-controller-protocol 23 * - ITO Takayuki for providing essential xpad information on his website 24 * - Vojtech Pavlik - iforce driver / input subsystem 25 * - Greg Kroah-Hartman - usb-skeleton driver [all …]
/linux/Documentation/devicetree/bindings/pinctrl/
H A D	sprd,sc9860-pinctrl.yaml	1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/sprd,sc9860-pinctrl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Baolin Wang <baolin.wang@linux.alibaba.com> 16 register contains several bit fields with one bit or several bits 19 driving level": One pin can output 3.0v or 1.8v, depending on the 22 to choose one function (like: UART0) for which system, since we 23 have several systems (AP/CP/CM4) on one SoC.). 26 of them, so we can not make every Spreadtrum-special configuration [all …]
/linux/Documentation/admin-guide/mm/
H A D	idle_page_tracking.rst	22 Currently, it consists of the only read-write file, 25 The file implements a bitmap where each bit corresponds to a memory page. The 26 bitmap is represented by an array of 8-byte integers, and the page at PFN #i is 27 mapped to bit #i%64 of array element #i/64, byte order is native. When a bit is 33 To mark a page idle one has to set the bit corresponding to 34 the page by writing to the file. A value written to the file is OR-ed with the 42 For huge pages the idle flag is set only on the head page, so one has to read 46 -EINVAL if you are not starting the read/write on an 8-byte boundary, or 48 this file beyond max PFN will return -ENXIO. 51 workload one should: [all …]

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