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Searched +full:omap5 +full:- +full:wugen +full:- +full:mpu (Results 1 – 6 of 6) sorted by relevance

/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Dti,omap4-wugen-mpu.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/ti,omap4-wugen-mpu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: TI OMAP4 Wake-up Generator
10 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
15 referred to as "WUGEN-MPU", hence the name of the binding.
19 - Because this HW ultimately routes interrupts to the GIC, the interrupt
21 - Only SPIs can use the WUGEN as an interrupt parent. SGIs and PPIs are
27 - items:
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/linux/arch/arm/mach-omap2/
H A Domap4-common.c1 // SPDX-License-Identifier: GPL-2.0-only
19 #include <linux/irqchip/arm-gic.h>
24 #include <asm/hardware/cache-l2x0.h>
29 #include "omap-wakeupgen.h"
35 #include "omap4-sar-layout.h"
36 #include "omap-secure.h"
60 * data writes from the MPU. These asynchronous bridges can be found on
61 * paths between the MPU to EMIF, and the MPU to L3 interconnects.
63 * We need to be careful about re-ordering which can happen as a result
74 * The mb() and wmb() barriers only operate only on the MPU->MA->EMIF
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H A Domap-wakeupgen.c1 // SPDX-License-Identifier: GPL-2.0-only
9 * implemented in MPU always ON power domain. During normal operation,
28 #include "omap-wakeupgen.h"
29 #include "omap-secure.h"
32 #include "omap4-sar-layout.h"
138 _wakeupgen_clear(d->hwirq, irq_target_cpu[d->hwirq]); in wakeupgen_mask()
151 _wakeupgen_set(d->hwirq, irq_target_cpu[d->hwirq]); in wakeupgen_unmask()
179 if (inverted && d->hwirq != SYS_NIRQ1_EXT_SYS_IRQ_1 && in wakeupgen_irq_set_type()
180 d->hwirq != SYS_NIRQ2_EXT_SYS_IRQ_2) in wakeupgen_irq_set_type()
182 d->hwirq); in wakeupgen_irq_set_type()
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/linux/arch/arm/boot/dts/ti/omap/
H A Domap5.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/bus/ti-sysc.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/pinctrl/omap.h>
12 #include <dt-bindings/clock/omap5.h>
15 #address-cells = <2>;
16 #size-cells = <2>;
18 compatible = "ti,omap5";
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H A Ddra7.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/bus/ti-sysc.h>
9 #include <dt-bindings/clock/dra7.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/pinctrl/dra.h>
16 #address-cells = <2>;
17 #size-cells = <2>;
20 interrupt-parent = <&crossbar_mpu>;
47 compatible = "arm,armv7-timer";
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H A Dam4372.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/bus/ti-sysc.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/clock/am4.h>
15 interrupt-parent = <&wakeupgen>;
16 #address-cells = <1>;
17 #size-cells = <1>;
41 #address-cells = <1>;
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