/linux/drivers/gpu/drm/bridge/ |
H A D | thc63lvd1024.c | 1 // SPDX-License-Identifier: GPL-2.0 32 struct gpio_desc *oe; member 50 return drm_bridge_attach(bridge->encoder, thc63->next, bridge, flags); in thc63_attach() 63 * dual-in, single-out where it is 40 to 150 MHz. As dual-in, dual-out in thc63_mode_valid() 67 if (thc63->timings.dual_link) { in thc63_mode_valid() 75 if (mode->clock < min_freq) in thc63_mode_valid() 78 if (mode->clock > max_freq) in thc63_mode_valid() 89 ret = regulator_enable(thc63->vcc); in thc63_enable() 91 dev_err(thc63->dev, in thc63_enable() 96 gpiod_set_value(thc63->pdwn, 0); in thc63_enable() [all …]
|
/linux/Documentation/devicetree/bindings/display/ti/ |
H A D | ti,tpd12s015.txt | 5 - compatible: "ti,tpd12s015" 8 - gpios: CT CP HPD, LS OE and HPD gpios 11 - Video port 0 for HDMI input 12 - Video port 1 for HDMI output 15 ------- 20 gpios = <&gpio2 28 GPIO_ACTIVE_HIGH>, /* 60, CT CP HPD */ 21 <&gpio2 9 GPIO_ACTIVE_HIGH>, /* 41, LS OE */ 25 #address-cells = <1>; 26 #size-cells = <0>; 32 remote-endpoint = <&hdmi_out>; [all …]
|
/linux/Documentation/devicetree/bindings/display/bridge/ |
H A D | thine,thc63lvd1024.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Jacopo Mondi <jacopo+renesas@jmondi.org> 11 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> 34 even-numbered pixels are received on port@0 and odd-numbered pixels on 60 - port@0 61 - port@2 63 oe-gpios: 65 description: Output enable GPIO signal, pin name "OE", active high. [all …]
|
/linux/arch/arm/boot/dts/ti/omap/ |
H A D | omap3-devkit8000-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 6 #include <dt-bindings/input/input.h> 16 compatible = "gpio-leds"; 18 led-heartbeat { 20 gpios = <&gpio6 26 GPIO_ACTIVE_HIGH>; /* 186 -> LED1 */ 21 default-state = "on"; 22 linux,default-trigger = "heartbeat"; 25 led-mmc { 27 gpios = <&gpio6 3 GPIO_ACTIVE_HIGH>; /* 163 -> LED2 */ 28 default-state = "on"; [all …]
|
H A D | omap4-duovero-parlor.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 5 /dts-v1/; 7 #include "omap4-duovero.dtsi" 9 #include <dt-bindings/input/input.h> 13 compatible = "gumstix,omap4-duovero-parlor", "gumstix,omap4-duovero", "ti,omap4430", "ti,omap4"; 20 compatible = "gpio-leds"; 23 gpios = <&gpio4 26 GPIO_ACTIVE_HIGH>; /* gpio_122 */ 24 linux,default-trigger = "heartbeat"; 29 compatible = "gpio-keys"; 30 #address-cells = <1>; [all …]
|
H A D | omap2420-n8x0-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 11 stdout-path = &uart3; 16 compatible = "i2c-cbus-gpio"; 17 gpios = <&gpio3 2 GPIO_ACTIVE_HIGH /* gpio66 clk */ 21 #address-cells = <1>; 22 #size-cells = <0>; 25 interrupt-parent = <&gpio4>; 34 clock-frequency = <400000>; 44 clock-frequency = <400000>; 50 /* gpio-irq for dma: 26 */ [all …]
|
H A D | am335x-nano.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2013 Newflow Ltd - https://www.newflow.co.uk/ 5 /dts-v1/; 15 cpu0-supply = <&dcdc2_reg>; 25 compatible = "gpio-leds"; 29 gpios = <&gpio1 5 0>; 30 default-state = "off"; 36 pinctrl-names = "default"; 37 pinctrl-0 = <&misc_pins>; 39 misc_pins: misc-pins { [all …]
|
H A D | am335x-myirtech-myc.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* SPDX-FileCopyrightText: Alexander Shiyan, <shc_work@mail.ru> */ 5 /* Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ */ 7 /dts-v1/; 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/leds/common.h> 15 model = "MYIR MYC-AM335X"; 16 compatible = "myir,myc-am335x", "ti,am33xx"; 20 cpu0-supply = <&vdd_core>; 21 voltage-tolerance = <2>; [all …]
|
H A D | dra72-evm-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2014-2016 Texas Instruments Incorporated - https://www.ti.com/ 5 /dts-v1/; 8 #include "dra7-ipu-dsp-common.dtsi" 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/clock/ti-dra7-atl.h> 13 compatible = "ti,dra72-evm", "ti,dra722", "ti,dra72", "ti,dra7"; 20 stdout-path = &uart1; 23 evm_12v0: fixedregulator-evm12v0 { 25 compatible = "regulator-fixed"; [all …]
|
H A D | omap3-lilly-dbb056.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later 5 /dts-v1/; 7 #include "omap3-lilly-a83x.dtsi" 10 model = "INCOstartec LILLY-DBB056 (DM3730)"; 11 …compatible = "incostartec,omap3-lilly-dbb056", "incostartec,omap3-lilly-a83x", "ti,omap3630", "ti,… 15 vaux2: regulator-vaux2 { 16 compatible = "ti,twl4030-vaux2"; 17 regulator-min-microvolt = <2800000>; 18 regulator-max-microvolt = <2800000>; 19 regulator-always-on; [all …]
|
H A D | am57xx-beagle-x15-revc.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2014-2017 Texas Instruments Incorporated - https://www.ti.com/ 6 #include "am57xx-beagle-x15-common.dtsi" 9 model = "TI AM5728 BeagleBoard-X15 rev C"; 13 gpios = <&gpio7 10 GPIO_ACTIVE_HIGH>, /* gpio7_10, CT CP HPD */ 14 <&gpio2 30 GPIO_ACTIVE_HIGH>, /* gpio2_30, LS OE */ 19 pinctrl-names = "default", "hs"; 20 pinctrl-0 = <&mmc1_pins_default>; 21 pinctrl-1 = <&mmc1_pins_hs>; 22 vmmc-supply = <&vdd_3v3>; [all …]
|
H A D | omap5-uevm.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/ 5 /dts-v1/; 7 #include "omap5-board-common.dtsi" 11 compatible = "ti,omap5-uevm", "ti,omap5"; 18 reserved-memory { 19 #address-cells = <2>; 20 #size-cells = <2>; 23 dsp_memory_region: dsp-memory@95000000 { 24 compatible = "shared-dma-pool"; [all …]
|
H A D | am57xx-beagle-x15-revb1.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2014-2016 Texas Instruments Incorporated - https://www.ti.com/ 6 #include "am57xx-beagle-x15-common.dtsi" 9 model = "TI AM5728 BeagleBoard-X15 rev B1"; 13 gpios = <&gpio7 10 GPIO_ACTIVE_HIGH>, /* gpio7_10, CT CP HPD */ 14 <&gpio2 30 GPIO_ACTIVE_HIGH>, /* gpio2_30, LS OE */ 19 pinctrl-names = "default", "hs"; 20 pinctrl-0 = <&mmc1_pins_default>; 21 pinctrl-1 = <&mmc1_pins_hs>; 22 vmmc-supply = <&vdd_3v3>; [all …]
|
H A D | omap3-beagle.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ 5 /dts-v1/; 11 compatible = "ti,omap3-beagle", "ti,omap3430", "ti,omap3"; 15 cpu0-supply = <&vcc>; 30 compatible = "gpio-leds"; 31 led-pmu-stat { 33 gpios = <&twl_gpio 19 GPIO_ACTIVE_HIGH>; /* LEDB */ 36 led-heartbeat { 38 gpios = <&gpio5 22 GPIO_ACTIVE_HIGH>; /* 150 -> D6 LED */ [all …]
|
H A D | am57xx-beagle-x15.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2014-2016 Texas Instruments Incorporated - https://www.ti.com/ 6 #include "am57xx-beagle-x15-common.dtsi" 9 /* NOTE: This describes the "original" pre-production A2 revision */ 10 model = "TI AM5728 BeagleBoard-X15"; 14 gpios = <&gpio7 10 GPIO_ACTIVE_HIGH>, /* gpio7_10, CT CP HPD */ 15 <&gpio6 28 GPIO_ACTIVE_HIGH>, /* gpio6_28, LS OE */ 20 pinctrl-names = "default", "hs"; 21 pinctrl-0 = <&mmc1_pins_default>; 22 pinctrl-1 = <&mmc1_pins_hs>; [all …]
|
H A D | am335x-igep0033.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * am335x-igep0033.dtsi - Device Tree file for IGEP COM AQUILA AM335x 5 * Copyright (C) 2013 ISEE 2007 SL - https://www.isee.biz 8 /dts-v1/; 11 #include <dt-bindings/interrupt-controller/irq.h> 16 cpu0-supply = <&vdd1_reg>; 26 pinctrl-names = "default"; 27 pinctrl-0 = <&leds_pins>; 29 compatible = "gpio-leds"; 33 gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>; [all …]
|
/linux/arch/arm64/boot/dts/freescale/ |
H A D | mba8mx.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) 3 * Copyright 2020-2021 TQ-Systems GmbH 6 #include <dt-bindings/net/ti-dp83867.h> 8 /* TQ-Systems GmbH MBa8Mx baseboard */ 12 compatible = "pwm-backlight"; 14 brightness-levels = <0 4 8 16 32 64 128 255>; 15 default-brightness-level = <7>; 16 power-supply = <®_12v>; 17 enable-gpios = <&expander2 2 GPIO_ACTIVE_HIGH>; 22 compatible = "pwm-beeper"; [all …]
|
H A D | imx8mm-tqma8mqml-mba8mx-lvds-tm070jvhg33.dtso | 1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) 3 * Copyright (c) 2022-2023 TQ-Systems GmbH <linux@ew.tq-group.com>, 4 * D-82229 Seefeld, Germany. 8 /dts-v1/; 11 #include <dt-bindings/gpio/gpio.h> 14 compatible = "tq,imx8mm-tqma8mqml-mba8mx", "tq,imx8mm-tqma8mqml", "fsl,imx8mm"; 26 dsi-mux-oe-hog { 27 gpio-hog; 28 gpios = <10 GPIO_ACTIVE_LOW>; 29 output-high; [all …]
|
H A D | imx8mn-tqma8mqnl-mba8mx-lvds-tm070jvhg33.dtso | 1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) 3 * Copyright (c) 2022-2023 TQ-Systems GmbH <linux@ew.tq-group.com>, 4 * D-82229 Seefeld, Germany. 8 /dts-v1/; 11 #include <dt-bindings/gpio/gpio.h> 14 compatible = "tq,imx8mn-tqma8mqnl-mba8mx", "tq,imx8mn-tqma8mqnl", "fsl,imx8mn"; 26 dsi-mux-oe-hog { 27 gpio-hog; 28 gpios = <10 GPIO_ACTIVE_LOW>; 29 output-high; [all …]
|
H A D | imx8mq-tqma8mq-mba8mx-lvds-tm070jvhg33.dtso | 1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) 3 * Copyright (c) 2019-2023 TQ-Systems GmbH <linux@ew.tq-group.com>, 4 * D-82229 Seefeld, Germany. 8 /dts-v1/; 11 #include <dt-bindings/gpio/gpio.h> 14 compatible = "tq,imx8mq-tqma8mq-mba8mx", "tq,imx8mq-tqma8mq", "fsl,imx8mq"; 30 dsi-mux-oe-hog { 31 gpio-hog; 32 gpios = <10 GPIO_ACTIVE_LOW>; 33 output-high; [all …]
|
/linux/Documentation/devicetree/bindings/media/i2c/ |
H A D | chrontel,ch7322.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Chrontel HDMI-CEC Controller 10 - Jeff Chase <jnchase@google.com> 13 The Chrontel CH7322 is a discrete HDMI-CEC controller. It is 17 - $ref: /schemas/media/cec/cec-common.yaml# 33 reset-gpios: 36 pin is active-low. 39 standby-gpios: [all …]
|
H A D | aptina,mt9v111.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Jacopo Mondi <jacopo@jmondi.org> 13 The Aptina MT9V111 is a 1/4-Inch VGA-format digital image sensor with a core 17 of image resolutions and formats controllable through a simple two-wires 30 enable-gpios: 31 description: Enable signal, pin name "OE#". Active low. 34 standby-gpios: 39 reset-gpios: [all …]
|
/linux/Documentation/devicetree/bindings/bus/ |
H A D | qcom,ebi2.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 external memory (such as NAND or other memory-mapped peripherals) whereas 16 data lines (16 bits), OE (output enable), ADV (address valid, used on some 25 Also CS1 and CS2 has -A and -B signals. Why they have that is unclear to me. 31 CS0 GPIO134 0x1a800000-0x1b000000 (8MB) 32 CS1 GPIO39 (A) / GPIO123 (B) 0x1b000000-0x1b800000 (8MB) 33 CS2 GPIO40 (A) / GPIO124 (B) 0x1b800000-0x1c000000 (8MB) 34 CS3 GPIO133 0x1d000000-0x25000000 (128 MB) [all …]
|
/linux/arch/arm64/boot/dts/ti/ |
H A D | k3-am642-evm-nand.dtso | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2021-2024 Texas Instruments Incorporated - https://www.ti.com/ 8 /dts-v1/; 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include "k3-pinctrl.h" 15 gpmc0_default_pins: gpmc0-default-pins { 16 bootph-all; 17 pinctrl-single,pins = < 53 gpmc0-hog { [all …]
|
H A D | k3-am62-lp-sk-nand.dtso | 1 // SPDX-License-Identifier: GPL-2.0 3 * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/ 6 /dts-v1/; 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include "k3-pinctrl.h" 17 gpmc0_pins_default: gpmc0-pins-default { 18 pinctrl-single,pins = < 44 pinctrl-names = "default"; 45 pinctrl-0 = <&gpmc0_pins_default>; [all …]
|