1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0-or-later 2*724ba675SRob Herring/* 3*724ba675SRob Herring * Copyright (C) 2014 Christoph Fritz <chf.fritzc@googlemail.com> 4*724ba675SRob Herring */ 5*724ba675SRob Herring/dts-v1/; 6*724ba675SRob Herring 7*724ba675SRob Herring#include "omap3-lilly-a83x.dtsi" 8*724ba675SRob Herring 9*724ba675SRob Herring/ { 10*724ba675SRob Herring model = "INCOstartec LILLY-DBB056 (DM3730)"; 11*724ba675SRob Herring compatible = "incostartec,omap3-lilly-dbb056", "incostartec,omap3-lilly-a83x", "ti,omap3630", "ti,omap3"; 12*724ba675SRob Herring}; 13*724ba675SRob Herring 14*724ba675SRob Herring&twl { 15*724ba675SRob Herring vaux2: regulator-vaux2 { 16*724ba675SRob Herring compatible = "ti,twl4030-vaux2"; 17*724ba675SRob Herring regulator-min-microvolt = <2800000>; 18*724ba675SRob Herring regulator-max-microvolt = <2800000>; 19*724ba675SRob Herring regulator-always-on; 20*724ba675SRob Herring }; 21*724ba675SRob Herring}; 22*724ba675SRob Herring 23*724ba675SRob Herring&omap3_pmx_core { 24*724ba675SRob Herring pinctrl-names = "default"; 25*724ba675SRob Herring pinctrl-0 = <&lcd_pins>; 26*724ba675SRob Herring 27*724ba675SRob Herring lan9117_pins: lan9117-pins { 28*724ba675SRob Herring pinctrl-single,pins = < 29*724ba675SRob Herring OMAP3_CORE1_IOPAD(0x2114, PIN_INPUT | MUX_MODE4) /* cam_fld.gpio_98 */ 30*724ba675SRob Herring >; 31*724ba675SRob Herring }; 32*724ba675SRob Herring 33*724ba675SRob Herring gpio4_pins: gpio4-pins { 34*724ba675SRob Herring pinctrl-single,pins = < 35*724ba675SRob Herring OMAP3_CORE1_IOPAD(0x212e, PIN_INPUT | MUX_MODE4) /* cam_xclkb.gpio_111 -> sja1000 IRQ */ 36*724ba675SRob Herring >; 37*724ba675SRob Herring }; 38*724ba675SRob Herring 39*724ba675SRob Herring gpio5_pins: gpio5-pins { 40*724ba675SRob Herring pinctrl-single,pins = < 41*724ba675SRob Herring OMAP3_CORE1_IOPAD(0x218c, PIN_OUTPUT | PIN_OFF_OUTPUT_HIGH | MUX_MODE4) /* mcbsp1_clk.gpio_156 -> enable DSS */ 42*724ba675SRob Herring >; 43*724ba675SRob Herring }; 44*724ba675SRob Herring 45*724ba675SRob Herring lcd_pins: lcd-pins { 46*724ba675SRob Herring pinctrl-single,pins = < 47*724ba675SRob Herring OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0) /* dss_pclk.dss_pclk */ 48*724ba675SRob Herring OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT | MUX_MODE0) /* dss_hsync.dss_hsync */ 49*724ba675SRob Herring OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT | MUX_MODE0) /* dss_vsync.dss_vsync */ 50*724ba675SRob Herring OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT | MUX_MODE0) /* dss_acbias.dss_acbias */ 51*724ba675SRob Herring OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT | MUX_MODE0) /* dss_data0.dss_data0 */ 52*724ba675SRob Herring OMAP3_CORE1_IOPAD(0x20de, PIN_OUTPUT | MUX_MODE0) /* dss_data1.dss_data1 */ 53*724ba675SRob Herring OMAP3_CORE1_IOPAD(0x20e0, PIN_OUTPUT | MUX_MODE0) /* dss_data2.dss_data2 */ 54*724ba675SRob Herring OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE0) /* dss_data3.dss_data3 */ 55*724ba675SRob Herring OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT | MUX_MODE0) /* dss_data4.dss_data4 */ 56*724ba675SRob Herring OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT | MUX_MODE0) /* dss_data5.dss_data5 */ 57*724ba675SRob Herring OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT | MUX_MODE0) /* dss_data6.dss_data6 */ 58*724ba675SRob Herring OMAP3_CORE1_IOPAD(0x20ea, PIN_OUTPUT | MUX_MODE0) /* dss_data7.dss_data7 */ 59*724ba675SRob Herring OMAP3_CORE1_IOPAD(0x20ec, PIN_OUTPUT | MUX_MODE0) /* dss_data8.dss_data8 */ 60*724ba675SRob Herring OMAP3_CORE1_IOPAD(0x20ee, PIN_OUTPUT | MUX_MODE0) /* dss_data9.dss_data9 */ 61*724ba675SRob Herring OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT | MUX_MODE0) /* dss_data10.dss_data10 */ 62*724ba675SRob Herring OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT | MUX_MODE0) /* dss_data11.dss_data11 */ 63*724ba675SRob Herring OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT | MUX_MODE0) /* dss_data12.dss_data12 */ 64*724ba675SRob Herring OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT | MUX_MODE0) /* dss_data13.dss_data13 */ 65*724ba675SRob Herring OMAP3_CORE1_IOPAD(0x20f8, PIN_OUTPUT | MUX_MODE0) /* dss_data14.dss_data14 */ 66*724ba675SRob Herring OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT | MUX_MODE0) /* dss_data15.dss_data15 */ 67*724ba675SRob Herring OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT | MUX_MODE0) /* dss_data16.dss_data16 */ 68*724ba675SRob Herring OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT | MUX_MODE0) /* dss_data17.dss_data17 */ 69*724ba675SRob Herring >; 70*724ba675SRob Herring }; 71*724ba675SRob Herring 72*724ba675SRob Herring mmc2_pins: mmc2-pins { 73*724ba675SRob Herring pinctrl-single,pins = < 74*724ba675SRob Herring OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk.sdmmc2_clk */ 75*724ba675SRob Herring OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd.sdmmc2_cmd */ 76*724ba675SRob Herring OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0.sdmmc2_dat0 */ 77*724ba675SRob Herring OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1.sdmmc2_dat1 */ 78*724ba675SRob Herring OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2.sdmmc2_dat2 */ 79*724ba675SRob Herring OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3.sdmmc2_dat3 */ 80*724ba675SRob Herring OMAP3_CORE1_IOPAD(0x2164, PIN_OUTPUT | MUX_MODE1) /* sdmmc2_dat4.sdmmc2_dir_dat0 */ 81*724ba675SRob Herring OMAP3_CORE1_IOPAD(0x2166, PIN_OUTPUT | MUX_MODE1) /* sdmmc2_dat5.sdmmc2_dir_dat1 */ 82*724ba675SRob Herring OMAP3_CORE1_IOPAD(0x2168, PIN_OUTPUT | MUX_MODE1) /* sdmmc2_dat6.sdmmc2_dir_cmd */ 83*724ba675SRob Herring OMAP3_CORE1_IOPAD(0x216a, PIN_INPUT | MUX_MODE1) /* sdmmc2_dat7.sdmmc2_clkin */ 84*724ba675SRob Herring OMAP3_CORE1_IOPAD(0x219a, PIN_INPUT_PULLUP | MUX_MODE4) /* uart3_cts_rctx.gpio_163 -> wp */ 85*724ba675SRob Herring OMAP3_CORE1_IOPAD(0x219c, PIN_INPUT_PULLUP | MUX_MODE4) /* uart3_rts_sd.gpio_164 -> cd */ 86*724ba675SRob Herring >; 87*724ba675SRob Herring }; 88*724ba675SRob Herring 89*724ba675SRob Herring spi1_pins: spi1-pins { 90*724ba675SRob Herring pinctrl-single,pins = < 91*724ba675SRob Herring OMAP3_CORE1_IOPAD(0x21c8, PIN_INPUT | MUX_MODE0) /* mcspi1_clk.mcspi1_clk */ 92*724ba675SRob Herring OMAP3_CORE1_IOPAD(0x21ca, PIN_INPUT | MUX_MODE0) /* mcspi1_simo.mcspi1_simo */ 93*724ba675SRob Herring OMAP3_CORE1_IOPAD(0x21cc, PIN_INPUT | MUX_MODE0) /* mcspi1_somi.mcspi1_somi */ 94*724ba675SRob Herring OMAP3_CORE1_IOPAD(0x21ce, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcspi1_cs0.mcspi1_cs0 */ 95*724ba675SRob Herring >; 96*724ba675SRob Herring }; 97*724ba675SRob Herring}; 98*724ba675SRob Herring 99*724ba675SRob Herring&gpio4 { 100*724ba675SRob Herring pinctrl-names = "default"; 101*724ba675SRob Herring pinctrl-0 = <&gpio4_pins>; 102*724ba675SRob Herring}; 103*724ba675SRob Herring 104*724ba675SRob Herring&gpio5 { 105*724ba675SRob Herring pinctrl-names = "default"; 106*724ba675SRob Herring pinctrl-0 = <&gpio5_pins>; 107*724ba675SRob Herring}; 108*724ba675SRob Herring 109*724ba675SRob Herring&mmc2 { 110*724ba675SRob Herring status = "okay"; 111*724ba675SRob Herring bus-width = <4>; 112*724ba675SRob Herring vmmc-supply = <&vmmc1>; 113*724ba675SRob Herring cd-gpios = <&gpio6 4 GPIO_ACTIVE_HIGH>; /* gpio_164 */ 114*724ba675SRob Herring wp-gpios = <&gpio6 3 GPIO_ACTIVE_HIGH>; /* gpio_163 */ 115*724ba675SRob Herring pinctrl-names = "default"; 116*724ba675SRob Herring pinctrl-0 = <&mmc2_pins>; 117*724ba675SRob Herring ti,dual-volt; 118*724ba675SRob Herring}; 119*724ba675SRob Herring 120*724ba675SRob Herring&mcspi1 { 121*724ba675SRob Herring status = "okay"; 122*724ba675SRob Herring pinctrl-names = "default"; 123*724ba675SRob Herring pinctrl-0 = <&spi1_pins>; 124*724ba675SRob Herring}; 125*724ba675SRob Herring 126*724ba675SRob Herring&gpmc { 127*724ba675SRob Herring ranges = <0 0 0x30000000 0x1000000>, /* nand assigned by COM a83x */ 128*724ba675SRob Herring <4 0 0x20000000 0x01000000>, 129*724ba675SRob Herring <7 0 0x15000000 0x01000000>; /* eth assigend by COM a83x */ 130*724ba675SRob Herring 131*724ba675SRob Herring ethernet@4,0 { 132*724ba675SRob Herring compatible = "smsc,lan9117", "smsc,lan9115"; 133*724ba675SRob Herring bank-width = <2>; 134*724ba675SRob Herring gpmc,mux-add-data = <2>; 135*724ba675SRob Herring gpmc,cs-on-ns = <10>; 136*724ba675SRob Herring gpmc,cs-rd-off-ns = <65>; 137*724ba675SRob Herring gpmc,cs-wr-off-ns = <65>; 138*724ba675SRob Herring gpmc,adv-on-ns = <0>; 139*724ba675SRob Herring gpmc,adv-rd-off-ns = <10>; 140*724ba675SRob Herring gpmc,adv-wr-off-ns = <10>; 141*724ba675SRob Herring gpmc,oe-on-ns = <10>; 142*724ba675SRob Herring gpmc,oe-off-ns = <65>; 143*724ba675SRob Herring gpmc,we-on-ns = <10>; 144*724ba675SRob Herring gpmc,we-off-ns = <65>; 145*724ba675SRob Herring gpmc,rd-cycle-ns = <100>; 146*724ba675SRob Herring gpmc,wr-cycle-ns = <100>; 147*724ba675SRob Herring gpmc,access-ns = <60>; 148*724ba675SRob Herring gpmc,page-burst-access-ns = <5>; 149*724ba675SRob Herring gpmc,bus-turnaround-ns = <0>; 150*724ba675SRob Herring gpmc,cycle2cycle-delay-ns = <75>; 151*724ba675SRob Herring gpmc,wr-data-mux-bus-ns = <15>; 152*724ba675SRob Herring gpmc,wr-access-ns = <75>; 153*724ba675SRob Herring gpmc,cycle2cycle-samecsen; 154*724ba675SRob Herring gpmc,cycle2cycle-diffcsen; 155*724ba675SRob Herring vddvario-supply = <®_vcc3>; 156*724ba675SRob Herring vdd33a-supply = <®_vcc3>; 157*724ba675SRob Herring reg-io-width = <4>; 158*724ba675SRob Herring interrupt-parent = <&gpio4>; 159*724ba675SRob Herring interrupts = <2 0x2>; 160*724ba675SRob Herring reg = <4 0 0xff>; 161*724ba675SRob Herring pinctrl-names = "default"; 162*724ba675SRob Herring pinctrl-0 = <&lan9117_pins>; 163*724ba675SRob Herring phy-mode = "mii"; 164*724ba675SRob Herring smsc,force-internal-phy; 165*724ba675SRob Herring }; 166*724ba675SRob Herring}; 167