Searched +full:odmi +full:- +full:controller (Results 1 – 3 of 3) sorted by relevance
| /freebsd/sys/contrib/device-tree/Bindings/interrupt-controller/ |
| H A D | marvell,odmi-controller.txt | 2 * Marvell ODMI for MSI support 4 Some Marvell SoCs have an On-Die Message Interrupt (ODMI) controller 5 which can be used by on-board peripheral for MSI interrupts. 9 - compatible : The value here should contain: 11 "marvell,ap806-odmi-controller", "marvell,odmi-controller". 13 - interrupt,controller : Identifies the node as an interrupt controller. 15 - msi-controller : Identifies the node as an MSI controller. 17 - marvell,odmi-frames : Number of ODMI frames available. Each frame 20 - reg : List of register definitions, one for each 21 ODMI frame. [all …]
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| H A D | marvell,odmi-controller.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/interrupt-controller/marvell,odmi-controller.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Marvell ODMI controller 10 - Thomas Petazzoni <thomas.petazzoni@free-electrons.com> 13 Some Marvell SoCs have an On-Die Message Interrupt (ODMI) controller which can 14 be used by on-board peripherals for MSI interrupts. 18 const: marvell,odmi-controller 21 description: List of register definitions, one for each ODMI frame. [all …]
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| /freebsd/sys/contrib/device-tree/src/arm64/marvell/ |
| H A D | armada-ap80x.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/thermal/thermal.h> 11 /dts-v1/; 14 #address-cells = <2>; 15 #size-cells = <2>; 25 compatible = "arm,psci-0.2"; 29 reserved-memory { 30 #address-cells = <2>; 31 #size-cells = <2>; [all …]
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