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Searched +full:ocelot +full:- +full:miim (Results 1 – 5 of 5) sorted by relevance

/linux/Documentation/devicetree/bindings/mfd/
H A Dmscc,ocelot.yaml1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause */
3 ---
4 $id: http://devicetree.org/schemas/mfd/mscc,ocelot.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Ocelot Externally-Controlled Ethernet Switch
10 - Colin Foster <colin.foster@in-advantage.com>
13 The Ocelot ethernet switch family contains chips that have an internal CPU
18 The switch family is a multi-port networking switch that supports many
25 - mscc,vsc7512
30 "#address-cells":
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/linux/Documentation/devicetree/bindings/net/
H A Dmscc,miim.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/net/mscc,miim.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Microsemi MII Management Controller (MIIM)
10 - Alexandre Belloni <alexandre.belloni@bootlin.com>
13 - $ref: mdio.yaml#
18 - mscc,ocelot-miim
19 - microchip,lan966x-miim
21 "#address-cells":
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/linux/arch/mips/boot/dts/mscc/
H A Docelot.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
5 #address-cells = <1>;
6 #size-cells = <1>;
7 compatible = "mscc,ocelot";
10 #address-cells = <1>;
11 #size-cells = <0>;
25 cpuintc: interrupt-controller {
26 #address-cells = <0>;
27 #interrupt-cells = <1>;
28 interrupt-controller;
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/linux/drivers/mfd/
H A Docelot-core.c1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 * Core driver for the Ocelot chip family.
6 * on-chip MIPS processor, or externally via SPI, I2C, PCIe. This core driver is
7 * intended to be the bus-agnostic glue between, for example, the SPI bus and
10 * Copyright 2021-2022 Innovative Advantage Inc.
12 * Author: Colin Foster <colin.foster@in-advantage.com>
22 #include <linux/mfd/ocelot.h>
27 #include <soc/mscc/ocelot.h>
29 #include "ocelot.h"
91 err = regmap_read(ddata->gcb_regmap, REG_GCB_SOFT_RST, &val); in ocelot_gcb_chip_rst_status()
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/linux/arch/arm64/boot/dts/microchip/
H A Dsparx5.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/clock/microchip,sparx5.h>
12 interrupt-parent = <&gic>;
13 #address-cells = <2>;
14 #size-cells = <1>;
23 stdout-path = "serial0:115200n8";
27 #address-cells = <1>;
28 #size-cells = <0>;
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