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/freebsd/sys/contrib/device-tree/Bindings/pci/
H A Daltr,msi-controller.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/altr,msi-controller.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Matthew Gerlach <matthew.gerlach@linux.intel.com>
16 - altr,msi-1.0
20 - description: CSR registers
21 - description: Vectors slave port region
23 reg-names:
25 - const: csr
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H A Daltera-pcie-msi.txt4 - compatible: should contain "altr,msi-1.0"
5 - reg: specifies the physical base address of the controller and
7 - reg-names: must include the following entries:
9 "vector_slave": vectors slave port region
10 - interrupts: specifies the interrupt source of the parent interrupt
13 - num-vectors: number of vectors, range 1 to 32.
14 - msi-controller: indicates that this is MSI controller node
19 compatible = "altr,msi-1.0";
22 reg-names = "csr", "vector_slave";
23 interrupt-parent = <&hps_0_arm_gic_0>;
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/freebsd/sys/dev/acpica/
H A Dacpi_hpet.c1 /*-
2 * Copyright (c) 2005 Poul-Henning Kamp
94 int num; member
108 uint32_t vectors; member
142 sc = tc->tc_priv; in hpet_get_timecount()
143 return (bus_read_4(sc->mem_res, HPET_MAIN_COUNTER)); in hpet_get_timecount()
151 sc = tc->tc_priv; in hpet_vdso_timehands()
152 vdso_th->th_algo = VDSO_TH_ALGO_X86_HPET; in hpet_vdso_timehands()
153 vdso_th->th_x86_shift = 0; in hpet_vdso_timehands()
154 vdso_th->th_x86_hpet_idx = device_get_unit(sc->dev); in hpet_vdso_timehands()
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/freebsd/sys/contrib/device-tree/Bindings/interrupt-controller/
H A Dloongson,pch-msi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/loongson,pch-msi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jiaxun Yang <jiaxun.yang@flygoat.com>
19 const: loongson,pch-msi-1.0
24 loongson,msi-base-vec:
32 loongson,msi-num-vecs:
34 u32 value of the number of parent HyperTransport vectors allocated
40 msi-controller: true
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/freebsd/contrib/llvm-project/llvm/include/llvm/IR/
H A DInstruction.def1 //===-- llvm/Instruction.def - File that describes Instructions -*- C++ -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
13 //===----------------------------------------------------------------------===//
21 #define FIRST_TERM_INST(num)
25 #define HANDLE_TERM_INST(num, opcode, Class)
27 #define HANDLE_TERM_INST(num, opcode, Class) HANDLE_INST(num, opcode, Class)
31 #define LAST_TERM_INST(num)
35 #define FIRST_UNARY_INST(num)
39 #define HANDLE_UNARY_INST(num, opcode, instclass)
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/freebsd/lib/libcrypt/
H A Dcrypt-sha256.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
29 * SHA256-based Unix crypt implementation. Released into the Public Domain by
71 const char *num; in crypt_sha256() local
80 if (strncmp(sha256_salt_prefix, salt, sizeof(sha256_salt_prefix) - 1) == 0) in crypt_sha256()
82 salt += sizeof(sha256_salt_prefix) - 1; in crypt_sha256()
84 if (strncmp(salt, sha256_rounds_prefix, sizeof(sha256_rounds_prefix) - 1) in crypt_sha256()
86 num = salt + sizeof(sha256_rounds_prefix) - 1; in crypt_sha256()
87 srounds = strtoul(num, &endp, 10); in crypt_sha256()
127 for (cnt = key_len; cnt > 32; cnt -= 32) in crypt_sha256()
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H A Dcrypt-sha512.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
29 * SHA512-based Unix crypt implementation. Released into the Public Domain by
71 const char *num; in crypt_sha512() local
80 if (strncmp(sha512_salt_prefix, salt, sizeof(sha512_salt_prefix) - 1) == 0) in crypt_sha512()
82 salt += sizeof(sha512_salt_prefix) - 1; in crypt_sha512()
84 if (strncmp(salt, sha512_rounds_prefix, sizeof(sha512_rounds_prefix) - 1) in crypt_sha512()
86 num = salt + sizeof(sha512_rounds_prefix) - 1; in crypt_sha512()
87 srounds = strtoul(num, &endp, 10); in crypt_sha512()
127 for (cnt = key_len; cnt > 64; cnt -= 64) in crypt_sha512()
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/freebsd/contrib/llvm-project/llvm/lib/DebugInfo/DWARF/
H A DDWARFGdbIndex.cpp1 //===- DWARFGdbIndex.cpp --------------------------------------------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
25 // https://sourceware.org/gdb/onlinedocs/gdb/Index-Section-Format.html
54 Addr.LowAddress, Addr.HighAddress, Addr.HighAddress - Addr.LowAddress, in dumpAddressArea()
63 uint32_t I = -1; in dumpSymbolTable()
73 ConstantPoolOffset - StringPoolOffset + E.NameOffset); in dumpSymbolTable()
81 uint32_t CuVectorId = CuVector - ConstantPoolVectors.begin(); in dumpSymbolTable()
88 OS << format("\n Constant pool offset = 0x%x, has %" PRId64 " CU vectors:", in dumpConstantPool()
132 uint32_t CuListSize = (TuListOffset - CuListOffset) / 16; in parseImpl()
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/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonISelDAGToDAGHVX.cpp1 //===-- HexagonISelDAGToDAGHVX.cpp --------
140 Node Num = Order.size(); conj() local
432 ElemType Num = Size; route() local
478 ElemType Num = Size; route() local
552 ElemType Num = Size; route() local
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/freebsd/sys/dev/gve/
H A Dgve_utils.c1 /*-
2 * SPDX-License-Identifier: BSD-3-Clause
4 * Copyright (c) 2023-2024 Google LLC
37 return (be32toh(bus_read_4(priv->reg_bar, offset))); in gve_reg_bar_read_4()
43 bus_write_4(priv->reg_bar, offset, htobe32(val)); in gve_reg_bar_write_4()
49 bus_write_4(priv->db_bar, offset, htobe32(val)); in gve_db_bar_write_4()
55 bus_write_4(priv->db_bar, offset, val); in gve_db_bar_dqo_write_4()
90 device_t dev = priv->dev; in gve_dma_alloc_coherent()
104 &dma->tag); in gve_dma_alloc_coherent()
111 err = bus_dmamem_alloc(dma->tag, (void **) &dma->cpu_addr, in gve_dma_alloc_coherent()
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/illumos-gate/usr/src/uts/common/sys/
H A Dddi_intr_impl.h46 DDI_INTROP_NINTRS, /* 2 get num of interrupts supported */
63 DDI_INTROP_NAVAIL, /* 19 get num of available interrupts */
85 uint_t ih_pri; /* priority - bus dependent */
93 * The following 3 members are used to support MSI-X specific features
96 uint_t ih_dup_cnt; /* # of dupped msi-x vectors */
103 * scratch1 - used to send NINTRs information
105 * scratch2 - used to send 'behavior' flag
110 * private - On X86 it usually carries a pointer to
144 #define DDI_INTR_MSIX_DUP 0x01 /* MSI-X vector which has been dupped */
149 /* Default number of MSI-X resources to allocate */
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/freebsd/crypto/openssl/crypto/stack/
H A Dstack.c2 * Copyright 1995-2024 The OpenSSL Project Authors. All Rights Reserved.
28 int num; member
38 OPENSSL_sk_compfunc old = sk->comp; in OPENSSL_sk_set_cmp_func()
40 if (sk->comp != c) in OPENSSL_sk_set_cmp_func()
41 sk->sorted = 0; in OPENSSL_sk_set_cmp_func()
42 sk->comp = c; in OPENSSL_sk_set_cmp_func()
55 ret->num = 0; in OPENSSL_sk_dup()
56 ret->sorted = 0; in OPENSSL_sk_dup()
57 ret->comp = NULL; in OPENSSL_sk_dup()
63 if (sk == NULL || sk->num == 0) { in OPENSSL_sk_dup()
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/illumos-gate/usr/src/uts/common/io/hxge/
H A Dhpi_vir.c51 gnum.bits.num = ldg; in hpi_fzc_ldg_num_set()
59 * Get device state vectors.
78 * Get device state vectors.
257 HXGE_REG_RD32(handle, DEV_ERR_STAT, &statp->value); in hpi_fzc_sys_err_stat_get()
/freebsd/crypto/openssl/crypto/bn/
H A Dbn_local.h2 * Copyright 1995-2023 The OpenSSL Project Authors. All Rights Reserved.
15 * SIXTY_FOUR_BIT in its own environment since it doesn't re-run our
16 * Configure script and needs to support both 32-bit and 64-bit.
33 * itself. BN_DEBUG - turn on various debugging alterations to the bignum
34 * code BN_RAND_DEBUG - uses random poisoning of unused words to trip up
53 * While the current OpenSSL version will use non-optimized, but safe code,
58 * "./config -DBN_SOFT_LIMIT=<limit>" if necessary, and the O/S specific
89 * 64-bit processor with LP64 ABI
105 * 64-bit processor other than LP64 ABI
141 /*-
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/freebsd/crypto/openssl/crypto/bn/asm/
H A Dvia-mont.pl2 # Copyright 2006-2020 The OpenSSL Project Authors. All Rights Reserved.
17 # Wrapper around 'rep montmul', VIA-specific instruction accessing
18 # PadLock Montgomery Multiplier. The wrapper is designed as drop-in
23 # Lines marked with "software integer" denote performance of hand-
24 # coded integer-only assembler found in OpenSSL 0.9.7. "Software SSE2"
25 # refers to hand-coded SSE2 Montgomery multiplication procedure found
68 # running hand-coded SSE2 bn_mul_mont found in 0.9.9, i.e. "software
80 # - VIA SDK leaves a *lot* of room for improvement (which this
81 # implementation successfully fills:-);
82 # - 'rep montmul' gives up to >3x performance improvement depending on
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H A Dsparcv9a-mont.pl2 # Copyright 2005-2021 The OpenSSL Project Authors. All Rights Reserved.
24 # binary compatibility. Well yes, it does exclude SPARC64 prior-V(!)
29 # integer-only pure SPARCv9 module to "fall down" to.
31 # USI&II cores currently exhibit uniform 2x improvement [over pre-
37 # out-of-order execution, which *might* mean that integer multiplier
39 # additional note, SPARC64 V implements FP Multiply-Add instruction,
41 # as Fujitsu SPARC64 V goes, talk to the author:-)
43 # The implementation implies following "non-natural" limitations on
45 # - num may not be less than 4;
46 # - num has to be even;
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H A Dparisc-mont.pl2 # Copyright 2009-2020 The OpenSSL Project Authors. All Rights Reserved.
17 # On PA-7100LC this module performs ~90-50% better, less for longer
18 # keys, than code generated by gcc 3.2 for PA-RISC 1.1. Latter means
19 # that compiler utilized xmpyu instruction to perform 32x32=64-bit
24 # toward 4 times 16x16=32-bit multiplications [plus complementary
27 # for PA-RISC 1.1, but the "baseline" is far from optimal. The actual
28 # improvement coefficient was never collected on PA-7100LC, or any
30 # vendor compiler. But to give you a taste, PA-RISC 1.1 code path
32 # of ~5x on PA-8600.
34 # On PA-RISC 2.0 it has to compete with pa-risc2[W].s, which is
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/freebsd/crypto/libecc/src/sig/
H A Decfsdsa.c2 * Copyright (C) 2017 - This file is part of libecc project
7 * Jean-Pierre FLORI <jean-pierre.flori@ssi.gouv.fr>
43 q = &(in_priv->params->ec_gen_order); in ecfsdsa_init_pub_key()
46 MUST_HAVE(!nn_cmp(&(in_priv->x), q, &cmp) && (cmp < 0), ret, err); in ecfsdsa_init_pub_key()
49 G = &(in_priv->params->ec_gen); in ecfsdsa_init_pub_key()
51 ret = prj_pt_mul_blind(&(out_pub->y), &(in_priv->x), G); EG(ret, err); in ecfsdsa_init_pub_key()
53 out_pub->key_type = ECFSDSA; in ecfsdsa_init_pub_key()
54 out_pub->params = in_priv->params; in ecfsdsa_init_pub_key()
55 out_pub->magic = PUB_KEY_MAGIC; in ecfsdsa_init_pub_key()
80 * tests against test vectors can be made without ugly hack in the code
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H A Dsig_algs.c2 * Copyright (C) 2017 - This file is part of libecc project
7 * Jean-Pierre FLORI <jean-pierre.flori@ssi.gouv.fr>
29 q = &(priv_key->params->ec_gen_order); in generic_gen_priv_key()
32 ret = nn_get_random_mod(&(priv_key->x), q); in generic_gen_priv_key()
47 ret = -1; in gen_priv_key()
49 sm->type != UNKNOWN_ALG; sm = &ec_sig_maps[++i]) { in gen_priv_key()
50 if (sm->type == priv_key->key_type) { in gen_priv_key()
55 MUST_HAVE((sm->gen_priv_key != NULL), ret, err); in gen_priv_key()
56 ret = sm->gen_priv_key(priv_key); in gen_priv_key()
68 * (e.g. Y=xG, Y=(x^-1)G, etc). It returns -1 on error (i.e. if the signature
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/freebsd/contrib/ncurses/progs/
H A DMKtermsort.sh4 # MKtermsort.sh -- generate indirection vectors for the various sort methods
7 # Copyright 2020-2021,2022 Thomas E. Dickey #
8 # Copyright 1998-2015,2017 Free Software Foundation, Inc. #
46 AWK=${1-awk}
47 DATA=${2-../include/Caps}
50 trap 'rm -f $data; exit 1' 1 2 3 15
51 sed -e 's/[ ][ ]*/ /g' < "$DATA" >$data
56 * termsort.h --- sort order arrays for use by infocmp.
84 $3 == "num" {printf("%s\t%d\n", $2, i++);}
111 $3 == "num" {printf("%s\t%d\n", $1, i++);}
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/freebsd/crypto/libecc/scripts/
H A Dexpand_libecc.py2 # * Copyright (C) 2017 - This file is part of libecc project
7 # * Jean-Pierre FLORI <jean-pierre.flori@ssi.gouv.fr>
20 # External dependecy for SHA-3
22 # for SHA-3 functions for now
32 ### Ctrl-C handler
51 x0, x1 = x1, x0 - q * x1
52 y0, y1 = y1, y0 - q * y1
70 mpinv = 2**wlen - (modinv(prime, 2**wlen))
82 pshift = int(pbitlen - cnt)
85 prec = B**3 // ((primenorm >> int(pbitlen - 2*wlen)) + 1) - B
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/freebsd/sys/dev/ice/
H A Dice_iov.c1 /* SPDX-License-Identifier: BSD-3-Clause */
86 * ice_iov_attach - Initialize SR-IOV PF host support
89 * Initialize SR-IOV PF host support at the end of the driver attach process.
94 * - ENOMEM if there is no memory for the PF/VF schemas or iov device
95 * - ENXIO if the device isn't PCI-E or doesn't support the same SR-IOV
97 * - ENOENT if the device doesn't have the SR-IOV capability
102 device_t dev = sc->dev; in ice_iov_attach()
109 pci_iov_schema_add_unicast_mac(vf_schema, "mac-addr", 0, NULL); in ice_iov_attach()
110 pci_iov_schema_add_bool(vf_schema, "mac-anti-spoof", in ice_iov_attach()
112 pci_iov_schema_add_bool(vf_schema, "allow-set-mac", in ice_iov_attach()
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/freebsd/contrib/llvm-project/llvm/lib/Transforms/Scalar/
H A DLowerMatrixIntrinsics.cpp1 //===- LowerMatrixIntrinsics.cpp - Lower matrix intrinsics -----*- C++ -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
13 // * Support more cases, e.g. multiply-add, multiply-sub, operands/results
15 // * Improve cost-modeling, e.g. choose different number of rows/columns
18 //===----------------------------------------------------------------------===//
53 #define DEBUG_TYPE "lower-matrix-intrinsics"
56 FuseMatrix("fuse-matrix", cl::init(true), cl::Hidden,
58 // TODO: Allow and use non-square tiles.
60 "fuse-matrix-tile-size", cl::init(4), cl::Hidden,
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/illumos-gate/usr/src/uts/common/sys/scsi/adapters/pmcs/
H A Dpmcs_param.h75 * PMCS_NQENTRY is tunable by setting pmcs-num-io-qentries
120 * External Scatter Gather come in chunks- each this many deep.
126 * MSI/MSI-X related definitions.
128 * These are the maximum number of interrupt vectors we could use.
137 #define PMCS_MSIX_FATAL (PMCS_MAX_MSIX-1) /* Fatal Int vector */
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DBasicTTIImpl.h1 //===- BasicTTIImpl.h -------------------------------------------*- C++ -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
11 /// terms of the target-independent code generator and TargetLowering
14 //===----------------------------------------------------------------------===//
96 Cost += thisT()->getVectorInstrCost(Instruction::ExtractElement, VTy, in getBroadcastShuffleOverhead()
99 for (int i = 0, e = VTy->getNumElements(); i < e; ++i) { in getBroadcastShuffleOverhead()
100 Cost += thisT()->getVectorInstrCost(Instruction::InsertElement, VTy, in getBroadcastShuffleOverhead()
118 for (int i = 0, e = VTy->getNumElements(); i < e; ++i) { in getPermuteShuffleOverhead()
119 Cost += thisT()->getVectorInstrCost(Instruction::InsertElement, VTy, in getPermuteShuffleOverhead()
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