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/freebsd/sys/contrib/device-tree/Bindings/mailbox/
H A Dti,omap-mailbox.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mailbox/ti,omap-mailbo
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H A Domap-mailbox.txt10 Each mailbox IP block/cluster has a certain number of h/w fifo queues and output
16 programmable through a set of interrupt configuration registers, and have a rx
18 is achieved through the appropriate programming of the rx and tx interrupt
21 The number of h/w fifo queues and interrupt lines dictate the usable registers.
23 instance. DRA7xx has multiple instances with different number of h/w fifo queues
25 routed to different processor sub-systems on DRA7xx as they are routed through
38 a SoC. The sub-mailboxes are represented as child nodes of this parent node.
41 --------------------
42 - compatible: Should be one of the following,
43 "ti,omap2-mailbox" for OMAP2420, OMAP2430 SoCs
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/freebsd/sys/contrib/device-tree/Bindings/net/
H A Dfsl-fec.txt4 - compatible : Should be "fsl,<soc>-fec"
5 - reg : Address and length of the register set for the device
6 - interrupts : Should contain fec interrupt
7 - phy-mode : See ethernet.txt file in the same directory
10 - phy-supply : regulator that powers the Ethernet PHY.
11 - phy-handle : phandle to the PHY device connected to this device.
12 - fixed-link : Assume a fixed link. See fixed-link.txt in the same directory.
13 Use instead of phy-handle.
14 - fsl,num-tx-queues : The property is valid for enet-avb IP, which supports
15 hw multi queues. Should specify the tx queue number, otherwise set tx queue
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H A Dbrcm,systemport.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Florian Fainelli <f.fainelli@gmail.com>
15 - brcm,systemport-v1.00
16 - brcm,systemportlite-v1.00
17 - brcm,systemport
25 - description: interrupt line for RX queues
26 - description: interrupt line for TX queues
27 - description: interrupt line for Wake-on-LAN
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H A Dbrcm,systemport.txt4 - compatible: should be one of:
5 "brcm,systemport-v1.00"
6 "brcm,systemportlite-v1.00" or
8 - reg: address and length of the register set for the device.
9 - interrupts: interrupts for the device, first cell must be for the rx
10 interrupts, and the second cell should be for the transmit queues. An
11 optional third interrupt cell for Wake-on-LAN can be specified
12 - local-mac-address: Ethernet MAC address (48 bits) of this adapter
13 - phy-mode: Should be a string describing the PHY interface to the
15 - fixed-link: see Documentation/devicetree/bindings/net/fixed-link.txt for
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H A Dfsl,fec.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shawn Guo <shawnguo@kernel.org>
11 - Wei Fang <wei.fang@nxp.com>
12 - NXP Linux Team <linux-imx@nxp.com>
15 - $ref: ethernet-controller.yaml#
20 - enum:
21 - fsl,imx25-fec
22 - fsl,imx27-fec
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/freebsd/sys/contrib/device-tree/src/arm64/rockchip/
H A Drk3568.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
12 compatible = "rockchip,rk3568-dwc-ahci", "snps,dwc-ahci";
16 clock-names = "sata", "pmalive", "rxoob";
19 phy-names = "sata-phy";
20 ports-implemented = <0x1>;
21 power-domains = <&power RK3568_PD_PIPE>;
26 compatible = "rockchip,rk3568-pipe-phy-grf", "syscon";
31 compatible = "rockchip,rk3568-qos", "syscon";
36 compatible = "rockchip,rk3568-qos", "syscon";
41 compatible = "rockchip,rk3568-qos", "syscon";
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H A Drk3588-extra.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include "rk3588-base.dtsi"
7 #include "rk3588-extra-pinctrl.dtsi"
11 compatible = "rockchip,rk3588-dwc3", "snps,dwc3";
16 clock-names = "ref_clk", "suspend_clk", "bus_clk";
19 phy-names = "usb2-phy", "usb3-phy";
21 power-domains = <&power RK3588_PD_USB>;
24 snps,dis-u2-freeclk-exists-quirk;
25 snps,dis-del-phy-power-chg-quirk;
26 snps,dis-tx-ipgap-linecheck-quirk;
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/freebsd/sys/contrib/device-tree/src/arm/axis/
H A Dartpec6.dtsi2 * Device Tree Source for the Axis ARTPEC-6 SoC
4 * This file is dual-licensed: you can use it either under the terms
43 #include <dt-bindings/interrupt-controller/arm-gic.h>
44 #include <dt-bindings/dma/nbpfaxi.h>
45 #include <dt-bindings/clock/axis,artpec6-clkctrl.h>
48 #address-cells = <1>;
49 #size-cells = <1>;
51 interrupt-parent = <&intc>;
54 #address-cells = <1>;
55 #size-cells = <0>;
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/freebsd/share/man/man4/
H A Dena.41 .\" SPDX-License-Identifier: BSD-2-Clause
3 .\" Copyright (c) 2015-2024 Amazon.com, Inc. or its affiliates.
40 .Bd -ragged -offset indent
47 .Bd -literal -offset indent
58 The driver supports a range of ENA devices, is link-speed independent
62 Some ENA devices support SR-IOV.
63 This driver is used for both the SR-IOV Physical Function (PF) and Virtual
67 processing by providing multiple Tx/Rx queue pairs (the maximum number
68 is advertised by the device via the Admin Queue), a dedicated MSI-X
69 interrupt vector per Tx/Rx queue pair, and CPU cacheline optimized
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H A Dixl.41 .\" Copyright (c) 2013-2018, Intel Corporation
41 .Bd -ragged -offset indent
48 .Bd -literal -offset indent
60 .Bl -bullet -compact
71 The driver supports Jumbo Frames, TX/RX checksum offload,
97 .Bl -bullet
101 .Em sysutils/intel-qc
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/freebsd/sys/contrib/dev/ath/ath_hal/ar9300/
H A Dar9300_xmit.c46 if (AH9300(ah)->ah_tx_trig_level >= MAX_TX_FIFO_THRESHOLD && in ar9300_update_tx_trig_level()
55 omask = ar9300_set_interrupts(ah, ahp->ah_mask_reg &~ HAL_INT_GLOBAL, 0); in ar9300_update_tx_trig_level()
66 new_level--; in ar9300_update_tx_trig_level()
75 /* re-enable chip interrupts */ in ar9300_update_tx_trig_level()
78 AH9300(ah)->ah_tx_trig_level = new_level; in ar9300_update_tx_trig_level()
89 return (AH9300(ah)->ah_tx_trig_level); in ar9300_get_tx_trig_level()
100 HAL_CAPABILITIES *p_cap = &AH_PRIVATE(ah)->ah_caps; in ar9300_set_tx_queue_props()
102 if (q >= p_cap->halTotalQueues) { in ar9300_set_tx_queue_props()
103 HALDEBUG(ah, HAL_DEBUG_QUEUE, "%s: invalid queue num %u\n", __func__, q); in ar9300_set_tx_queue_props()
106 return ath_hal_setTxQProps(ah, &ahp->ah_txq[q], q_info); in ar9300_set_tx_queue_props()
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/freebsd/sys/contrib/device-tree/src/arm64/freescale/
H A Dimx8-ss-conn.dtsi1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2018-2019 NXP
7 #include <dt-bindings/clock/imx8-lpcg.h>
8 #include <dt-bindings/firmware/imx/rsrc.h>
10 conn_axi_clk: clock-conn-axi {
11 compatible = "fixed-clock";
12 #clock-cells = <0>;
13 clock-frequency = <333333333>;
14 clock-output-names = "conn_axi_clk";
17 conn_ahb_clk: clock-conn-ahb {
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/freebsd/sys/contrib/alpine-hal/
H A Dal_hal_udma.h1 /*-
10 found at http://www.gnu.org/licenses/gpl-2.0.html
60 /* *INDENT-OFF* */
64 /* *INDENT-ON* */
78 /* Statistics - TBD */
95 /* RX */
100 } rx; member
132 /* TX/RX descriptor Target-ID field (in the buffer address 64 bit field) */
141 /* RX completion */
148 /* TX/RX common completion desc ctrl_meta feilds */
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/freebsd/sys/dev/ixl/
H A Dixl_pf_qmgr.h3 Copyright (c) 2013-2018, Intel Corporation
41 * Primarily manages the queues that need to be allocated to VSIs.
92 /* Allocate queues for a VF VSI */
93 int ixl_pf_qmgr_alloc_scattered(struct ixl_pf_qmgr *qmgr, u16 num, struct ixl_pf_qtag *qtag);
94 /* Allocate queues for the LAN VSIs, or X722 VF VSIs */
95 int ixl_pf_qmgr_alloc_contiguous(struct ixl_pf_qmgr *qmgr, u16 num, struct ixl_pf_qtag *qtag);
99 /* Help manage queues used in VFs */
100 /* Typically hardware refers to RX as 0 and TX as 1, so continue that convention here */
H A Dixl_pf_iov.c3 Copyright (c) 2013-2018, Intel Corporation
91 device_t dev = pf->dev; in ixl_initialize_sriov()
92 struct i40e_hw *hw = &pf->hw; in ixl_initialize_sriov()
98 pci_iov_schema_add_unicast_mac(vf_schema, "mac-addr", 0, NULL); in ixl_initialize_sriov()
99 pci_iov_schema_add_bool(vf_schema, "mac-anti-spoof", in ixl_initialize_sriov()
101 pci_iov_schema_add_bool(vf_schema, "allow-set-mac", in ixl_initialize_sriov()
103 pci_iov_schema_add_bool(vf_schema, "allow-promisc", in ixl_initialize_sriov()
105 pci_iov_schema_add_uint16(vf_schema, "num-queues", in ixl_initialize_sriov()
107 max(1, min(hw->func_caps.num_msix_vectors_vf - 1, IAVF_MAX_QUEUES))); in ixl_initialize_sriov()
112 "Failed to initialize SR-IOV (error=%d)\n", in ixl_initialize_sriov()
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/freebsd/sys/dev/liquidio/base/
H A Dlio_config.h41 /*--------------------------CONFIG VALUES------------------------*/
90 #define LIO_CN23XX_MAX_INPUT_JABBER (LIO_CN23XX_PKI_MAX_FRAME_SIZE - \
102 #define LIO_GET_IQ_CFG(cfg) ((cfg)->iq)
103 #define LIO_GET_IQ_MAX_Q_CFG(cfg) ((cfg)->iq.max_iqs)
104 #define LIO_GET_IQ_INSTR_TYPE_CFG(cfg) ((cfg)->iq.instr_type)
106 #define LIO_GET_IQ_INTR_PKT_CFG(cfg) ((cfg)->iq.iq_intr_pkt)
108 #define LIO_GET_OQ_MAX_Q_CFG(cfg) ((cfg)->oq.max_oqs)
109 #define LIO_GET_OQ_PKTS_PER_INTR_CFG(cfg) ((cfg)->oq.pkts_per_intr)
110 #define LIO_GET_OQ_REFILL_THRESHOLD_CFG(cfg) ((cfg)->oq.refill_threshold)
111 #define LIO_GET_OQ_INTR_PKT_CFG(cfg) ((cfg)->oq.oq_intr_pkt)
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/freebsd/sys/contrib/xen/io/
H A Dnetif.h4 * Unified network-device I/O interface for Xen guest OSes.
24 * Copyright (c) 2003-2004, Keir Fraser
54 * If the client sends notification for rx requests then it should specify
55 * feature 'feature-rx-notify' via xenbus. Otherwise the backend will assume
60 * "feature-split-event-channels" is introduced to separate guest TX
61 * and RX notification. Backend either doesn't support this feature or
65 * channels for TX and RX, advertise them to backend as
66 * "event-channel-tx" and "event-channel-rx" respectively. If frontend
67 * doesn't want to use this feature, it just writes "event-channel"
72 * Multiple transmit and receive queues:
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/freebsd/sys/dev/ena/
H A Dena.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2015-2024 Amazon.com, Inc. or its affiliates.
210 device_t pdev = adapter->pdev; in ena_dma_alloc()
215 maxsize = ((size - 1) / PAGE_SIZE + 1) * PAGE_SIZE; in ena_dma_alloc()
217 dma_space_addr = ENA_DMA_BIT_MASK(adapter->dma_width); in ena_dma_alloc()
232 &dma->tag); in ena_dma_alloc()
238 error = bus_dma_tag_set_domain(dma->tag, domain); in ena_dma_alloc()
245 error = bus_dmamem_alloc(dma->tag, (void **)&dma->vaddr, in ena_dma_alloc()
246 BUS_DMA_COHERENT | BUS_DMA_ZERO, &dma->map); in ena_dma_alloc()
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/freebsd/sys/dev/qlnx/qlnxe/
H A Decore_iov_api.h2 * Copyright (c) 2017-2018 Cavium, Inc.
39 #define IS_VF(p_dev) ((p_dev)->b_is_vf)
40 #define IS_PF(p_dev) (!((p_dev)->b_is_vf))
42 #define IS_PF_SRIOV(p_hwfn) (!!((p_hwfn)->p_dev->p_iov_info))
46 #define IS_PF_SRIOV_ALLOC(p_hwfn) (!!((p_hwfn)->pf_iov_info))
49 /* @@@ TBD MichalK - what should this number be*/
65 /*PF to VF STATUS is part of vfpf-channel API
81 /* These defines are used by the hw-channel; should never change order */
105 /* Number of requested Queues; Currently, don't support different
106 * number of Rx/Tx queues.
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/freebsd/sys/dev/cxgb/common/
H A Dcxgb_ctl_defs.h2 * Copyright (C) 2003-2006 Chelsio Communications. All rights reserved.
46 * Structure used to describe a TID range. Valid TIDs are [base, base+num).
50 unsigned int num; /* number of TIDs in range */ member
105 * Offload TX/RX page information.
109 unsigned int num; /* Number of pages */ member
138 * Structure used to setup RDMA completion queues.
/freebsd/sys/contrib/device-tree/src/arm/nxp/imx/
H A Dimx7d.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
7 #include <dt-bindings/reset/imx7-reset.h>
18 clock-frequency = <996000000>;
19 operating-points-v2 = <&cpu0_opp_table>;
20 #cooling-cells = <2>;
21 nvmem-cell
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/freebsd/sys/dev/dpaa2/
H A Ddpaa2_ni.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright © 2021-2023 Dmitry Salychev
35 * high-functioning network interface. The DPNI supports features that are
112 mtx_assert(&(__sc)->lock, MA_NOTOWNED); \
113 mtx_lock(&(__sc)->lock); \
116 mtx_assert(&(__sc)->lock, MA_OWNED); \
117 mtx_unlock(&(__sc)->lock); \
120 mtx_assert(&(__sc)->lock, MA_OWNED); \
124 (&(sc)->channels[(chan)]->txc_queue.tx_rings[(tc)])
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H A Ddpaa2_ni.h1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright © 2021-2023 Dmitry Salychev
210 uint8_t queues; member
215 } num; member
241 * other commands on the queue through DPIO. Note that Tx queues
242 * are logical queues and not all management commands are available
248 * and Rx error queues).
249 * idx: Selects a specific queue out of the set of queues in a TC.
251 * ignored for QUEUE_TYPE 3 (Rx error queue). For access to the
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/freebsd/sys/contrib/dev/iwlwifi/fw/api/
H A Dmac.h1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
3 * Copyright (C) 2012-2014, 2018-2022, 2024 Intel Corporation
11 * AUX indices follows - 1 for non-CDB, 2 for CDB.
31 * enum iwl_mac_protection_flags - MA
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