non\-temporal (full) in projects: linux

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Searched +full:non +full:- +full:temporal (Results 1 – 25 of 47) sorted by relevance

/linux/Documentation/trace/rv/
H A D	linear_temporal_logic.rst	`1 Linear temporal logic 5 ------------ 16 and error-prone. 18 Thus, RV monitors based on linear temporal logic (LTL) are introduced. This type 24 Christel Baier and Joost-Pieter Katoen: Principles of Model Checking, The MIT 28 ------- 32 may not be well-versed in LTL. 38 true, false, user-defined names consisting of upper-case characters, digits, 57 Example linear temporal logic 58 ----------------------------- [all …]`
/linux/tools/perf/pmu-events/arch/arm64/fujitsu/monaka/
H A D	sve.json	4 …ding the Advanced SIMD scalar instructions and the instructions listed in Non-SIMD SVE instruction… 8 …ecturally executed SVE instructions, including the instructions listed in Non-SIMD SVE instruction… 12 …ecturally executed SVE instructions, including the instructions listed in Non-SIMD SVE instruction… 20 "BriefDescription": "This event counts all architecturally executed micro-operation." 28 …ations due to scalar, Advanced SIMD, and SVE instructions listed in Floating-point instructions se… 32 …on": "This event counts architecturally executed floating-point fused multiply-add and multiply-su… 36 …"BriefDescription": "This event counts architecturally executed floating-point reciprocal estimate… 40 …uted floating-point convert operations due to the scalar, Advanced SIMD, and SVE floating-point co… 60 …"BriefDescription": "This event counts architecturally executed SVE 64-bit integer divide operatio… 76 …"BriefDescription": "This event counts architecturally executed SVE integer 64-bit x 64-bit multip… [all …]
H A D	l2_cache.json	12 …escription": "This event counts every write-back of data from the L2 cache caused by L2 replace, n… 40 …"BriefDescription": "This event counts every write-back of data from the L2 cache caused by L2 rep… 95 …"BriefDescription": "This event counts every write-back of data from the L2 cache caused by L2 rep… 100 …BriefDescription": "This event counts every write-back of data from the L2 cache caused by non-tem… 105 …"BriefDescription": "This event counts every write-back of data from the L2 cache caused by DC ZVA… 110 "BriefDescription": "This event counts every flush-back (drop) of data from the L2 cache."
/linux/include/linux/
H A D	resctrl_types.h	`1 /* SPDX-License-Identifier: GPL-2.0 / 19 / Non-Temporal Writes to Local Memory / 22 / Non-Temporal Writes to Remote Memory */ 57 #define QOS_NUM_L3_MBM_EVENTS (QOS_L3_MBM_LOCAL_EVENT_ID - QOS_L3_MBM_TOTAL_EVENT_ID + 1) 58 #define MBM_STATE_IDX(evt) ((evt) - QOS_L3_MBM_TOTAL_EVENT_ID)`
H A D	rv.h	1 /* SPDX-License-Identifier: GPL-2.0 / 20 Deterministic automaton per-object variables. 38 * struct ltl_monitor - A linear temporal logic runtime verification monitor 40 * non-deterministic state machine, the monitor can be in multiple 43 * - The monitor has not started yet (e.g. because not all 45 * - There is no possible state to be in. In other words, a 58 for (int i = 0; i < ARRAY_SIZE(mon->states); ++i) { in rv_ltl_valid_state() 59 if (mon->states[i]) in rv_ltl_valid_state() 67 for (int i = 0; i < ARRAY_SIZE(mon->unknown_atoms); ++i) { in rv_ltl_all_atoms_known() 68 if (mon->unknown_atoms[i]) in rv_ltl_all_atoms_known()
/linux/drivers/gpu/drm/i915/
H A D	i915_memcpy.c	58 len -= 4; in __memcpy_ntdqa() 60 while (len--) { in __memcpy_ntdqa() 87 len -= 4; in __memcpy_ntdqu() 89 while (len--) { in __memcpy_ntdqu() 107 * non-temporal instructions where available. Note that all arguments 138 * @src to @dst using * non-temporal instructions where available, but 140 * potential 16-byte read past the end. 150 unsigned long x = min(ALIGN(addr, 16) - addr, len); in i915_unaligned_memcpy_from_wc() 154 len -= x; in i915_unaligned_memcpy_from_wc() 166 * Some hypervisors (e.g. KVM) don't support VEX-prefix instructions in i915_memcpy_init_early()
/linux/tools/perf/pmu-events/arch/x86/goldmontplus/
H A D	cache.json	20 "BriefDescription": "Cycles code-fetch stalled due to an outstanding ICache miss.", 33 …from the intra-die interconnect (IDI) fabric. The XQ may reject transactions from the L2Q (non-cac… 176 "BriefDescription": "Memory uops retired that split a cache-line (Precise event capable)", 187 "BriefDescription": "Load uops retired that split a cache-line (Precise event capable)", 198 "BriefDescription": "Stores uops retired that split a cache-line (Precise event capable)", 602 …"BriefDescription": "Counts demand instruction cacheline and I-side prefetch requests that miss th… 608 …"PublicDescription": "Counts demand instruction cacheline and I-side prefetch requests that miss t… 613 …"BriefDescription": "Counts demand instruction cacheline and I-side prefetch requests that miss th… 619 …"PublicDescription": "Counts demand instruction cacheline and I-side prefetch requests that miss t… 624 …"BriefDescription": "Counts demand instruction cacheline and I-side prefetch requests that miss th… [all …]
/linux/tools/perf/pmu-events/arch/x86/goldmont/
H A D	cache.json	20 "BriefDescription": "Cycles code-fetch stalled due to an outstanding ICache miss.", 33 …from the intra-die interconnect (IDI) fabric. The XQ may reject transactions from the L2Q (non-cac… 176 "BriefDescription": "Memory uops retired that split a cache-line (Precise event capable)", 187 "BriefDescription": "Load uops retired that split a cache-line (Precise event capable)", 198 "BriefDescription": "Stores uops retired that split a cache-line (Precise event capable)", 558 …"BriefDescription": "Counts demand instruction cacheline and I-side prefetch requests that miss th… 564 …"PublicDescription": "Counts demand instruction cacheline and I-side prefetch requests that miss t… 569 …"BriefDescription": "Counts demand instruction cacheline and I-side prefetch requests that miss th… 575 …"PublicDescription": "Counts demand instruction cacheline and I-side prefetch requests that miss t… 580 …"BriefDescription": "Counts demand instruction cacheline and I-side prefetch requests that miss th… [all …]
/linux/Documentation/RCU/
H A D	whatisRCU.rst	3 What is RCU? -- "Read, Copy, Update" 24 …ries: Fundamentals https://www.linuxfoundation.org/webinars/unraveling-rcu-usage-mysteries 25 …Cases https://www.linuxfoundation.org/webinars/unraveling-rcu-usage-mysteries-additional-use-cases 31 during the 2.5 development effort that is optimized for read-mostly 50 :ref:`6. ANALOGY WITH READER-WRITER LOCKING <6_whatisRCU>` 70 everything, feel free to read the whole thing -- but if you are really 72 never need this document anyway. ;-) 77 ---------------- 106 b. Wait for all previous readers to complete their RCU read-side 115 use much lighter-weight synchronization, in some cases, absolutely no [all …]
/linux/drivers/gpu/drm/nouveau/
H A D	nouveau_connector.h	79 NVDEF(NV907D, HEAD_SET_DITHER_CONTROL, MODE, TEMPORAL), 147 * even on pre-nv50 where we do not support atomic. This embedded 148 * version gets used in the non atomic modeset case. 165 if (connector->connector_type != DRM_MODE_CONNECTOR_DisplayPort) in nouveau_connector_is_mst() 172 encoder = &nv_encoder->base.base; in nouveau_connector_is_mst() 173 return encoder->encoder_type == DRM_MODE_ENCODER_DPMST; in nouveau_connector_is_mst() 183 struct drm_device *dev = nv_crtc->base.dev; in nouveau_crtc_connector_get() 191 if (connector->encoder && connector->encoder->crtc == crtc) { in nouveau_crtc_connector_get()
/linux/Documentation/userspace-api/media/v4l/
H A D	ext-ctrls-codec.rst	`1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later 4 .. _codec-controls: 25 .. _mpeg-control-id: 28 ----------------- 36 .. _v4l2-mpeg-stream-type: 41 enum v4l2_mpeg_stream_type - 42 The MPEG-1, -2 or -4 output stream type. One cannot assume anything 49 .. flat-table:: 50 :header-rows: 0 51 :stub-columns: 0 [all …]`
H A D	dev-raw-vbi.rst	1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later 4 .. _raw-vbi: 106 .. flat-table:: struct v4l2_vbi_format 107 :header-rows: 0 108 :stub-columns: 0 111 * - __u32 112 - ``sampling_rate`` 113 - Samples per second, i. e. unit 1 Hz. 114 * - __u32 115 - ``offset`` [all …]
H A D	ext-ctrls-codec-stateless.rst	1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later 4 .. _codec-stateless-controls: 19 .. _codec-stateless-control-id: 24 .. _v4l2-codec-stateless-h264: 44 .. flat-table:: struct v4l2_ctrl_h264_sps 45 :header-rows: 0 46 :stub-columns: 0 49 * - __u8 50 - ``profile_idc`` 51 - [all …]
/linux/drivers/gpu/drm/
H A D	drm_cache.c	3 * Copyright (c) 2006-2007 Tungsten Graphics, Inc., Cedar Park, TX., USA 20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 28 * Authors: Thomas Hellström <thomas-at-tungstengraphics-dot-com> 34 #include <linux/iosys-map.h> 79 * drm_clflush_pages - Flush dcache lines of a set of pages. 120 * drm_clflush_sg - Flush dcache lines pointing to a scather-gather. 149 * drm_clflush_virt_range - Flush dcache lines of a region 164 addr = (void )(((unsigned long)addr) & -size); in drm_clflush_virt_range() 168 clflushopt(end - 1); / force serialisation */ in drm_clflush_virt_range() 204 for (tmp = iomem_resource.child; tmp; tmp = tmp->sibling) in drm_need_swiotlb() [all …]
/linux/tools/memory-model/
H A D	linux-kernel.cat	`1 // SPDX-License-Identifier: GPL-2.0+ 9 * "Frightening small children and disconcerting grown-ups: Concurrency 14 "Linux-kernel memory consistency model" 28 let acq-po = [Acquire] ; po ; [M] 29 let po-rel = [M] ; po ; [Release] 30 let po-unlock-lock-p [all...]`
/linux/tools/perf/pmu-events/arch/arm64/
H A D	common-and-microarch.json	129 "PublicDescription": "Attributable Level 1 data cache write-back", 132 "BriefDescription": "Attributable Level 1 data cache write-back" 147 "PublicDescription": "Attributable Level 2 data cache write-back", 150 "BriefDescription": "Attributable Level 2 data cache write-back" 283 "PublicDescription": "Access to another socket in a multi-socket system", 286 "BriefDescription": "Access to another socket in a multi-socket system" 323 … "PublicDescription": "Attributable memory read access to another socket in a multi-socket system", 326 … "BriefDescription": "Attributable memory read access to another socket in a multi-socket system" 329 …"PublicDescription": "Level 1 data cache long-latency read miss. The counter counts each memory r… 332 "BriefDescription": "Level 1 data cache long-latency read miss" [all …]
/linux/drivers/media/platform/st/sti/hva/
H A D	hva-h264.c	1 // SPDX-License-Identifier: GPL-2.0 9 #include "hva-hw.h" 23 /* formula to get temporal or spatial data size / 32 / source buffer copy in YUV 420 MB-tiled format with size=162563/2 / 200 @brc_type: selects the bit-rate control algorithm 205 * @non_VCL_NALU_Size: size of non-VCL NALUs (SPS, PPS, filler), 213 * @delay: End-to-End Initial Delay 251 * Bit 0-6 used for qp offset (value -64 to 63). 437 u32 frame_order = frame_num % ctrls->gop_size; in hva_h264_fill_slice_header() 439 if (!(frame_num % ctrls->gop_size)) in hva_h264_fill_slice_header() [all …]
/linux/tools/perf/pmu-events/arch/x86/amdzen4/
H A D	cache.json	5 …iption": "Miss Address Buffer (MAB) entries allocated by a Load-Store (LS) pipe for load-store all… 11 …"BriefDescription": "Miss Address Buffer (MAB) entries allocated by a Load-Store (LS) pipe for har… 17 …"BriefDescription": "Miss Address Buffer (MAB) entries allocated by a Load-Store (LS) pipe for all… 161 …eculative) of type PrefetchNTA (move data with minimum cache pollution i.e. non-temporal access).", 287 …"BriefDescription": "In-flight L1 data cache misses i.e. Miss Address Buffer (MAB) allocations eac… 292 …"BriefDescription": "L2 cache requests of non-cacheable type (non-cached data and instructions rea… 364 …e requests (not including L2 prefetch) with status: instruction cache hit non-modifiable line in L… 406 …che requests (not including L2 prefetch) with status: data cache read hit non-modifiable line in L…
/linux/crypto/
H A D	Kconfig	1 # SPDX-License-Identifier: GPL-2.0 156 cbc(aes), and the support for the crypto self-tests. 178 bool "Enable cryptographic self-tests" 181 Enable the cryptographic self-tests. 183 The cryptographic self-tests run at boot time, or at algorithm 188 - Development and pre-release testing. In this case, also enable 192 - Production kernels, to help prevent buggy drivers from being used 193 and/or meet FIPS 140-3 pre-operational testing requirements. In 197 bool "Enable the full set of cryptographic self-tests" 200 Enable the full set of cryptographic self-tests for each algorithm. [all …]
/linux/Documentation/devicetree/bindings/riscv/
H A D	extensions.yaml	`1 # SPDX-License-Identifier: (GPL-2.0 OR MIT) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: RISC-V ISA extensions 10 - Paul Walmsley <paul.walmsley@sifive.com> 11 - Palmer Dabbelt <palmer@sifive.com> 12 - Conor Dooley <conor@kernel.org> 15 RISC-V has a large number of extensions, some of which are "standard" 16 extensions, meaning they are ratified by RISC-V International, and others 36 Identifies the specific RISC-V instruction set architecture [all …]`
/linux/tools/perf/pmu-events/arch/x86/jaketown/
H A D	cache.json	113 …ion": "Count the number of modified Lines evicted from L1 and missed L2. (Non-rejected WBs from th… 386 "BriefDescription": "Core-originated cacheable demand requests missed LLC.", 394 "BriefDescription": "Core-originated cacheable demand requests that refer to LLC.", 402 …iption": "Retired load uops which data sources were LLC and cross-core snoop hits in on-pkg core c… 406 …-level cache (L3) and were found in a non-modified state in a neighboring core's private cache (sa… 415 …his event counts retired load uops that hit in the last-level cache (L3) and were found in a non-m… 420 …n": "Retired load uops which data sources were LLC hit and cross-core snoop missed in on-pkg core … 483 …"PublicDescription": "This event counts retired load uops that hit in the last-level (L3) cache wi… 488 "BriefDescription": "Miss in last-level (L3) cache. Excludes Unknown data-source.", 530 …ription": "This event counts line-splitted load uops retired to the architected path. A line split… [all …]
/linux/tools/arch/x86/kcpuid/
H A D	cpuid.csv	`1 # SPDX-License-Identifier: CC0-1.0 2 # Generator: x86-cpuid-db v2.4 5 # Auto-generated file. 6 # Please submit all updates and bugfixes to https://x86-cpuid.org 16 0x0, 0, ebx, 31:0, cpu_vendorid_0 , CPU vendor ID string bytes 0 - 3 17 0x0, 0, ecx, 31:0, cpu_vendorid_2 , CPU vendor ID string bytes 8 - 11 18 0x0, 0, edx, 31:0, cpu_vendorid_1 , CPU vendor ID string bytes 4 - [all...]`
/linux/drivers/staging/rtl8723bs/core/
H A D	rtw_security.c	1 // SPDX-License-Identifier: GPL-2.0 4 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. 47 struct pkt_attrib pattrib = &((struct xmit_frame )pxmitframe)->attrib; in rtw_wep_encrypt() 48 struct security_priv psecuritypriv = &padapter->securitypriv; in rtw_wep_encrypt() 49 struct xmit_priv pxmitpriv = &padapter->xmitpriv; in rtw_wep_encrypt() 50 struct arc4_ctx ctx = &psecuritypriv->xmit_arc4_ctx; in rtw_wep_encrypt() 52 if (!((struct xmit_frame )pxmitframe)->buf_addr) in rtw_wep_encrypt() 56 pframe = ((struct xmit_frame *)pxmitframe)->buf_addr + hw_hdr_offset; in rtw_wep_encrypt() 59 if ((pattrib->encrypt == _WEP40_) \|\| (pattrib->encrypt == _WEP104_)) { in rtw_wep_encrypt() 60 keylength = psecuritypriv->dot11DefKeylen[psecuritypriv->dot11PrivacyKeyIndex]; in rtw_wep_encrypt() [all …]
/linux/tools/perf/pmu-events/arch/x86/ivybridge/
H A D	cache.json	77 …ion": "Count the number of modified Lines evicted from L1 and missed L2. (Non-rejected WBs from th… 374 "BriefDescription": "Core-originated cacheable demand requests missed LLC", 383 "BriefDescription": "Core-originated cacheable demand requests that refer to LLC", 392 …iption": "Retired load uops which data sources were LLC and cross-core snoop hits in on-pkg core c… 410 …n": "Retired load uops which data sources were LLC hit and cross-core snoop missed in on-pkg core … 432 …"PublicDescription": "Retired load uops whose data source was local memory (cross-socket snoop not… 455 "BriefDescription": "Retired load uops which data sources following L1 data-cache miss.", 491 "BriefDescription": "Miss in last-level (L3) cache. Excludes Unknown data-source.", 704 …hat hit in the LLC and sibling core snoops are not needed as either the core-valid bit is not set … 754 …hat hit in the LLC and sibling core snoops are not needed as either the core-valid bit is not set … [all …]
/linux/tools/perf/pmu-events/arch/x86/ivytown/
H A D	cache.json	77 …ion": "Count the number of modified Lines evicted from L1 and missed L2. (Non-rejected WBs from th… 374 "BriefDescription": "Core-originated cacheable demand requests missed LLC", 383 "BriefDescription": "Core-originated cacheable demand requests that refer to LLC", 392 …iption": "Retired load uops which data sources were LLC and cross-core snoop hits in on-pkg core c… 410 …n": "Retired load uops which data sources were LLC hit and cross-core snoop missed in on-pkg core … 478 "BriefDescription": "Retired load uops which data sources following L1 data-cache miss.", 514 "BriefDescription": "Miss in last-level (L3) cache. Excludes Unknown data-source.", 737 …hat hit in the LLC and sibling core snoops are not needed as either the core-valid bit is not set … 787 …hat hit in the LLC and sibling core snoops are not needed as either the core-valid bit is not set … 837 …hat hit in the LLC and sibling core snoops are not needed as either the core-valid bit is not set … [all …]